drm/amd/powerplay: increase the SMU msg response waiting time

This is expected to fix some mode1 reset failures. And this
affects SMU part only as the timeout setting for other parts
is controlled by a different macro.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2019-07-03 09:21:37 +08:00 committed by Alex Deucher
parent 7e4dec5803
commit 617a64dc85

View File

@ -26,7 +26,7 @@
#include <drm/amd_asic_type.h>
#define AMD_MAX_USEC_TIMEOUT 200000 /* 200 ms */
#define AMD_MAX_USEC_TIMEOUT 1000000 /* 1000 ms */
/*
* Chip flags