forked from Minki/linux
regulator: ti-abb: Add support for interleaved LDO registers
Certain platforms such as DRA7 have quirky memory maps such as: PRM_ABBLDO_DSPEVE_CTRL 0x4ae07e20 PRM_ABBLDO_IVA_CTRL 0x4ae07e24 other-registers PRM_ABBLDO_DSPEVE_SETUP 0x4ae07e30 PRM_ABBLDO_IVA_SETUP 0x4ae07e34 These need the address range allocation to be either not reserved OR unique allocation per register instance or use something like syscon based solution. By going with unique allocation per register, we are able to now have a single compatible driver for all instances on all platforms which use the IP block. So, introduce a new "ti,abb-v3" compatible to allow for definitions where explicit register definitions are provided, while maintaining backward compatibility of older predefined register offsets provided by "ti-abb-v1" and "ti-abb-v2". As part of this change, we rename a few variables to indicate the appropriate meaning. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -4,10 +4,14 @@ Required Properties:
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- compatible: Should be one of:
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- "ti,abb-v1" for older SoCs like OMAP3
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- "ti,abb-v2" for newer SoCs like OMAP4, OMAP5
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- "ti,abb-v3" for a generic definition where setup and control registers are
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provided (example: DRA7)
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- reg: Address and length of the register set for the device. It contains
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the information of registers in the same order as described by reg-names
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- reg-names: Should contain the reg names
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- "base-address" - contains base address of ABB module
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- "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2)
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- "control-address" - contains control register address of ABB module (ti,abb-v3)
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- "setup-address" - contains setup register address of ABB module (ti,abb-v3)
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- "int-address" - contains address of interrupt register for ABB module
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(also see Optional properties)
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- #address-cell: should be 0
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@ -54,8 +54,8 @@ struct ti_abb_info {
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/**
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* struct ti_abb_reg - Register description for ABB block
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* @setup_reg: setup register offset from base
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* @control_reg: control register offset from base
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* @setup_off: setup register offset from base
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* @control_off: control register offset from base
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* @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask
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* @fbb_sel_mask: setup register- FBB sel mask
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* @rbb_sel_mask: setup register- RBB sel mask
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@ -64,8 +64,8 @@ struct ti_abb_info {
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* @opp_sel_mask: control register - mask for mode to operate
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*/
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struct ti_abb_reg {
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u32 setup_reg;
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u32 control_reg;
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u32 setup_off;
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u32 control_off;
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/* Setup register fields */
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u32 sr2_wtcnt_value_mask;
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@ -83,6 +83,8 @@ struct ti_abb_reg {
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* @rdesc: regulator descriptor
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* @clk: clock(usually sysclk) supplying ABB block
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* @base: base address of ABB block
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* @setup_reg: setup register of ABB block
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* @control_reg: control register of ABB block
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* @int_base: interrupt register base address
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* @efuse_base: (optional) efuse base address for ABB modes
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* @ldo_base: (optional) LDOVBB vset override base address
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@ -99,6 +101,8 @@ struct ti_abb {
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struct regulator_desc rdesc;
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struct clk *clk;
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void __iomem *base;
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void __iomem *setup_reg;
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void __iomem *control_reg;
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void __iomem *int_base;
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void __iomem *efuse_base;
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void __iomem *ldo_base;
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@ -118,20 +122,18 @@ struct ti_abb {
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* ti_abb_rmw() - handy wrapper to set specific register bits
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* @mask: mask for register field
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* @value: value shifted to mask location and written
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* @offset: offset of register
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* @base: base address
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* @reg: register address
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*
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* Return: final register value (may be unused)
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*/
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static inline u32 ti_abb_rmw(u32 mask, u32 value, u32 offset,
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void __iomem *base)
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static inline u32 ti_abb_rmw(u32 mask, u32 value, void __iomem *reg)
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{
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u32 val;
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val = readl(base + offset);
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val = readl(reg);
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val &= ~mask;
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val |= (value << __ffs(mask)) & mask;
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writel(val, base + offset);
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writel(val, reg);
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return val;
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}
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@ -263,21 +265,19 @@ static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb,
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if (ret)
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goto out;
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ti_abb_rmw(regs->fbb_sel_mask | regs->rbb_sel_mask, 0, regs->setup_reg,
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abb->base);
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ti_abb_rmw(regs->fbb_sel_mask | regs->rbb_sel_mask, 0, abb->setup_reg);
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switch (info->opp_sel) {
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case TI_ABB_SLOW_OPP:
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ti_abb_rmw(regs->rbb_sel_mask, 1, regs->setup_reg, abb->base);
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ti_abb_rmw(regs->rbb_sel_mask, 1, abb->setup_reg);
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break;
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case TI_ABB_FAST_OPP:
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ti_abb_rmw(regs->fbb_sel_mask, 1, regs->setup_reg, abb->base);
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ti_abb_rmw(regs->fbb_sel_mask, 1, abb->setup_reg);
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break;
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}
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/* program next state of ABB ldo */
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ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, regs->control_reg,
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abb->base);
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ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, abb->control_reg);
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/*
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* program LDO VBB vset override if needed for !bypass mode
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@ -288,7 +288,7 @@ static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb,
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ti_abb_program_ldovbb(dev, abb, info);
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/* Initiate ABB ldo change */
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ti_abb_rmw(regs->opp_change_mask, 1, regs->control_reg, abb->base);
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ti_abb_rmw(regs->opp_change_mask, 1, abb->control_reg);
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/* Wait for ABB LDO to complete transition to new Bias setting */
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ret = ti_abb_wait_txdone(dev, abb);
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@ -490,8 +490,7 @@ static int ti_abb_init_timings(struct device *dev, struct ti_abb *abb)
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dev_dbg(dev, "%s: Clk_rate=%ld, sr2_cnt=0x%08x\n", __func__,
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clk_get_rate(abb->clk), sr2_wt_cnt_val);
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ti_abb_rmw(regs->sr2_wtcnt_value_mask, sr2_wt_cnt_val, regs->setup_reg,
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abb->base);
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ti_abb_rmw(regs->sr2_wtcnt_value_mask, sr2_wt_cnt_val, abb->setup_reg);
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return 0;
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}
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@ -648,8 +647,8 @@ static struct regulator_ops ti_abb_reg_ops = {
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/* Default ABB block offsets, IF this changes in future, create new one */
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static const struct ti_abb_reg abb_regs_v1 = {
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/* WARNING: registers are wrongly documented in TRM */
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.setup_reg = 0x04,
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.control_reg = 0x00,
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.setup_off = 0x04,
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.control_off = 0x00,
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.sr2_wtcnt_value_mask = (0xff << 8),
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.fbb_sel_mask = (0x01 << 2),
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@ -661,8 +660,8 @@ static const struct ti_abb_reg abb_regs_v1 = {
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};
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static const struct ti_abb_reg abb_regs_v2 = {
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.setup_reg = 0x00,
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.control_reg = 0x04,
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.setup_off = 0x00,
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.control_off = 0x04,
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.sr2_wtcnt_value_mask = (0xff << 8),
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.fbb_sel_mask = (0x01 << 2),
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@ -673,9 +672,20 @@ static const struct ti_abb_reg abb_regs_v2 = {
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.opp_sel_mask = (0x03 << 0),
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};
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static const struct ti_abb_reg abb_regs_generic = {
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.sr2_wtcnt_value_mask = (0xff << 8),
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.fbb_sel_mask = (0x01 << 2),
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.rbb_sel_mask = (0x01 << 1),
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.sr2_en_mask = (0x01 << 0),
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.opp_change_mask = (0x01 << 2),
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.opp_sel_mask = (0x03 << 0),
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};
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static const struct of_device_id ti_abb_of_match[] = {
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{.compatible = "ti,abb-v1", .data = &abb_regs_v1},
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{.compatible = "ti,abb-v2", .data = &abb_regs_v2},
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{.compatible = "ti,abb-v3", .data = &abb_regs_generic},
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{ },
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};
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@ -722,11 +732,29 @@ static int ti_abb_probe(struct platform_device *pdev)
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abb->regs = match->data;
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/* Map ABB resources */
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pname = "base-address";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
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abb->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(abb->base))
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return PTR_ERR(abb->base);
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if (abb->regs->setup_off || abb->regs->control_off) {
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pname = "base-address";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
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abb->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(abb->base))
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return PTR_ERR(abb->base);
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abb->setup_reg = abb->base + abb->regs->setup_off;
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abb->control_reg = abb->base + abb->regs->control_off;
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} else {
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pname = "control-address";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
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abb->control_reg = devm_ioremap_resource(dev, res);
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if (IS_ERR(abb->control_reg))
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return PTR_ERR(abb->control_reg);
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pname = "setup-address";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
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abb->setup_reg = devm_ioremap_resource(dev, res);
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if (IS_ERR(abb->setup_reg))
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return PTR_ERR(abb->setup_reg);
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}
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pname = "int-address";
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
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@ -860,7 +888,7 @@ skip_opt:
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platform_set_drvdata(pdev, rdev);
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/* Enable the ldo if not already done by bootloader */
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ti_abb_rmw(abb->regs->sr2_en_mask, 1, abb->regs->setup_reg, abb->base);
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ti_abb_rmw(abb->regs->sr2_en_mask, 1, abb->setup_reg);
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return 0;
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}
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