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drm/amd/powerplay: get raven sclk and mclk levels (v2)

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v2: squash in rebase fix (Tom)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2017-09-26 11:51:58 +08:00 committed by Alex Deucher
parent 88ed3377d0
commit 5f628d997d
1 changed files with 47 additions and 1 deletions
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48
drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
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@ -619,7 +619,53 @@ static int rv_force_clock_level(struct pp_hwmgr *hwmgr,
static int rv_print_clock_levels(struct pp_hwmgr *hwmgr,
enum pp_clock_type type, char *buf)
{
return 0;
struct rv_hwmgr *data = (struct rv_hwmgr *)(hwmgr->backend);
struct rv_voltage_dependency_table *mclk_table =
data->clock_vol_info.vdd_dep_on_fclk;
int i, now, size = 0;
switch (type) {
case PP_SCLK:
PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetGfxclkFrequency),
"Attempt to get current GFXCLK Failed!",
return -1);
PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,
&now),
"Attempt to get current GFXCLK Failed!",
return -1);
size += sprintf(buf + size, "0: %uMhz %s\n",
data->gfx_min_freq_limit / 100,
((data->gfx_min_freq_limit / 100)
== now) ? "*" : "");
size += sprintf(buf + size, "1: %uMhz %s\n",
data->gfx_max_freq_limit / 100,
((data->gfx_max_freq_limit / 100)
== now) ? "*" : "");
break;
case PP_MCLK:
PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetFclkFrequency),
"Attempt to get current MEMCLK Failed!",
return -1);
PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,
&now),
"Attempt to get current MEMCLK Failed!",
return -1);
for (i = 0; i < mclk_table->count; i++)
size += sprintf(buf + size, "%d: %uMhz %s\n",
i,
mclk_table->entries[i].clk / 100,
((mclk_table->entries[i].clk / 100)
== now) ? "*" : "");
break;
default:
break;
}
return size;
}
static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,