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Qualcomm ARM Based Device Tree Updates for v3.18-2

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* Added SDCC nodes on MSM8960/CDP and MSM8660/SURF
 * Added I2C and SDCC4/WLAN on APQ8064/IFC6410
 * Added I2C on MSM8984/DB8074
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Merge tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt

Merge "qcom DT changes for v3.18-2" from Kumar Gala:

Qualcomm ARM Based Device Tree Updates for v3.18-2

* Added SDCC nodes on MSM8960/CDP and MSM8660/SURF
* Added I2C and SDCC4/WLAN on APQ8064/IFC6410
* Added I2C on MSM8984/DB8074

* tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
  ARM: DT: msm8960: Add sdcc nodes
  ARM: DT: msm8660: Add sdcc nodes
  ARM: DT: apq8064: Add i2c device nodes
  ARM: DT: apq8064: add support to sdcc4 for wlan.
  ARM: dts: qcom: Add I2C dt node for MSM8974 and DB8074 board

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-09-23 22:26:19 -07:00
commit 5f0798ce4a
8 changed files with 270 additions and 2 deletions
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31
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
View File

@ -5,6 +5,33 @@
compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
soc {
pinctrl@800000 {
i2c1_pins: i2c1 {
mux {
pins = "gpio20", "gpio21";
function = "gsbi1";
};
};
};
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
i2c@12460000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
eeprom: eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
pagesize = <32>;
};
};
};
gsbi@16600000 {
status = "ok";
qcom,mode = <GSBI_PROT_I2C_UART>;
@ -23,6 +50,10 @@
sdcc3: sdcc@12180000 {
status = "okay";
};
/* WLAN */
sdcc4: sdcc@121c0000 {
status = "okay";
};
};
};
};

80
arch/arm/boot/dts/qcom-apq8064.dtsi
View File

@ -85,6 +85,13 @@
pinctrl-names = "default";
pinctrl-0 = <&ps_hold>;
sdc4_gpios: sdc4-gpios {
pios {
pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
function = "sdc4";
};
};
ps_hold: ps_hold {
mux {
pins = "gpio78";
@ -156,6 +163,48 @@
regulator;
};
gsbi1: gsbi@12440000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
reg = <0x12440000 0x100>;
clocks = <&gcc GSBI1_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c1: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi2: gsbi@12480000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
reg = <0x12480000 0x100>;
clocks = <&gcc GSBI2_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c2: i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
@ -226,6 +275,16 @@
qcom,ee = <0>;
};
sdcc4bam:dma@121c2000{
compatible = "qcom,bam-v1.3.0";
reg = <0x121c2000 0x8000>;
interrupts = <0 95 0>;
clocks = <&gcc SDC4_H_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
@ -268,6 +327,27 @@
dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
dma-names = "tx", "rx";
};
sdcc4: sdcc@121c0000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x121c0000 0x2000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <48000000>;
vmmc-supply = <&vsdcc_fixed>;
vqmmc-supply = <&vsdcc_fixed>;
dmas = <&sdcc4bam 2>, <&sdcc4bam 1>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&sdc4_gpios>;
};
};
};
};

21
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
View File

@ -22,6 +22,13 @@
pinctrl@fd510000 {
i2c11_pins: i2c11 {
mux {
pins = "gpio83", "gpio84";
function = "blsp_i2c11";
};
};
spi8_default: spi8_default {
mosi {
pins = "gpio45";
@ -41,5 +48,19 @@
};
};
};
i2c@f9967000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c11_pins>;
pinctrl-names = "default";
eeprom: eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
pagesize = <32>;
read-only;
};
};
};
};

12
arch/arm/boot/dts/qcom-msm8660-surf.dts
View File

@ -14,6 +14,18 @@
status = "ok";
};
};
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
status = "okay";
};
/* External micro SD card */
sdcc3: sdcc@12180000 {
status = "okay";
};
};
};
};

51
arch/arm/boot/dts/qcom-msm8660.dtsi
View File

@ -2,6 +2,7 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8660.h>
#include <dt-bindings/soc/qcom,gsbi.h>
@ -146,5 +147,55 @@
};
};
};
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sdcc1: sdcc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
reg = <0x12400000 0x8000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <8>;
max-frequency = <48000000>;
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
vmmc-supply = <&vsdcc_fixed>;
};
sdcc3: sdcc@12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x12180000 0x8000>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <48000000>;
no-1-8-v;
vmmc-supply = <&vsdcc_fixed>;
};
};
};
};

12
arch/arm/boot/dts/qcom-msm8960-cdp.dts
View File

@ -14,6 +14,18 @@
status = "ok";
};
};
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
status = "okay";
};
/* External micro SD card */
sdcc3: sdcc@12180000 {
status = "okay";
};
};
};
};

50
arch/arm/boot/dts/qcom-msm8960.dtsi
View File

@ -2,6 +2,7 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/soc/qcom,gsbi.h>
@ -188,5 +189,54 @@
clocks = <&gcc PRNG_CLK>;
clock-names = "core";
};
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sdcc1: sdcc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
reg = <0x12400000 0x8000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <8>;
max-frequency = <96000000>;
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
vmmc-supply = <&vsdcc_fixed>;
};
sdcc3: sdcc@12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x12180000 0x8000>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <192000000>;
no-1-8-v;
vmmc-supply = <&vsdcc_fixed>;
};
};
};
};

15
arch/arm/boot/dts/qcom-msm8974.dtsi
View File

@ -1,8 +1,8 @@
/dts-v1/;
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
#include "skeleton.dtsi"
/ {
model = "Qualcomm MSM8974";
@ -236,5 +236,16 @@
#interrupt-cells = <2>;
interrupts = <0 208 0>;
};
blsp_i2c11: i2c@f9967000 {
status = "disable";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9967000 0x1000>;
interrupts = <0 105 IRQ_TYPE_NONE>;
clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
};
};
};