drm/amd/display: early return when pipe_cnt is 0 in bw validation
[Why] Unintentionally introduced behaviour change from previous refactor, which causes clks to be 0 in no stream cases, which will cause divide by 0. [How] Skip calculation of clocks when no stream. Which is the same as old behaviour. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <tong.cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2022,6 +2022,7 @@ bool dcn20_fast_validate_bw(
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struct dc *dc,
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int *pipe_cnt_out,
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int *pipe_split_from,
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int *vlevel_out)
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{
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@ -2074,6 +2075,8 @@ bool dcn20_fast_validate_bw(
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pipe_cnt = dcn20_populate_dml_pipes_from_context(dc,
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&context->res_ctx, pipes);
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*pipe_cnt_out = pipe_cnt;
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if (!pipe_cnt) {
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out = true;
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goto validate_out;
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@ -2434,7 +2437,10 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
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BW_VAL_TRACE_COUNT();
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out = dcn20_fast_validate_bw(dc, context, pipes, pipe_split_from, &vlevel);
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out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel);
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if (pipe_cnt == 0)
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goto validate_out;
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if (!out)
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goto validate_fail;
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@ -120,6 +120,7 @@ bool dcn20_fast_validate_bw(
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struct dc *dc,
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int *pipe_cnt_out,
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int *pipe_split_from,
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int *vlevel_out);
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void dcn20_calculate_dlg_params(
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