drm/amdgpu/vcn:Always gate vcn block during hw finishing
Under Dynamic Power Gate mode, UVD_STATUS needn't be checked. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -214,7 +214,8 @@ static int vcn_v1_0_hw_fini(void *handle)
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_ring *ring = &adev->vcn.ring_dec;
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if (RREG32_SOC15(VCN, 0, mmUVD_STATUS))
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if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
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RREG32_SOC15(VCN, 0, mmUVD_STATUS))
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vcn_v1_0_set_powergating_state(adev, AMD_PG_STATE_GATE);
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ring->sched.ready = false;
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