powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig
PPC_PIN_TLB options are dedicated to the 8xx, move them into the 8xx Kconfig. While we are at it, add some text to explain what it does. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1ece39fac6312e1d14e6a67b3f9d9f9f91990a7b.1589866984.git.christophe.leroy@csgroup.eu
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@ -1227,26 +1227,6 @@ config TASK_SIZE
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hex "Size of user task space" if TASK_SIZE_BOOL
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default "0x80000000" if PPC_8xx
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default "0xc0000000"
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config PIN_TLB
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bool "Pinned Kernel TLBs (860 ONLY)"
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depends on ADVANCED_OPTIONS && PPC_8xx && \
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!DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
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config PIN_TLB_DATA
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bool "Pinned TLB for DATA"
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depends on PIN_TLB
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default y
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config PIN_TLB_IMMR
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bool "Pinned TLB for IMMR"
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depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
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default y
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config PIN_TLB_TEXT
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bool "Pinned TLB for TEXT"
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depends on PIN_TLB
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default y
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endmenu
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if PPC64
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@ -162,4 +162,45 @@ config UCODE_PATCH
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default y
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depends on !NO_UCODE_PATCH
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menu "8xx advanced setup"
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depends on PPC_8xx
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config PIN_TLB
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bool "Pinned Kernel TLBs"
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depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
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help
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On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each
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table 4 TLBs can be pinned.
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It reduces the amount of usable TLBs to 28 (ie by 12%). That's the
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reason why we make it selectable.
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This option does nothing, it just activate the selection of what
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to pin.
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config PIN_TLB_DATA
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bool "Pinned TLB for DATA"
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depends on PIN_TLB
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default y
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help
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This pins the first 32 Mbytes of memory with 8M pages.
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config PIN_TLB_IMMR
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bool "Pinned TLB for IMMR"
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depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
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default y
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help
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This pins the IMMR area with a 512kbytes page. In case
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CONFIG_PIN_TLB_DATA is also selected, it will reduce
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CONFIG_PIN_TLB_DATA to 24 Mbytes.
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config PIN_TLB_TEXT
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bool "Pinned TLB for TEXT"
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depends on PIN_TLB
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default y
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help
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This pins kernel text with 8M pages.
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endmenu
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endmenu
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