forked from Minki/linux
nvme: implement non-mdts command limits
Commands that access LBA contents without a data transfer between the host historically have not had a spec defined upper limit. The driver set the queue constraints for such commands to the max data transfer size just to be safe, but this artificial constraint frequently limits devices below their capabilities. The NVMe Workgroup ratified TP4040 defines how a controller may advertise their non-MDTS limits. Use these if provided and default to the current constraints if not. Since the Dataset Management command limits are defined in logical blocks, but without a namespace to tell us the logical block size, the code defaults to the safe 512b size. Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
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c881a23fb6
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@ -1948,7 +1948,7 @@ static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
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struct request_queue *queue = disk->queue;
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u32 size = queue_logical_block_size(queue);
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if (!(ctrl->oncs & NVME_CTRL_ONCS_DSM)) {
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if (ctrl->max_discard_sectors == 0) {
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blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue);
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return;
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}
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@ -1966,39 +1966,13 @@ static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
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if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue))
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return;
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blk_queue_max_discard_sectors(queue, UINT_MAX);
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blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
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blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
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blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
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if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
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blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
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}
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static void nvme_config_write_zeroes(struct gendisk *disk, struct nvme_ns *ns)
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{
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u64 max_blocks;
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if (!(ns->ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) ||
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(ns->ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
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return;
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/*
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* Even though NVMe spec explicitly states that MDTS is not
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* applicable to the write-zeroes:- "The restriction does not apply to
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* commands that do not transfer data between the host and the
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* controller (e.g., Write Uncorrectable ro Write Zeroes command).".
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* In order to be more cautious use controller's max_hw_sectors value
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* to configure the maximum sectors for the write-zeroes which is
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* configured based on the controller's MDTS field in the
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* nvme_init_ctrl_finish() if available.
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*/
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if (ns->ctrl->max_hw_sectors == UINT_MAX)
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max_blocks = (u64)USHRT_MAX + 1;
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else
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max_blocks = ns->ctrl->max_hw_sectors + 1;
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blk_queue_max_write_zeroes_sectors(disk->queue,
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nvme_lba_to_sect(ns, max_blocks));
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}
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static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids)
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{
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return !uuid_is_null(&ids->uuid) ||
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@ -2168,7 +2142,8 @@ static void nvme_update_disk_info(struct gendisk *disk,
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set_capacity_and_notify(disk, capacity);
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nvme_config_discard(disk, ns);
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nvme_config_write_zeroes(disk, ns);
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blk_queue_max_write_zeroes_sectors(disk->queue,
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ns->ctrl->max_zeroes_sectors);
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set_disk_ro(disk, (id->nsattr & NVME_NS_ATTR_RO) ||
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test_bit(NVME_NS_FORCE_RO, &ns->flags));
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@ -3072,14 +3047,72 @@ out:
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return 0;
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}
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static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
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{
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u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12;
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return 1 << (units + page_shift - 9);
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}
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static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
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{
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struct nvme_command c = { };
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struct nvme_id_ctrl_nvm *id;
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int ret;
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if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
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ctrl->max_discard_sectors = UINT_MAX;
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ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
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} else {
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ctrl->max_discard_sectors = 0;
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ctrl->max_discard_segments = 0;
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}
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/*
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* Even though NVMe spec explicitly states that MDTS is not applicable
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* to the write-zeroes, we are cautious and limit the size to the
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* controllers max_hw_sectors value, which is based on the MDTS field
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* and possibly other limiting factors.
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*/
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if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
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!(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
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ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
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else
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ctrl->max_zeroes_sectors = 0;
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if (nvme_ctrl_limited_cns(ctrl))
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return 0;
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id = kzalloc(sizeof(*id), GFP_KERNEL);
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if (!id)
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return 0;
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c.identify.opcode = nvme_admin_identify;
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c.identify.cns = NVME_ID_CNS_CS_CTRL;
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c.identify.csi = NVME_CSI_NVM;
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ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
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if (ret)
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goto free_data;
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if (id->dmrl)
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ctrl->max_discard_segments = id->dmrl;
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if (id->dmrsl)
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ctrl->max_discard_sectors = le32_to_cpu(id->dmrsl);
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if (id->wzsl)
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ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
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free_data:
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kfree(id);
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return ret;
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}
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static int nvme_init_identify(struct nvme_ctrl *ctrl)
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{
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struct nvme_id_ctrl *id;
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int ret, page_shift;
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u32 max_hw_sectors;
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bool prev_apst_enabled;
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page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12;
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int ret;
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ret = nvme_identify_ctrl(ctrl, &id);
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if (ret) {
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@ -3136,7 +3169,7 @@ static int nvme_init_identify(struct nvme_ctrl *ctrl)
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atomic_set(&ctrl->abort_limit, id->acl + 1);
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ctrl->vwc = id->vwc;
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if (id->mdts)
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max_hw_sectors = 1 << (id->mdts + page_shift - 9);
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max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
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else
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max_hw_sectors = UINT_MAX;
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ctrl->max_hw_sectors =
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@ -3247,6 +3280,10 @@ int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl)
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if (ret)
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return ret;
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ret = nvme_init_non_mdts_limits(ctrl);
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if (ret < 0)
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return ret;
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ret = nvme_configure_apst(ctrl);
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if (ret < 0)
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return ret;
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@ -4808,6 +4845,7 @@ static inline void _nvme_check_size(void)
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BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
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BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
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BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
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BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
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BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
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BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
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@ -276,6 +276,9 @@ struct nvme_ctrl {
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u32 max_hw_sectors;
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u32 max_segments;
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u32 max_integrity_segments;
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u32 max_discard_sectors;
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u32 max_discard_segments;
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u32 max_zeroes_sectors;
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#ifdef CONFIG_BLK_DEV_ZONED
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u32 max_zone_append;
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#endif
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@ -405,6 +405,16 @@ struct nvme_id_ctrl_zns {
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__u8 rsvd1[4095];
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};
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struct nvme_id_ctrl_nvm {
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__u8 vsl;
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__u8 wzsl;
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__u8 wusl;
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__u8 dmrl;
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__le32 dmrsl;
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__le64 dmsl;
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__u8 rsvd16[4080];
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};
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enum {
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NVME_ID_CNS_NS = 0x00,
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NVME_ID_CNS_CTRL = 0x01,
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