forked from Minki/linux
Updates for KVM/ARM, take 2 including:
- Transparent Huge Pages and hugetlbfs support for KVM/ARM - Yield CPU when guest executes WFE to speed up CPU overcommit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJSZ5NVAAoJEEtpOizt6ddyEJgH+wWw6KWqHlParb+rf04cqCQV Fj3euz+SpYr2U2u0RimgkmeahUiGUhnlBSSH+tkLmt1if6nLawBJbUcIhaZMVdv+ cvS6k+NtK7ibwPOyFeoZCS8taEbVDut2YgrtRKbne6QDLRYBEXFtpY8o6ptLoSu4 ifQCF0FZyElCGLylSxFt9GsK+LjNjQWatVrzoHap9d58u2bma6GYwr4mEzVMHms7 REtTvpwWgsDR5C/69aG8wE4cpJZALH3OeCgy6AccdzTLaQWWpK2YLWz8AFOvoYx6 EsFmBFHZYcuwN+fv2jILgA3Is1oWwqI6k5lL+N3g/oTNNALDSWnfiJkXypJsfow= =2Ijm -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-3.13-2' of git://git.linaro.org/people/cdall/linux-kvm-arm into kvm-queue Updates for KVM/ARM, take 2 including: - Transparent Huge Pages and hugetlbfs support for KVM/ARM - Yield CPU when guest executes WFE to speed up CPU overcommit
This commit is contained in:
commit
5bb3398dd2
@ -57,6 +57,7 @@
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* TSC: Trap SMC
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* TSW: Trap cache operations by set/way
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* TWI: Trap WFI
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* TWE: Trap WFE
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* TIDCP: Trap L2CTLR/L2ECTLR
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* BSU_IS: Upgrade barriers to the inner shareable domain
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* FB: Force broadcast of all maintainance operations
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@ -67,7 +68,7 @@
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*/
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#define HCR_GUEST_MASK (HCR_TSC | HCR_TSW | HCR_TWI | HCR_VM | HCR_BSU_IS | \
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HCR_FB | HCR_TAC | HCR_AMO | HCR_IMO | HCR_FMO | \
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HCR_SWIO | HCR_TIDCP)
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HCR_TWE | HCR_SWIO | HCR_TIDCP)
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#define HCR_VIRT_EXCP_MASK (HCR_VA | HCR_VI | HCR_VF)
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/* System Control Register (SCTLR) bits */
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@ -208,6 +209,8 @@
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#define HSR_EC_DABT (0x24)
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#define HSR_EC_DABT_HYP (0x25)
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#define HSR_WFI_IS_WFE (1U << 0)
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#define HSR_HVC_IMM_MASK ((1UL << 16) - 1)
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#define HSR_DABT_S1PTW (1U << 7)
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@ -62,6 +62,12 @@ phys_addr_t kvm_get_idmap_vector(void);
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int kvm_mmu_init(void);
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void kvm_clear_hyp_idmap(void);
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static inline void kvm_set_pmd(pmd_t *pmd, pmd_t new_pmd)
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{
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*pmd = new_pmd;
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flush_pmd_entry(pmd);
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}
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static inline void kvm_set_pte(pte_t *pte, pte_t new_pte)
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{
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*pte = new_pte;
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@ -103,9 +109,15 @@ static inline void kvm_set_s2pte_writable(pte_t *pte)
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pte_val(*pte) |= L_PTE_S2_RDWR;
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}
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static inline void kvm_set_s2pmd_writable(pmd_t *pmd)
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{
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pmd_val(*pmd) |= L_PMD_S2_RDWR;
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}
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struct kvm;
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static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn)
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static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva,
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unsigned long size)
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{
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/*
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* If we are going to insert an instruction page and the icache is
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@ -120,8 +132,7 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn)
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* need any kind of flushing (DDI 0406C.b - Page B3-1392).
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*/
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if (icache_is_pipt()) {
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unsigned long hva = gfn_to_hva(kvm, gfn);
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__cpuc_coherent_user_range(hva, hva + PAGE_SIZE);
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__cpuc_coherent_user_range(hva, hva + size);
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} else if (!icache_is_vivt_asid_tagged()) {
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/* any kind of VIPT cache */
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__flush_icache_all();
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@ -126,6 +126,8 @@
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#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
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#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
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#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
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/*
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* Hyp-mode PL2 PTE definitions for LPAE.
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*/
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@ -20,6 +20,7 @@ config KVM
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bool "Kernel-based Virtual Machine (KVM) support"
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select PREEMPT_NOTIFIERS
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select ANON_INODES
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select HAVE_KVM_CPU_RELAX_INTERCEPT
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select KVM_MMIO
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select KVM_ARM_HOST
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depends on ARM_VIRT_EXT && ARM_LPAE
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@ -73,23 +73,29 @@ static int handle_dabt_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run)
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}
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/**
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* kvm_handle_wfi - handle a wait-for-interrupts instruction executed by a guest
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* kvm_handle_wfx - handle a WFI or WFE instructions trapped in guests
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* @vcpu: the vcpu pointer
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* @run: the kvm_run structure pointer
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*
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* Simply sets the wait_for_interrupts flag on the vcpu structure, which will
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* halt execution of world-switches and schedule other host processes until
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* there is an incoming IRQ or FIQ to the VM.
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* WFE: Yield the CPU and come back to this vcpu when the scheduler
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* decides to.
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* WFI: Simply call kvm_vcpu_block(), which will halt execution of
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* world-switches and schedule other host processes until there is an
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* incoming IRQ or FIQ to the VM.
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*/
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static int kvm_handle_wfi(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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trace_kvm_wfi(*vcpu_pc(vcpu));
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kvm_vcpu_block(vcpu);
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if (kvm_vcpu_get_hsr(vcpu) & HSR_WFI_IS_WFE)
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kvm_vcpu_on_spin(vcpu);
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else
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kvm_vcpu_block(vcpu);
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return 1;
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}
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static exit_handle_fn arm_exit_handlers[] = {
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[HSR_EC_WFI] = kvm_handle_wfi,
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[HSR_EC_WFI] = kvm_handle_wfx,
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[HSR_EC_CP15_32] = kvm_handle_cp15_32,
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[HSR_EC_CP15_64] = kvm_handle_cp15_64,
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[HSR_EC_CP14_MR] = kvm_handle_cp14_access,
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@ -19,6 +19,7 @@
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#include <linux/mman.h>
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#include <linux/kvm_host.h>
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#include <linux/io.h>
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#include <linux/hugetlb.h>
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#include <trace/events/kvm.h>
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#include <asm/pgalloc.h>
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#include <asm/cacheflush.h>
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@ -41,6 +42,8 @@ static unsigned long hyp_idmap_start;
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static unsigned long hyp_idmap_end;
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static phys_addr_t hyp_idmap_vector;
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#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
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static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
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{
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/*
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@ -93,19 +96,29 @@ static bool page_empty(void *ptr)
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static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
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{
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pmd_t *pmd_table = pmd_offset(pud, 0);
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pud_clear(pud);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pmd_free(NULL, pmd_table);
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if (pud_huge(*pud)) {
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pud_clear(pud);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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} else {
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pmd_t *pmd_table = pmd_offset(pud, 0);
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pud_clear(pud);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pmd_free(NULL, pmd_table);
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}
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put_page(virt_to_page(pud));
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}
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static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
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{
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pte_t *pte_table = pte_offset_kernel(pmd, 0);
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pte_free_kernel(NULL, pte_table);
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if (kvm_pmd_huge(*pmd)) {
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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} else {
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pte_t *pte_table = pte_offset_kernel(pmd, 0);
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pte_free_kernel(NULL, pte_table);
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}
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put_page(virt_to_page(pmd));
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}
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@ -136,18 +149,32 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
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continue;
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}
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if (pud_huge(*pud)) {
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/*
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* If we are dealing with a huge pud, just clear it and
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* move on.
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*/
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clear_pud_entry(kvm, pud, addr);
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addr = pud_addr_end(addr, end);
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continue;
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}
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd)) {
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addr = pmd_addr_end(addr, end);
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continue;
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}
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pte = pte_offset_kernel(pmd, addr);
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clear_pte_entry(kvm, pte, addr);
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next = addr + PAGE_SIZE;
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if (!kvm_pmd_huge(*pmd)) {
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pte = pte_offset_kernel(pmd, addr);
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clear_pte_entry(kvm, pte, addr);
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next = addr + PAGE_SIZE;
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}
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/* If we emptied the pte, walk back up the ladder */
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if (page_empty(pte)) {
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/*
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* If the pmd entry is to be cleared, walk back up the ladder
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*/
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if (kvm_pmd_huge(*pmd) || page_empty(pte)) {
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clear_pmd_entry(kvm, pmd, addr);
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next = pmd_addr_end(addr, end);
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if (page_empty(pmd) && !page_empty(pud)) {
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@ -420,29 +447,71 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
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kvm->arch.pgd = NULL;
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}
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static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
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phys_addr_t addr, const pte_t *new_pte, bool iomap)
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static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
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phys_addr_t addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte, old_pte;
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/* Create 2nd stage page table mapping - Level 1 */
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pgd = kvm->arch.pgd + pgd_index(addr);
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pud = pud_offset(pgd, addr);
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if (pud_none(*pud)) {
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if (!cache)
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return 0; /* ignore calls from kvm_set_spte_hva */
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return NULL;
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pmd = mmu_memory_cache_alloc(cache);
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pud_populate(NULL, pud, pmd);
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get_page(virt_to_page(pud));
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}
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pmd = pmd_offset(pud, addr);
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return pmd_offset(pud, addr);
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}
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/* Create 2nd stage page table mapping - Level 2 */
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static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
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*cache, phys_addr_t addr, const pmd_t *new_pmd)
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{
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pmd_t *pmd, old_pmd;
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pmd = stage2_get_pmd(kvm, cache, addr);
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VM_BUG_ON(!pmd);
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/*
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* Mapping in huge pages should only happen through a fault. If a
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* page is merged into a transparent huge page, the individual
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* subpages of that huge page should be unmapped through MMU
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* notifiers before we get here.
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*
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* Merging of CompoundPages is not supported; they should become
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* splitting first, unmapped, merged, and mapped back in on-demand.
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*/
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VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
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old_pmd = *pmd;
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kvm_set_pmd(pmd, *new_pmd);
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if (pmd_present(old_pmd))
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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else
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get_page(virt_to_page(pmd));
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return 0;
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}
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|
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static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
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phys_addr_t addr, const pte_t *new_pte, bool iomap)
|
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{
|
||||
pmd_t *pmd;
|
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pte_t *pte, old_pte;
|
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|
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/* Create stage-2 page table mapping - Level 1 */
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pmd = stage2_get_pmd(kvm, cache, addr);
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if (!pmd) {
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/*
|
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* Ignore calls from kvm_set_spte_hva for unallocated
|
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* address ranges.
|
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*/
|
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return 0;
|
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}
|
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|
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/* Create stage-2 page mappings - Level 2 */
|
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if (pmd_none(*pmd)) {
|
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if (!cache)
|
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return 0; /* ignore calls from kvm_set_spte_hva */
|
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@ -507,16 +576,60 @@ out:
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return ret;
|
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}
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|
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static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap)
|
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{
|
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pfn_t pfn = *pfnp;
|
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gfn_t gfn = *ipap >> PAGE_SHIFT;
|
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|
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if (PageTransCompound(pfn_to_page(pfn))) {
|
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unsigned long mask;
|
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/*
|
||||
* The address we faulted on is backed by a transparent huge
|
||||
* page. However, because we map the compound huge page and
|
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* not the individual tail page, we need to transfer the
|
||||
* refcount to the head page. We have to be careful that the
|
||||
* THP doesn't start to split while we are adjusting the
|
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* refcounts.
|
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*
|
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* We are sure this doesn't happen, because mmu_notifier_retry
|
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* was successful and we are holding the mmu_lock, so if this
|
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* THP is trying to split, it will be blocked in the mmu
|
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* notifier before touching any of the pages, specifically
|
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* before being able to call __split_huge_page_refcount().
|
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*
|
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* We can therefore safely transfer the refcount from PG_tail
|
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* to PG_head and switch the pfn from a tail page to the head
|
||||
* page accordingly.
|
||||
*/
|
||||
mask = PTRS_PER_PMD - 1;
|
||||
VM_BUG_ON((gfn & mask) != (pfn & mask));
|
||||
if (pfn & mask) {
|
||||
*ipap &= PMD_MASK;
|
||||
kvm_release_pfn_clean(pfn);
|
||||
pfn &= ~mask;
|
||||
kvm_get_pfn(pfn);
|
||||
*pfnp = pfn;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
||||
gfn_t gfn, struct kvm_memory_slot *memslot,
|
||||
struct kvm_memory_slot *memslot,
|
||||
unsigned long fault_status)
|
||||
{
|
||||
pte_t new_pte;
|
||||
pfn_t pfn;
|
||||
int ret;
|
||||
bool write_fault, writable;
|
||||
bool write_fault, writable, hugetlb = false, force_pte = false;
|
||||
unsigned long mmu_seq;
|
||||
gfn_t gfn = fault_ipa >> PAGE_SHIFT;
|
||||
unsigned long hva = gfn_to_hva(vcpu->kvm, gfn);
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
|
||||
struct vm_area_struct *vma;
|
||||
pfn_t pfn;
|
||||
|
||||
write_fault = kvm_is_write_fault(kvm_vcpu_get_hsr(vcpu));
|
||||
if (fault_status == FSC_PERM && !write_fault) {
|
||||
@ -524,6 +637,26 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
/* Let's check if we will get back a huge page backed by hugetlbfs */
|
||||
down_read(¤t->mm->mmap_sem);
|
||||
vma = find_vma_intersection(current->mm, hva, hva + 1);
|
||||
if (is_vm_hugetlb_page(vma)) {
|
||||
hugetlb = true;
|
||||
gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
|
||||
} else {
|
||||
/*
|
||||
* Pages belonging to VMAs not aligned to the PMD mapping
|
||||
* granularity cannot be mapped using block descriptors even
|
||||
* if the pages belong to a THP for the process, because the
|
||||
* stage-2 block descriptor will cover more than a single THP
|
||||
* and we loose atomicity for unmapping, updates, and splits
|
||||
* of the THP or other pages in the stage-2 block range.
|
||||
*/
|
||||
if (vma->vm_start & ~PMD_MASK)
|
||||
force_pte = true;
|
||||
}
|
||||
up_read(¤t->mm->mmap_sem);
|
||||
|
||||
/* We need minimum second+third level pages */
|
||||
ret = mmu_topup_memory_cache(memcache, 2, KVM_NR_MEM_OBJS);
|
||||
if (ret)
|
||||
@ -541,26 +674,40 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
||||
*/
|
||||
smp_rmb();
|
||||
|
||||
pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write_fault, &writable);
|
||||
pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
|
||||
if (is_error_pfn(pfn))
|
||||
return -EFAULT;
|
||||
|
||||
new_pte = pfn_pte(pfn, PAGE_S2);
|
||||
coherent_icache_guest_page(vcpu->kvm, gfn);
|
||||
|
||||
spin_lock(&vcpu->kvm->mmu_lock);
|
||||
if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
if (mmu_notifier_retry(kvm, mmu_seq))
|
||||
goto out_unlock;
|
||||
if (writable) {
|
||||
kvm_set_s2pte_writable(&new_pte);
|
||||
kvm_set_pfn_dirty(pfn);
|
||||
if (!hugetlb && !force_pte)
|
||||
hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
|
||||
|
||||
if (hugetlb) {
|
||||
pmd_t new_pmd = pfn_pmd(pfn, PAGE_S2);
|
||||
new_pmd = pmd_mkhuge(new_pmd);
|
||||
if (writable) {
|
||||
kvm_set_s2pmd_writable(&new_pmd);
|
||||
kvm_set_pfn_dirty(pfn);
|
||||
}
|
||||
coherent_icache_guest_page(kvm, hva & PMD_MASK, PMD_SIZE);
|
||||
ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
|
||||
} else {
|
||||
pte_t new_pte = pfn_pte(pfn, PAGE_S2);
|
||||
if (writable) {
|
||||
kvm_set_s2pte_writable(&new_pte);
|
||||
kvm_set_pfn_dirty(pfn);
|
||||
}
|
||||
coherent_icache_guest_page(kvm, hva, PAGE_SIZE);
|
||||
ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, false);
|
||||
}
|
||||
stage2_set_pte(vcpu->kvm, memcache, fault_ipa, &new_pte, false);
|
||||
|
||||
|
||||
out_unlock:
|
||||
spin_unlock(&vcpu->kvm->mmu_lock);
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
kvm_release_pfn_clean(pfn);
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -629,7 +776,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
||||
|
||||
memslot = gfn_to_memslot(vcpu->kvm, gfn);
|
||||
|
||||
ret = user_mem_abort(vcpu, fault_ipa, gfn, memslot, fault_status);
|
||||
ret = user_mem_abort(vcpu, fault_ipa, memslot, fault_status);
|
||||
if (ret == 0)
|
||||
ret = 1;
|
||||
out_unlock:
|
||||
|
@ -91,6 +91,7 @@ int kvm_mmu_init(void);
|
||||
void kvm_clear_hyp_idmap(void);
|
||||
|
||||
#define kvm_set_pte(ptep, pte) set_pte(ptep, pte)
|
||||
#define kvm_set_pmd(pmdp, pmd) set_pmd(pmdp, pmd)
|
||||
|
||||
static inline bool kvm_is_write_fault(unsigned long esr)
|
||||
{
|
||||
@ -116,13 +117,18 @@ static inline void kvm_set_s2pte_writable(pte_t *pte)
|
||||
pte_val(*pte) |= PTE_S2_RDWR;
|
||||
}
|
||||
|
||||
static inline void kvm_set_s2pmd_writable(pmd_t *pmd)
|
||||
{
|
||||
pmd_val(*pmd) |= PMD_S2_RDWR;
|
||||
}
|
||||
|
||||
struct kvm;
|
||||
|
||||
static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn)
|
||||
static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva,
|
||||
unsigned long size)
|
||||
{
|
||||
if (!icache_is_aliasing()) { /* PIPT */
|
||||
unsigned long hva = gfn_to_hva(kvm, gfn);
|
||||
flush_icache_range(hva, hva + PAGE_SIZE);
|
||||
flush_icache_range(hva, hva + size);
|
||||
} else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */
|
||||
/* any kind of VIPT cache */
|
||||
__flush_icache_all();
|
||||
|
@ -85,6 +85,8 @@
|
||||
#define PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[2:1] */
|
||||
#define PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
|
||||
|
||||
#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
|
||||
|
||||
/*
|
||||
* Memory Attribute override for Stage-2 (MemAttr[3:0])
|
||||
*/
|
||||
|
Loading…
Reference in New Issue
Block a user