forked from Minki/linux
misc: pci_endpoint_test: Add support to test PCI EP in AM654x
TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to application registers. "PCIe Inbound Address Translation" section in AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 as reserved. Configure pci_endpoint_test to use BAR_2 instead. Also set alignment to 64K since "PCIe Subsystem Address Translation" section in TRM indicates minimum ATU window size is 64K. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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@ -75,6 +75,11 @@
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#define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
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#define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
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#define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
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#define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
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#define PCI_DEVICE_ID_TI_AM654 0xb00c
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#define is_am654_pci_dev(pdev) \
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((pdev)->device == PCI_DEVICE_ID_TI_AM654)
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static DEFINE_IDA(pci_endpoint_test_ida);
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static DEFINE_IDA(pci_endpoint_test_ida);
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#define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
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#define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
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@ -588,6 +593,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
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int ret = -EINVAL;
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int ret = -EINVAL;
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enum pci_barno bar;
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enum pci_barno bar;
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struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
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struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
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struct pci_dev *pdev = test->pdev;
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mutex_lock(&test->mutex);
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mutex_lock(&test->mutex);
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switch (cmd) {
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switch (cmd) {
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@ -595,6 +601,8 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
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bar = arg;
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bar = arg;
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if (bar < 0 || bar > 5)
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if (bar < 0 || bar > 5)
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goto ret;
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goto ret;
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if (is_am654_pci_dev(pdev) && bar == BAR_0)
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goto ret;
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ret = pci_endpoint_test_bar(test, bar);
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ret = pci_endpoint_test_bar(test, bar);
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break;
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break;
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case PCITEST_LEGACY_IRQ:
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case PCITEST_LEGACY_IRQ:
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@ -785,11 +793,20 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
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pci_disable_device(pdev);
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pci_disable_device(pdev);
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}
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}
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static const struct pci_endpoint_test_data am654_data = {
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.test_reg_bar = BAR_2,
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.alignment = SZ_64K,
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.irq_type = IRQ_TYPE_MSI,
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};
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static const struct pci_device_id pci_endpoint_test_tbl[] = {
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static const struct pci_device_id pci_endpoint_test_tbl[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) },
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{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) },
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{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) },
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{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) },
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{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
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{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
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{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) },
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{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) },
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{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
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.driver_data = (kernel_ulong_t)&am654_data
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},
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{ }
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{ }
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};
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};
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MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
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MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
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