forked from Minki/linux
Merge tag 'drm-intel-fixes-2015-12-23' of git://anongit.freedesktop.org/drm-intel
Pull i915 drm fixes from Jani Nikula: "Here's a batch of i915 fixes all around. It may be slightly bigger than one would hope for at this stage, but they've all been through testing in our -next before being picked up for v4.4. Also, I missed Dave's fixes pull earlier today just because I wanted an extra testing round on this. So I'm fairly confident. Wishing you all the things it is customary to wish this time of the year" * tag 'drm-intel-fixes-2015-12-23' of git://anongit.freedesktop.org/drm-intel: drm/i915: Correct max delay for HDMI hotplug live status checking drm/i915: mdelay(10) considered harmful drm/i915: Kill intel_crtc->cursor_bo drm/i915: Workaround CHV pipe C cursor fail drm/i915: Only spin whilst waiting on the current request drm/i915: Limit the busy wait on requests to 5us not 10ms! drm/i915: Break busywaiting for requests on pending signals drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2) drm/i915: Set the map-and-fenceable flag for preallocated objects drm/i915: Drop the broken cursor base==0 special casing
This commit is contained in:
Linus Torvalds
commit
5b726e06d6
@ -2193,8 +2193,17 @@ struct drm_i915_gem_request {
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struct drm_i915_private *i915;
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struct intel_engine_cs *ring;
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/** GEM sequence number associated with this request. */
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uint32_t seqno;
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/** GEM sequence number associated with the previous request,
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* when the HWS breadcrumb is equal to this the GPU is processing
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* this request.
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*/
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u32 previous_seqno;
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/** GEM sequence number associated with this request,
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* when the HWS breadcrumb is equal or greater than this the GPU
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* has finished processing this request.
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*/
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u32 seqno;
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/** Position in the ringbuffer of the start of the request */
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u32 head;
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@ -2839,6 +2848,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
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int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
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u32 flags);
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void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
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int __must_check i915_vma_unbind(struct i915_vma *vma);
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/*
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* BEWARE: Do not use the function below unless you can _absolutely_
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@ -2910,15 +2920,17 @@ i915_seqno_passed(uint32_t seq1, uint32_t seq2)
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return (int32_t)(seq1 - seq2) >= 0;
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}
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static inline bool i915_gem_request_started(struct drm_i915_gem_request *req,
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bool lazy_coherency)
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{
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u32 seqno = req->ring->get_seqno(req->ring, lazy_coherency);
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return i915_seqno_passed(seqno, req->previous_seqno);
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}
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static inline bool i915_gem_request_completed(struct drm_i915_gem_request *req,
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bool lazy_coherency)
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{
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u32 seqno;
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BUG_ON(req == NULL);
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seqno = req->ring->get_seqno(req->ring, lazy_coherency);
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u32 seqno = req->ring->get_seqno(req->ring, lazy_coherency);
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return i915_seqno_passed(seqno, req->seqno);
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}
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@ -1146,23 +1146,74 @@ static bool missed_irq(struct drm_i915_private *dev_priv,
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return test_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings);
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}
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static int __i915_spin_request(struct drm_i915_gem_request *req)
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static unsigned long local_clock_us(unsigned *cpu)
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{
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unsigned long t;
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/* Cheaply and approximately convert from nanoseconds to microseconds.
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* The result and subsequent calculations are also defined in the same
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* approximate microseconds units. The principal source of timing
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* error here is from the simple truncation.
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*
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* Note that local_clock() is only defined wrt to the current CPU;
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* the comparisons are no longer valid if we switch CPUs. Instead of
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* blocking preemption for the entire busywait, we can detect the CPU
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* switch and use that as indicator of system load and a reason to
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* stop busywaiting, see busywait_stop().
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*/
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*cpu = get_cpu();
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t = local_clock() >> 10;
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put_cpu();
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return t;
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}
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static bool busywait_stop(unsigned long timeout, unsigned cpu)
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{
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unsigned this_cpu;
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if (time_after(local_clock_us(&this_cpu), timeout))
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return true;
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return this_cpu != cpu;
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}
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static int __i915_spin_request(struct drm_i915_gem_request *req, int state)
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{
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unsigned long timeout;
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unsigned cpu;
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if (i915_gem_request_get_ring(req)->irq_refcount)
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/* When waiting for high frequency requests, e.g. during synchronous
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* rendering split between the CPU and GPU, the finite amount of time
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* required to set up the irq and wait upon it limits the response
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* rate. By busywaiting on the request completion for a short while we
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* can service the high frequency waits as quick as possible. However,
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* if it is a slow request, we want to sleep as quickly as possible.
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* The tradeoff between waiting and sleeping is roughly the time it
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* takes to sleep on a request, on the order of a microsecond.
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*/
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if (req->ring->irq_refcount)
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return -EBUSY;
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timeout = jiffies + 1;
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/* Only spin if we know the GPU is processing this request */
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if (!i915_gem_request_started(req, true))
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return -EAGAIN;
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timeout = local_clock_us(&cpu) + 5;
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while (!need_resched()) {
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if (i915_gem_request_completed(req, true))
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return 0;
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if (time_after_eq(jiffies, timeout))
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if (signal_pending_state(state, current))
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break;
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if (busywait_stop(timeout, cpu))
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break;
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cpu_relax_lowlatency();
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}
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if (i915_gem_request_completed(req, false))
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return 0;
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@ -1197,6 +1248,7 @@ int __i915_wait_request(struct drm_i915_gem_request *req,
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struct drm_i915_private *dev_priv = dev->dev_private;
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const bool irq_test_in_progress =
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ACCESS_ONCE(dev_priv->gpu_error.test_irq_rings) & intel_ring_flag(ring);
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int state = interruptible ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE;
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DEFINE_WAIT(wait);
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unsigned long timeout_expire;
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s64 before, now;
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@ -1229,7 +1281,7 @@ int __i915_wait_request(struct drm_i915_gem_request *req,
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before = ktime_get_raw_ns();
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/* Optimistic spin for the next jiffie before touching IRQs */
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ret = __i915_spin_request(req);
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ret = __i915_spin_request(req, state);
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if (ret == 0)
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goto out;
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@ -1241,8 +1293,7 @@ int __i915_wait_request(struct drm_i915_gem_request *req,
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for (;;) {
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struct timer_list timer;
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prepare_to_wait(&ring->irq_queue, &wait,
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interruptible ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
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prepare_to_wait(&ring->irq_queue, &wait, state);
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/* We need to check whether any gpu reset happened in between
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* the caller grabbing the seqno and now ... */
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@ -1260,7 +1311,7 @@ int __i915_wait_request(struct drm_i915_gem_request *req,
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break;
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}
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if (interruptible && signal_pending(current)) {
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if (signal_pending_state(state, current)) {
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ret = -ERESTARTSYS;
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break;
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}
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@ -2554,6 +2605,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
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request->batch_obj = obj;
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request->emitted_jiffies = jiffies;
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request->previous_seqno = ring->last_submitted_seqno;
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ring->last_submitted_seqno = request->seqno;
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list_add_tail(&request->list, &ring->request_list);
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@ -4080,6 +4132,29 @@ i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags)
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return false;
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}
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void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
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{
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struct drm_i915_gem_object *obj = vma->obj;
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bool mappable, fenceable;
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u32 fence_size, fence_alignment;
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fence_size = i915_gem_get_gtt_size(obj->base.dev,
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obj->base.size,
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obj->tiling_mode);
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fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
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obj->base.size,
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obj->tiling_mode,
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true);
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fenceable = (vma->node.size == fence_size &&
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(vma->node.start & (fence_alignment - 1)) == 0);
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mappable = (vma->node.start + fence_size <=
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to_i915(obj->base.dev)->gtt.mappable_end);
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obj->map_and_fenceable = mappable && fenceable;
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}
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static int
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i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
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struct i915_address_space *vm,
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@ -4147,25 +4222,7 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
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if (ggtt_view && ggtt_view->type == I915_GGTT_VIEW_NORMAL &&
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(bound ^ vma->bound) & GLOBAL_BIND) {
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bool mappable, fenceable;
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u32 fence_size, fence_alignment;
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fence_size = i915_gem_get_gtt_size(obj->base.dev,
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obj->base.size,
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obj->tiling_mode);
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fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
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obj->base.size,
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obj->tiling_mode,
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true);
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fenceable = (vma->node.size == fence_size &&
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(vma->node.start & (fence_alignment - 1)) == 0);
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mappable = (vma->node.start + fence_size <=
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dev_priv->gtt.mappable_end);
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obj->map_and_fenceable = mappable && fenceable;
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__i915_vma_set_map_and_fenceable(vma);
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WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
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}
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@ -2676,6 +2676,7 @@ static int i915_gem_setup_global_gtt(struct drm_device *dev,
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return ret;
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}
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vma->bound |= GLOBAL_BIND;
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__i915_vma_set_map_and_fenceable(vma);
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list_add_tail(&vma->mm_list, &ggtt_vm->inactive_list);
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}
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@ -687,6 +687,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
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}
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vma->bound |= GLOBAL_BIND;
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__i915_vma_set_map_and_fenceable(vma);
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list_add_tail(&vma->mm_list, &ggtt->inactive_list);
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}
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@ -116,6 +116,7 @@ static void skylake_pfit_enable(struct intel_crtc *crtc);
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static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
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static void ironlake_pfit_enable(struct intel_crtc *crtc);
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static void intel_modeset_setup_hw_state(struct drm_device *dev);
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static void intel_pre_disable_primary(struct drm_crtc *crtc);
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typedef struct {
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int min, max;
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@ -2607,6 +2608,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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struct drm_i915_gem_object *obj;
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struct drm_plane *primary = intel_crtc->base.primary;
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struct drm_plane_state *plane_state = primary->state;
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struct drm_crtc_state *crtc_state = intel_crtc->base.state;
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struct intel_plane *intel_plane = to_intel_plane(primary);
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struct drm_framebuffer *fb;
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if (!plane_config->fb)
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@ -2643,6 +2646,18 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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}
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}
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/*
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* We've failed to reconstruct the BIOS FB. Current display state
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* indicates that the primary plane is visible, but has a NULL FB,
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* which will lead to problems later if we don't fix it up. The
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* simplest solution is to just disable the primary plane now and
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* pretend the BIOS never had it enabled.
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*/
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to_intel_plane_state(plane_state)->visible = false;
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crtc_state->plane_mask &= ~(1 << drm_plane_index(primary));
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intel_pre_disable_primary(&intel_crtc->base);
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intel_plane->disable_plane(primary, &intel_crtc->base);
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return;
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valid_fb:
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@ -9910,14 +9925,14 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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return true;
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}
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static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
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static void i845_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
|
||||
{
|
||||
struct drm_device *dev = crtc->dev;
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||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
uint32_t cntl = 0, size = 0;
|
||||
|
||||
if (base) {
|
||||
if (on) {
|
||||
unsigned int width = intel_crtc->base.cursor->state->crtc_w;
|
||||
unsigned int height = intel_crtc->base.cursor->state->crtc_h;
|
||||
unsigned int stride = roundup_pow_of_two(width) * 4;
|
||||
@ -9972,16 +9987,15 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
|
||||
}
|
||||
}
|
||||
|
||||
static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
|
||||
static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
|
||||
{
|
||||
struct drm_device *dev = crtc->dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
int pipe = intel_crtc->pipe;
|
||||
uint32_t cntl;
|
||||
uint32_t cntl = 0;
|
||||
|
||||
cntl = 0;
|
||||
if (base) {
|
||||
if (on) {
|
||||
cntl = MCURSOR_GAMMA_ENABLE;
|
||||
switch (intel_crtc->base.cursor->state->crtc_w) {
|
||||
case 64:
|
||||
@ -10032,18 +10046,17 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
|
||||
int y = cursor_state->crtc_y;
|
||||
u32 base = 0, pos = 0;
|
||||
|
||||
if (on)
|
||||
base = intel_crtc->cursor_addr;
|
||||
|
||||
if (x >= intel_crtc->config->pipe_src_w)
|
||||
base = 0;
|
||||
on = false;
|
||||
|
||||
if (y >= intel_crtc->config->pipe_src_h)
|
||||
base = 0;
|
||||
on = false;
|
||||
|
||||
if (x < 0) {
|
||||
if (x + cursor_state->crtc_w <= 0)
|
||||
base = 0;
|
||||
on = false;
|
||||
|
||||
pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
|
||||
x = -x;
|
||||
@ -10052,16 +10065,13 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
|
||||
|
||||
if (y < 0) {
|
||||
if (y + cursor_state->crtc_h <= 0)
|
||||
base = 0;
|
||||
on = false;
|
||||
|
||||
pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
|
||||
y = -y;
|
||||
}
|
||||
pos |= y << CURSOR_Y_SHIFT;
|
||||
|
||||
if (base == 0 && intel_crtc->cursor_base == 0)
|
||||
return;
|
||||
|
||||
I915_WRITE(CURPOS(pipe), pos);
|
||||
|
||||
/* ILK+ do this automagically */
|
||||
@ -10072,9 +10082,9 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
|
||||
}
|
||||
|
||||
if (IS_845G(dev) || IS_I865G(dev))
|
||||
i845_update_cursor(crtc, base);
|
||||
i845_update_cursor(crtc, base, on);
|
||||
else
|
||||
i9xx_update_cursor(crtc, base);
|
||||
i9xx_update_cursor(crtc, base, on);
|
||||
}
|
||||
|
||||
static bool cursor_size_ok(struct drm_device *dev,
|
||||
@ -13718,6 +13728,7 @@ intel_check_cursor_plane(struct drm_plane *plane,
|
||||
struct drm_crtc *crtc = crtc_state->base.crtc;
|
||||
struct drm_framebuffer *fb = state->base.fb;
|
||||
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
|
||||
enum pipe pipe = to_intel_plane(plane)->pipe;
|
||||
unsigned stride;
|
||||
int ret;
|
||||
|
||||
@ -13751,6 +13762,22 @@ intel_check_cursor_plane(struct drm_plane *plane,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* There's something wrong with the cursor on CHV pipe C.
|
||||
* If it straddles the left edge of the screen then
|
||||
* moving it away from the edge or disabling it often
|
||||
* results in a pipe underrun, and often that can lead to
|
||||
* dead pipe (constant underrun reported, and it scans
|
||||
* out just a solid color). To recover from that, the
|
||||
* display power well must be turned off and on again.
|
||||
* Refuse the put the cursor into that compromised position.
|
||||
*/
|
||||
if (IS_CHERRYVIEW(plane->dev) && pipe == PIPE_C &&
|
||||
state->visible && state->base.crtc_x < 0) {
|
||||
DRM_DEBUG_KMS("CHV cursor C not allowed to straddle the left screen edge\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -13774,9 +13801,6 @@ intel_commit_cursor_plane(struct drm_plane *plane,
|
||||
crtc = crtc ? crtc : plane->crtc;
|
||||
intel_crtc = to_intel_crtc(crtc);
|
||||
|
||||
if (intel_crtc->cursor_bo == obj)
|
||||
goto update;
|
||||
|
||||
if (!obj)
|
||||
addr = 0;
|
||||
else if (!INTEL_INFO(dev)->cursor_needs_physical)
|
||||
@ -13785,9 +13809,7 @@ intel_commit_cursor_plane(struct drm_plane *plane,
|
||||
addr = obj->phys_handle->busaddr;
|
||||
|
||||
intel_crtc->cursor_addr = addr;
|
||||
intel_crtc->cursor_bo = obj;
|
||||
|
||||
update:
|
||||
if (crtc->state->active)
|
||||
intel_crtc_update_cursor(crtc, state->visible);
|
||||
}
|
||||
|
||||
@ -550,7 +550,6 @@ struct intel_crtc {
|
||||
int adjusted_x;
|
||||
int adjusted_y;
|
||||
|
||||
struct drm_i915_gem_object *cursor_bo;
|
||||
uint32_t cursor_addr;
|
||||
uint32_t cursor_cntl;
|
||||
uint32_t cursor_size;
|
||||
|
||||
@ -1374,17 +1374,18 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
|
||||
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
|
||||
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
||||
bool live_status = false;
|
||||
unsigned int retry = 3;
|
||||
unsigned int try;
|
||||
|
||||
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
|
||||
connector->base.id, connector->name);
|
||||
|
||||
intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
|
||||
|
||||
while (!live_status && --retry) {
|
||||
for (try = 0; !live_status && try < 4; try++) {
|
||||
if (try)
|
||||
msleep(10);
|
||||
live_status = intel_digital_port_connected(dev_priv,
|
||||
hdmi_to_dig_port(intel_hdmi));
|
||||
mdelay(10);
|
||||
}
|
||||
|
||||
if (!live_status)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user