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cxl/pci: Simplify register setup

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It is desirable to retain the mappings from the calling function. By
simplifying this code, it will be much more straightforward to do that.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20210716231548.174778-3-ben.widawsky@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Ben Widawsky 2021-07-16 16:15:47 -07:00 committed by Dan Williams
parent 1e39db573e
commit 5b68705d1e
3 changed files with 13 additions and 27 deletions
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1
drivers/cxl/cxl.h
View File

@ -140,7 +140,6 @@ struct cxl_device_reg_map {
};
struct cxl_register_map {
struct list_head list;
u64 block_offset;
u8 reg_type;
u8 barno;

38
drivers/cxl/pci.c
View File

@ -1091,9 +1091,8 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
struct device *dev = &pdev->dev;
u32 regloc_size, regblocks;
void __iomem *base;
int regloc, i;
struct cxl_register_map *map, *n;
LIST_HEAD(register_maps);
int regloc, i, n_maps;
struct cxl_register_map *map, maps[CXL_REGLOC_RBI_TYPES];
int ret = 0;
regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
@ -1112,7 +1111,7 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
regloc += PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET;
regblocks = (regloc_size - PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET) / 8;
for (i = 0; i < regblocks; i++, regloc += 8) {
for (i = 0, n_maps = 0; i < regblocks; i++, regloc += 8) {
u32 reg_lo, reg_hi;
u8 reg_type;
u64 offset;
@ -1131,20 +1130,11 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
if (reg_type > CXL_REGLOC_RBI_MEMDEV)
continue;
map = kzalloc(sizeof(*map), GFP_KERNEL);
if (!map) {
ret = -ENOMEM;
goto free_maps;
}
list_add(&map->list, &register_maps);
base = cxl_mem_map_regblock(cxlm, bar, offset);
if (!base) {
ret = -ENOMEM;
goto free_maps;
}
if (!base)
return -ENOMEM;
map = &maps[n_maps];
map->barno = bar;
map->block_offset = offset;
map->reg_type = reg_type;
@ -1155,21 +1145,17 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
cxl_mem_unmap_regblock(cxlm, base);
if (ret)
goto free_maps;
return ret;
n_maps++;
}
pci_release_mem_regions(pdev);
list_for_each_entry(map, &register_maps, list) {
ret = cxl_map_regs(cxlm, map);
for (i = 0; i < n_maps; i++) {
ret = cxl_map_regs(cxlm, &maps[i]);
if (ret)
goto free_maps;
}
free_maps:
list_for_each_entry_safe(map, n, &register_maps, list) {
list_del(&map->list);
kfree(map);
break;
}
return ret;

1
drivers/cxl/pci.h
View File

@ -25,6 +25,7 @@
#define CXL_REGLOC_RBI_COMPONENT 1
#define CXL_REGLOC_RBI_VIRT 2
#define CXL_REGLOC_RBI_MEMDEV 3
#define CXL_REGLOC_RBI_TYPES CXL_REGLOC_RBI_MEMDEV + 1
#define CXL_REGLOC_ADDR_MASK GENMASK(31, 16)