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arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode

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USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree
nodes accordingly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210331151614.3810197-7-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Dmitry Baryshkov 2021-03-31 18:16:13 +03:00 committed by Bjorn Andersson
parent fa245b3f06
commit 5aa0d1becd
1 changed files with 18 additions and 5 deletions
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23
arch/arm64/boot/dts/qcom/sm8250.dtsi
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@ -2058,12 +2058,11 @@
};
usb_1_qmpphy: phy@88e9000 {
compatible = "qcom,sm8250-qmp-usb3-phy";
compatible = "qcom,sm8250-qmp-usb3-dp-phy";
reg = <0 0x088e9000 0 0x200>,
<0 0x088e8000 0 0x20>;
reg-names = "reg-base", "dp_com";
<0 0x088e8000 0 0x40>,
<0 0x088ea000 0 0x200>;
status = "disabled";
#clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@ -2077,7 +2076,7 @@
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "phy", "common";
usb_1_ssphy: lanes@88e9200 {
usb_1_ssphy: usb3-phy@88e9200 {
reg = <0 0x088e9200 0 0x200>,
<0 0x088e9400 0 0x200>,
<0 0x088e9c00 0 0x400>,
@ -2089,6 +2088,20 @@
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
};
dp_phy: dp-phy@88ea200 {
reg = <0 0x088ea200 0 0x200>,
<0 0x088ea400 0 0x200>,
<0 0x088eac00 0 0x400>,
<0 0x088ea600 0 0x200>,
<0 0x088ea800 0 0x200>,
<0 0x088eaa00 0 0x100>;
#phy-cells = <0>;
#clock-cells = <1>;
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
};
};
usb_2_qmpphy: phy@88eb000 {