forked from Minki/linux
powerpc/pseries: PCIE PHB reset
Several device drivers hit EEH(Extended Error handling) when triggering kdump on Pseries PowerVM. This patch implemented a reset of the PHBs in pci general code when triggering kdump. PHB reset stop all PCI transactions from normal kernel. We have tested the patch in several enviroments: - direct slot adapters - adapters under the switch - a VF adapter in PowerVM - a VF adapter/adapter in KVM guest. Signed-off-by: Wen Xiong <wenxiong@linux.vnet.ibm.com> [mpe: Fix broken whitespace, subject & SOB formatting] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1594651173-32166-1-git-send-email-wenxiong@linux.vnet.ibm.com
This commit is contained in:
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2384b36f91
commit
5a090f7c36
@ -24,6 +24,7 @@
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <linux/crash_dump.h>
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#include <asm/eeh.h>
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#include <asm/eeh_event.h>
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@ -80,6 +81,152 @@ void pseries_pcibios_bus_add_device(struct pci_dev *pdev)
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eeh_probe_device(pdev);
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}
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/**
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* pseries_eeh_get_config_addr - Retrieve config address
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*
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* Retrieve the assocated config address. Actually, there're 2 RTAS
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* function calls dedicated for the purpose. We need implement
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* it through the new function and then the old one. Besides,
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* you should make sure the config address is figured out from
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* FDT node before calling the function.
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*
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* It's notable that zero'ed return value means invalid PE config
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* address.
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*/
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static int pseries_eeh_get_config_addr(struct pci_controller *phb, int config_addr)
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{
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int ret = 0;
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int rets[3];
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if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
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/*
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* First of all, we need to make sure there has one PE
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* associated with the device. Otherwise, PE address is
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* meaningless.
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*/
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ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid), 1);
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if (ret || (rets[0] == 0))
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return 0;
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/* Retrieve the associated PE config address */
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ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid), 0);
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if (ret) {
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pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
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__func__, phb->global_number, config_addr);
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return 0;
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}
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return rets[0];
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}
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if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
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ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid), 0);
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if (ret) {
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pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
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__func__, phb->global_number, config_addr);
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return 0;
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}
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return rets[0];
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}
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return ret;
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}
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/**
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* pseries_eeh_phb_reset - Reset the specified PHB
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* @phb: PCI controller
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* @config_adddr: the associated config address
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* @option: reset option
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*
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* Reset the specified PHB/PE
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*/
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static int pseries_eeh_phb_reset(struct pci_controller *phb, int config_addr, int option)
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{
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int ret;
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/* Reset PE through RTAS call */
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ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid), option);
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/* If fundamental-reset not supported, try hot-reset */
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if (option == EEH_RESET_FUNDAMENTAL &&
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ret == -8) {
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option = EEH_RESET_HOT;
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ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid), option);
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}
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/* We need reset hold or settlement delay */
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if (option == EEH_RESET_FUNDAMENTAL ||
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option == EEH_RESET_HOT)
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msleep(EEH_PE_RST_HOLD_TIME);
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else
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msleep(EEH_PE_RST_SETTLE_TIME);
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return ret;
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}
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/**
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* pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE
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* @phb: PCI controller
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* @config_adddr: the associated config address
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*
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* The function will be called to reconfigure the bridges included
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* in the specified PE so that the mulfunctional PE would be recovered
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* again.
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*/
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static int pseries_eeh_phb_configure_bridge(struct pci_controller *phb, int config_addr)
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{
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int ret;
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/* Waiting 0.2s maximum before skipping configuration */
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int max_wait = 200;
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while (max_wait > 0) {
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ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
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config_addr, BUID_HI(phb->buid),
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BUID_LO(phb->buid));
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if (!ret)
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return ret;
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if (ret < 0)
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break;
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/*
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* If RTAS returns a delay value that's above 100ms, cut it
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* down to 100ms in case firmware made a mistake. For more
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* on how these delay values work see rtas_busy_delay_time
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*/
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if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
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ret <= RTAS_EXTENDED_DELAY_MAX)
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ret = RTAS_EXTENDED_DELAY_MIN+2;
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max_wait -= rtas_busy_delay_time(ret);
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if (max_wait < 0)
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break;
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rtas_busy_delay(ret);
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}
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pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n",
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__func__, phb->global_number, config_addr, ret);
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/* PAPR defines -3 as "Parameter Error" for this function: */
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if (ret == -3)
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return -EINVAL;
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else
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return -EIO;
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}
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/*
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* Buffer for reporting slot-error-detail rtas calls. Its here
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* in BSS, and not dynamically alloced, so that it ends up in
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@ -96,6 +243,10 @@ static int eeh_error_buf_size;
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*/
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static int pseries_eeh_init(void)
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{
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struct pci_controller *phb;
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struct pci_dn *pdn;
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int addr, config_addr;
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/* figure out EEH RTAS function call tokens */
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ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
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ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
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@ -148,6 +299,22 @@ static int pseries_eeh_init(void)
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/* Set EEH machine dependent code */
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ppc_md.pcibios_bus_add_device = pseries_pcibios_bus_add_device;
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if (is_kdump_kernel() || reset_devices) {
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pr_info("Issue PHB reset ...\n");
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list_for_each_entry(phb, &hose_list, list_node) {
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pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list);
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addr = (pdn->busno << 16) | (pdn->devfn << 8);
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config_addr = pseries_eeh_get_config_addr(phb, addr);
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/* invalid PE config addr */
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if (config_addr == 0)
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continue;
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pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_FUNDAMENTAL);
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pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_DEACTIVATE);
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pseries_eeh_phb_configure_bridge(phb, config_addr);
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}
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}
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return 0;
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}
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@ -569,35 +736,13 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay)
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static int pseries_eeh_reset(struct eeh_pe *pe, int option)
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{
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int config_addr;
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int ret;
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/* Figure out PE address */
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config_addr = pe->config_addr;
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if (pe->addr)
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config_addr = pe->addr;
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/* Reset PE through RTAS call */
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ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
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config_addr, BUID_HI(pe->phb->buid),
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BUID_LO(pe->phb->buid), option);
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/* If fundamental-reset not supported, try hot-reset */
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if (option == EEH_RESET_FUNDAMENTAL &&
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ret == -8) {
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option = EEH_RESET_HOT;
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ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
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config_addr, BUID_HI(pe->phb->buid),
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BUID_LO(pe->phb->buid), option);
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}
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/* We need reset hold or settlement delay */
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if (option == EEH_RESET_FUNDAMENTAL ||
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option == EEH_RESET_HOT)
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msleep(EEH_PE_RST_HOLD_TIME);
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else
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msleep(EEH_PE_RST_SETTLE_TIME);
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return ret;
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return pseries_eeh_phb_reset(pe->phb, config_addr, option);
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}
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/**
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@ -641,56 +786,17 @@ static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, u
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* pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
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* @pe: EEH PE
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*
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* The function will be called to reconfigure the bridges included
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* in the specified PE so that the mulfunctional PE would be recovered
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* again.
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*/
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static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
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{
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int config_addr;
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int ret;
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/* Waiting 0.2s maximum before skipping configuration */
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int max_wait = 200;
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/* Figure out the PE address */
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config_addr = pe->config_addr;
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if (pe->addr)
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config_addr = pe->addr;
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while (max_wait > 0) {
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ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
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config_addr, BUID_HI(pe->phb->buid),
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BUID_LO(pe->phb->buid));
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if (!ret)
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return ret;
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if (ret < 0)
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break;
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/*
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* If RTAS returns a delay value that's above 100ms, cut it
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* down to 100ms in case firmware made a mistake. For more
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* on how these delay values work see rtas_busy_delay_time
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*/
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if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
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ret <= RTAS_EXTENDED_DELAY_MAX)
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ret = RTAS_EXTENDED_DELAY_MIN+2;
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max_wait -= rtas_busy_delay_time(ret);
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if (max_wait < 0)
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break;
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rtas_busy_delay(ret);
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}
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pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n",
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__func__, pe->phb->global_number, pe->addr, ret);
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/* PAPR defines -3 as "Parameter Error" for this function: */
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if (ret == -3)
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return -EINVAL;
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else
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return -EIO;
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return pseries_eeh_phb_configure_bridge(pe->phb, config_addr);
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}
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/**
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