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drm/msm: dpu: Remove 'inline' from several functions

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Per chapter 15 of coding-style, removing 'inline' keyword from functions
that are larger than a typical macro. In a couple of cases I've
simplified the function and kept the inline.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Sean Paul 2018-09-20 10:58:16 -04:00 committed by Rob Clark
parent bf711751c8
commit 58fba464ea
9 changed files with 29 additions and 47 deletions
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2
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
View File

@ -53,7 +53,7 @@ static inline int _dpu_crtc_get_mixer_width(struct dpu_crtc_state *cstate,
return mode->hdisplay / cstate->num_mixers;
}
static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
{
struct msm_drm_private *priv = crtc->dev->dev_private;

16
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
View File

@ -264,13 +264,7 @@ static inline int dpu_crtc_get_mixer_height(struct dpu_crtc *dpu_crtc,
*/
static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)
{
struct dpu_crtc *dpu_crtc;
if (!crtc)
return -EINVAL;
dpu_crtc = to_dpu_crtc(crtc);
return atomic_read(&dpu_crtc->frame_pending);
return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;
}
/**
@ -327,13 +321,7 @@ enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
struct drm_crtc *crtc)
{
struct dpu_crtc_state *cstate =
crtc ? to_dpu_crtc_state(crtc->state) : NULL;
if (!cstate)
return NRT_CLIENT;
return RT_CLIENT;
return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
}
/**

4
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
View File

@ -1374,7 +1374,7 @@ static void dpu_encoder_off_work(struct kthread_work *work)
* phys: Pointer to physical encoder structure
* extra_flush_bits: Additional bit mask to include in flush trigger
*/
static inline void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)
{
struct dpu_hw_ctl *ctl;
@ -1417,7 +1417,7 @@ static inline void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
* _dpu_encoder_trigger_start - trigger start for a physical encoder
* phys: Pointer to physical encoder structure
*/
static inline void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)
static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)
{
if (!phys) {
DPU_ERROR("invalid argument(s)\n");

4
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
View File

@ -110,7 +110,7 @@ static void drm_mode_to_intf_timing_params(
*/
}
static inline u32 get_horizontal_total(const struct intf_timing_params *timing)
static u32 get_horizontal_total(const struct intf_timing_params *timing)
{
u32 active = timing->xres;
u32 inactive =
@ -119,7 +119,7 @@ static inline u32 get_horizontal_total(const struct intf_timing_params *timing)
return active + inactive;
}
static inline u32 get_vertical_total(const struct intf_timing_params *timing)
static u32 get_vertical_total(const struct intf_timing_params *timing)
{
u32 active = timing->yres;
u32 inactive =

6
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
View File

@ -124,7 +124,7 @@ static inline void dpu_hw_ctl_trigger_flush(struct dpu_hw_ctl *ctx)
DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, ctx->pending_flush_mask);
}
static inline uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx,
static uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx,
enum dpu_sspp sspp)
{
uint32_t flushbits = 0;
@ -179,7 +179,7 @@ static inline uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx,
return flushbits;
}
static inline uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx,
static uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx,
enum dpu_lm lm)
{
uint32_t flushbits = 0;
@ -212,7 +212,7 @@ static inline uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx,
return flushbits;
}
static inline int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx,
static int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx,
u32 *flushbits, enum dpu_intf intf)
{
switch (intf) {

12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
View File

@ -64,16 +64,10 @@ static struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage)
{
const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk;
int rc;
if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages)
return sblk->blendstage_base[stage - DPU_STAGE_0];
if (stage == DPU_STAGE_BASE)
rc = -EINVAL;
else if (stage <= sblk->maxblendstages)
rc = sblk->blendstage_base[stage - DPU_STAGE_0];
else
rc = -EINVAL;
return rc;
return -EINVAL;
}
static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx,

2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
View File

@ -141,7 +141,7 @@
/* traffic shaper clock in Hz */
#define TS_CLK 19200000
static inline int _sspp_subblk_offset(struct dpu_hw_pipe *ctx,
static int _sspp_subblk_offset(struct dpu_hw_pipe *ctx,
int s_id,
u32 *idx)
{

6
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
View File

@ -137,7 +137,7 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
* @src_wdith: width of source buffer
* Return: fill level corresponding to the source buffer/format or 0 if error
*/
static inline int _dpu_plane_calc_fill_level(struct drm_plane *plane,
static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
const struct dpu_format *fmt, u32 src_width)
{
struct dpu_plane *pdpu, *tmp;
@ -441,7 +441,7 @@ static inline struct msm_gem_address_space *_dpu_plane_get_aspace(
return kms->base.aspace;
}
static inline void _dpu_plane_set_scanout(struct drm_plane *plane,
static void _dpu_plane_set_scanout(struct drm_plane *plane,
struct dpu_plane_state *pstate,
struct dpu_hw_pipe_cfg *pipe_cfg,
struct drm_framebuffer *fb)
@ -525,7 +525,7 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu,
scale_cfg->enable = 1;
}
static inline void _dpu_plane_setup_csc(struct dpu_plane *pdpu)
static void _dpu_plane_setup_csc(struct dpu_plane *pdpu)
{
static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = {
{

24
drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
View File

@ -820,7 +820,7 @@ enum color_fmts {
* Progressive: width
* Interlaced: width
*/
static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
static unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
{
unsigned int alignment, stride = 0;
@ -862,7 +862,7 @@ invalid_input:
* Progressive: width
* Interlaced: width
*/
static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
static unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
{
unsigned int alignment, stride = 0;
@ -904,7 +904,7 @@ invalid_input:
* Progressive: height
* Interlaced: (height+1)>>1
*/
static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
{
unsigned int alignment, sclines = 0;
@ -938,7 +938,7 @@ invalid_input:
* Progressive: height
* Interlaced: (height+1)>>1
*/
static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
{
unsigned int alignment, sclines = 0;
@ -974,7 +974,7 @@ invalid_input:
* Progressive: width
* Interlaced: width
*/
static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
{
int y_tile_width = 0, y_meta_stride = 0;
@ -1007,7 +1007,7 @@ invalid_input:
* Progressive: height
* Interlaced: (height+1)>>1
*/
static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
{
int y_tile_height = 0, y_meta_scanlines = 0;
@ -1040,7 +1040,7 @@ invalid_input:
* Progressive: width
* Interlaced: width
*/
static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
{
int uv_tile_width = 0, uv_meta_stride = 0;
@ -1073,7 +1073,7 @@ invalid_input:
* Progressive: height
* Interlaced: (height+1)>>1
*/
static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
{
int uv_tile_height = 0, uv_meta_scanlines = 0;
@ -1099,7 +1099,7 @@ invalid_input:
return uv_meta_scanlines;
}
static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
{
unsigned int alignment = 0, stride = 0, bpp = 4;
@ -1128,7 +1128,7 @@ invalid_input:
return stride;
}
static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
{
unsigned int alignment = 0, scanlines = 0;
@ -1154,7 +1154,7 @@ invalid_input:
return scanlines;
}
static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width)
static unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width)
{
int rgb_tile_width = 0, rgb_meta_stride = 0;
@ -1178,7 +1178,7 @@ invalid_input:
return rgb_meta_stride;
}
static inline unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height)
static unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height)
{
int rgb_tile_height = 0, rgb_meta_scanlines = 0;