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m68knommu: remove use of MBAR in old-style ColdFire timer

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Not all ColdFire CPUs that use the old style timer hardware module use
an MBAR set peripheral region. Move the TIMER base address defines to the
per-CPU header files where we can set it correctly based on how the
peripherals are mapped - instead of using a fake MBAR for some platforms.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2011-03-09 09:57:14 +10:00
parent babc08b7e9
commit 58f0ac98f3
8 changed files with 37 additions and 26 deletions
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3
arch/m68k/include/asm/m5206sim.h
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@ -89,6 +89,9 @@
#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */
#endif
#define MCFTIMER_BASE1 (MCF_MBAR + 0x100) /* Base of TIMER1 */
#define MCFTIMER_BASE2 (MCF_MBAR + 0x120) /* Base of TIMER2 */
#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */

8
arch/m68k/include/asm/m5249sim.h
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@ -19,7 +19,7 @@
/*
* The 5249 has a second MBAR region, define its address.
*/
#define MCF_MBAR2 0x80000000
#define MCF_MBAR2 0x80000000
/*
* Define the 5249 SIM register set addresses.
@ -66,6 +66,12 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*
* Timer module.
*/
#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
/*
* UART module.
*/

5
arch/m68k/include/asm/m5272sim.h
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@ -82,6 +82,11 @@
#define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */
#define MCFTIMER_BASE1 (MCF_MBAR + 0x200) /* Base address TIMER1 */
#define MCFTIMER_BASE2 (MCF_MBAR + 0x220) /* Base address TIMER2 */
#define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */
#define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */
/*
* Define system peripheral IRQ usage.
*/

6
arch/m68k/include/asm/m5307sim.h
View File

@ -95,6 +95,12 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*
* Timer module.
*/
#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)

8
arch/m68k/include/asm/m532xsim.h
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@ -85,6 +85,14 @@
#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */
/*
* Timer module.
*/
#define MCFTIMER_BASE1 0xFC070000 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0xFC074000 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0xFC078000 /* Base address of TIMER3 */
#define MCFTIMER_BASE4 0xFC07C000 /* Base address of TIMER4 */
/*********************************************************************
*
* Reset Controller Module

6
arch/m68k/include/asm/m5407sim.h
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@ -78,6 +78,12 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*
* Timer module.
*/
#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */

23
arch/m68k/include/asm/mcftimer.h
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@ -12,29 +12,6 @@
#define mcftimer_h
/****************************************************************************/
/*
* Get address specific defines for this ColdFire member.
*/
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
#elif defined(CONFIG_M5272)
#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
#elif defined(CONFIG_M532x)
#define MCFTIMER_BASE1 0xfc070000 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0xfc074000 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0xfc078000 /* Base address of TIMER3 */
#define MCFTIMER_BASE4 0xfc07c000 /* Base address of TIMER4 */
#endif
/*
* Define the TIMER register set addresses.
*/

4
arch/m68knommu/platform/coldfire/timers.c
View File

@ -28,7 +28,7 @@
* By default use timer1 as the system clock timer.
*/
#define FREQ (MCF_BUSCLK / 16)
#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
#define TA(a) (MCFTIMER_BASE1 + (a))
/*
* These provide the underlying interrupt vector support.
@ -126,7 +126,7 @@ void hw_timer_init(void)
/*
* By default use timer2 as the profiler clock timer.
*/
#define PA(a) (MCF_MBAR + MCFTIMER_BASE2 + (a))
#define PA(a) (MCFTIMER_BASE2 + (a))
/*
* Choose a reasonably fast profile timer. Make it an odd value to