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Fix am43x minimal booting as I accidentally left out one

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patch from the already merged omap-for-v3.11/soc-signed branch.
 Also fixes for ti81x booting and  revision check updates.
 
 These are based on omap-for-v3.11/soc-signed because of the
 am43x dependency to earlier patches.
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Merge tag 'omap-for-v3.11/soc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

From Tony Lindgren:

Fix am43x minimal booting as I accidentally left out one
patch from the already merged omap-for-v3.11/soc-signed branch.
Also fixes for ti81x booting and  revision check updates.

These are based on omap-for-v3.11/soc-signed because of the
am43x dependency to earlier patches.

* tag 'omap-for-v3.11/soc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP3+: am33xx id: Add new am33xx specific function to check dev_feature
  ARM: OMAP: TI816X: add powerdomains for TI816x
  ARM: OMAP2: TI81XX: id: Add cpu id for TI816x ES2.0 and ES2.1
  ARM: OMAP2+: AM43x: basic dt support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2013-06-20 16:38:12 +02:00
commit 58eb042889
8 changed files with 120 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm/mach-omap2/board-generic.c
View File

@ -185,3 +185,19 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
.restart = omap44xx_restart,
MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
static const char *am43_boards_compat[] __initdata = {
"ti,am43",
NULL,
};
DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.map_io = am33xx_map_io,
.init_early = am43xx_init_early,
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap3_sync32k_timer_init,
.dt_compat = am43_boards_compat,
MACHINE_END
#endif

4
arch/arm/mach-omap2/control.h
View File

@ -366,6 +366,10 @@
#define AM33XX_PWMSS1_TBCLKEN_SHIFT 1
#define AM33XX_PWMSS2_TBCLKEN_SHIFT 2
/* DEV Feature register to identify AM33XX features */
#define AM33XX_DEV_FEATURE 0x604
#define AM33XX_SGX_MASK BIT(29)
/* CONTROL OMAP STATUS register to identify OMAP3 features */
#define OMAP3_CONTROL_OMAP_STATUS 0x044c

24
arch/arm/mach-omap2/id.c
View File

@ -304,6 +304,19 @@ void __init ti81xx_check_features(void)
omap3_cpuinfo();
}
void __init am33xx_check_features(void)
{
u32 status;
omap_features = OMAP3_HAS_NEON;
status = omap_ctrl_readl(AM33XX_DEV_FEATURE);
if (status & AM33XX_SGX_MASK)
omap_features |= OMAP3_HAS_SGX;
omap3_cpuinfo();
}
void __init omap3xxx_check_revision(void)
{
const char *cpu_rev;
@ -407,11 +420,18 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.0";
break;
case 1:
/* FALLTHROUGH */
default:
omap_revision = TI8168_REV_ES1_1;
cpu_rev = "1.1";
break;
case 2:
omap_revision = TI8168_REV_ES2_0;
cpu_rev = "2.0";
break;
case 3:
/* FALLTHROUGH */
default:
omap_revision = TI8168_REV_ES2_1;
cpu_rev = "2.1";
}
break;
case 0xb944:

2
arch/arm/mach-omap2/io.c
View File

@ -576,7 +576,7 @@ void __init am33xx_init_early(void)
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
am33xx_check_features();
am33xx_voltagedomains_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();

62
arch/arm/mach-omap2/powerdomains3xxx_data.c
View File

@ -336,6 +336,54 @@ static struct powerdomain dpll5_pwrdm = {
.voltdm = { .name = "core" },
};
static struct powerdomain device_81xx_pwrdm = {
.name = "device_pwrdm",
.prcm_offs = TI81XX_PRM_DEVICE_MOD,
.voltdm = { .name = "core" },
};
static struct powerdomain active_816x_pwrdm = {
.name = "active_pwrdm",
.prcm_offs = TI816X_PRM_ACTIVE_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "core" },
};
static struct powerdomain default_816x_pwrdm = {
.name = "default_pwrdm",
.prcm_offs = TI81XX_PRM_DEFAULT_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "core" },
};
static struct powerdomain ivahd0_816x_pwrdm = {
.name = "ivahd0_pwrdm",
.prcm_offs = TI816X_PRM_IVAHD0_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "mpu_iva" },
};
static struct powerdomain ivahd1_816x_pwrdm = {
.name = "ivahd1_pwrdm",
.prcm_offs = TI816X_PRM_IVAHD1_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "mpu_iva" },
};
static struct powerdomain ivahd2_816x_pwrdm = {
.name = "ivahd2_pwrdm",
.prcm_offs = TI816X_PRM_IVAHD2_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "mpu_iva" },
};
static struct powerdomain sgx_816x_pwrdm = {
.name = "sgx_pwrdm",
.prcm_offs = TI816X_PRM_SGX_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "core" },
};
/* As powerdomains are added or removed above, this list must also be changed */
static struct powerdomain *powerdomains_omap3430_common[] __initdata = {
&wkup_omap2_pwrdm,
@ -393,6 +441,17 @@ static struct powerdomain *powerdomains_am35x[] __initdata = {
NULL
};
static struct powerdomain *powerdomains_ti81xx[] __initdata = {
&device_81xx_pwrdm,
&active_816x_pwrdm,
&default_816x_pwrdm,
&ivahd0_816x_pwrdm,
&ivahd1_816x_pwrdm,
&ivahd2_816x_pwrdm,
&sgx_816x_pwrdm,
NULL
};
void __init omap3xxx_powerdomains_init(void)
{
unsigned int rev;
@ -406,6 +465,9 @@ void __init omap3xxx_powerdomains_init(void)
if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
pwrdm_register_pwrdms(powerdomains_am35x);
} else if (rev == TI8168_REV_ES1_0 || rev == TI8168_REV_ES1_1
|| rev == TI8168_REV_ES2_0 || rev == TI8168_REV_ES2_1) {
pwrdm_register_pwrdms(powerdomains_ti81xx);
} else {
pwrdm_register_pwrdms(powerdomains_omap3430_common);

11
arch/arm/mach-omap2/prcm-common.h
View File

@ -48,6 +48,17 @@
#define OMAP3430_NEON_MOD 0xb00
#define OMAP3430ES2_USBHOST_MOD 0xc00
/*
* TI81XX PRM module offsets
*/
#define TI81XX_PRM_DEVICE_MOD 0x0000
#define TI816X_PRM_ACTIVE_MOD 0x0a00
#define TI81XX_PRM_DEFAULT_MOD 0x0b00
#define TI816X_PRM_IVAHD0_MOD 0x0c00
#define TI816X_PRM_IVAHD1_MOD 0x0d00
#define TI816X_PRM_IVAHD2_MOD 0x0e00
#define TI816X_PRM_SGX_MOD 0x0f00
/* 24XX register bits shared between CM & PRM registers */
/* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */

3
arch/arm/mach-omap2/soc.h
View File

@ -403,6 +403,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define TI816X_CLASS 0x81600034
#define TI8168_REV_ES1_0 TI816X_CLASS
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
#define TI8168_REV_ES2_0 (TI816X_CLASS | (0x2 << 8))
#define TI8168_REV_ES2_1 (TI816X_CLASS | (0x3 << 8))
#define TI814X_CLASS 0x81400034
#define TI8148_REV_ES1_0 TI814X_CLASS
@ -447,6 +449,7 @@ void omap4xxx_check_revision(void);
void omap5xxx_check_revision(void);
void omap3xxx_check_features(void);
void ti81xx_check_features(void);
void am33xx_check_features(void);
void omap4xxx_check_features(void);
/*

2
arch/arm/mach-omap2/timer.c
View File

@ -582,7 +582,7 @@ OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL);
#endif /* CONFIG_ARCH_OMAP2 */
#ifdef CONFIG_ARCH_OMAP3
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL);
OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",