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Renesas ARM based SoC board updates for v3.13

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* Display Unit support for lager and marzen boards
 * Update regulators for MMC0, SDHI0 and SDHI1 on ape6evm board
 * Enable use of FPGA on bockw board
 * Add sounds support to bockw board
 * Add USB function support to bockw board
 * Add Koelsch board
 * Disable MMCIF command completion signal on ape6evm, armadillo800eva,
   kzm9g and lager boards.
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Merge tag 'renesas-boards-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards

From Simon Horman:
Renesas ARM based SoC board updates for v3.13

* Display Unit support for lager and marzen boards
* Update regulators for MMC0, SDHI0 and SDHI1 on ape6evm board
* Enable use of FPGA on bockw board
* Add sounds support to bockw board
* Add USB function support to bockw board
* Add Koelsch board
* Disable MMCIF command completion signal on ape6evm, armadillo800eva,
  kzm9g and lager boards.

* tag 'renesas-boards-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: lager: disable MMCIF Command Completion Signal, add CLK_CTRL2
  ARM: shmobile: kzm9g: disable MMCIF Command Completion Signal
  ARM: shmobile: armadillo800eva: disable MMCIF Command Completion Signal
  ARM: shmobile: ape6evm: disable MMCIF Command Completion Signal
  ARM: shmobile: bockw: add USB Function support
  ARM: shmobile: Koelsch support
  ARM: shmobile: bockw: add R-Car sound support (PIO)
  ARM: shmobile: bockw: enable global use of FPGA
  ARM: shmobile: lager: Fix Display Unit platform data
  ARM: shmobile: ape6evm: update MMC0, SDHI0 and SDHI1 with correct regulators
  ARM: shmobile: lager: Add Display Unit support
  ARM: shmobile: marzen: Add Display Unit support
  ARM: shmobile: r8a7778: add usb phy power control function
  ARM: shmobile: r8a7778: add USBHS clock
  ARM: shmobile: r8a7791 CMT support
  ARM: shmobile: r8a7791 SCIF support
  ARM: shmobile: Initial r8a7791 SoC support
  ARM: shmobile: r8a7778: add SSI/SRU clock support
  ARM: shmobile: r8a7790: Add DU and LVDS clocks
  ARM: shmobile: r8a7779: Rename DU device in clock lookups list

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-10-07 11:35:54 -07:00
commit 586eeb01e7
21 changed files with 1159 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
r8a7740-armadillo800eva-reference.dtb \
r8a7779-marzen.dtb \
r8a7779-marzen-reference.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
r8a7790-lager-reference.dtb \
sh73a0-kzm9g.dtb \

32
arch/arm/boot/dts/r8a7791-koelsch.dts Normal file
View File

@ -0,0 +1,32 @@
/*
* Device Tree Source for the Koelsch board
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a7791.dtsi"
/ {
model = "Koelsch";
compatible = "renesas,koelsch", "renesas,r8a7791";
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
};

41
arch/arm/boot/dts/r8a7791.dtsi Normal file
View File

@ -0,0 +1,41 @@
/*
* Device Tree Source for the r8a7791 SoC
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/ {
compatible = "renesas,r8a7791";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1300000000>;
};
};
gic: interrupt-controller@f1001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 0xf04>;
};
};

13
arch/arm/mach-shmobile/Kconfig
View File

@ -101,6 +101,12 @@ config ARCH_R8A7790
select SH_CLK_CPG
select RENESAS_IRQC
config ARCH_R8A7791
bool "R-Car M2 (R8A77910)"
select ARM_GIC
select CPU_V7
select SH_CLK_CPG
config ARCH_EMEV2
bool "Emma Mobile EV2"
select ARCH_WANT_OPTIONAL_GPIOLIB
@ -162,6 +168,8 @@ config MACH_BOCKW
select RENESAS_INTC_IRQPIN
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
select SND_SOC_AK4554 if SND_SIMPLE_CARD
select SND_SOC_AK4642 if SND_SIMPLE_CARD
config MACH_BOCKW_REFERENCE
bool "BOCK-W - Reference Device Tree Implementation"
@ -213,6 +221,11 @@ config MACH_LAGER_REFERENCE
This is intended to aid developers
config MACH_KOELSCH
bool "Koelsch board"
depends on ARCH_R8A7791
select USE_OF
config MACH_KZM9D
bool "KZM9D board"
depends on ARCH_EMEV2

3
arch/arm/mach-shmobile/Makefile
View File

@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
# Clock objects
@ -27,6 +28,7 @@ obj-$(CONFIG_ARCH_R8A7740) += clock-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
obj-$(CONFIG_ARCH_EMEV2) += clock-emev2.o
endif
@ -59,6 +61,7 @@ obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o

1
arch/arm/mach-shmobile/Makefile.boot
View File

@ -6,6 +6,7 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000

55
arch/arm/mach-shmobile/board-ape6evm.c
View File

@ -113,22 +113,56 @@ static const struct smsc911x_platform_config lan9220_data __initconst = {
};
/*
* On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we
* model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the
* static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also
* supplied by the same tps80032 regulator and thus can also be adjusted
* dynamically.
* MMC0 power supplies:
* Both Vcc and VccQ to eMMC on APE6EVM are supplied by a tps80032 voltage
* regulator. Until support for it is added to this file we simulate the
* Vcc supply by a fixed always-on regulator
*/
static struct regulator_consumer_supply fixed3v3_power_consumers[] =
static struct regulator_consumer_supply vcc_mmc0_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
};
/*
* SDHI0 power supplies:
* Vcc to SDHI0 on APE6EVM is supplied by a GPIO-switchable regulator. VccQ is
* provided by the same tps80032 regulator as both MMC0 voltages - see comment
* above
*/
static struct regulator_consumer_supply vcc_sdhi0_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
};
static struct regulator_init_data vcc_sdhi0_init_data = {
.constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(vcc_sdhi0_consumers),
.consumer_supplies = vcc_sdhi0_consumers,
};
static const struct fixed_voltage_config vcc_sdhi0_info __initconst = {
.supply_name = "SDHI0 Vcc",
.microvolts = 3300000,
.gpio = 76,
.enable_high = 1,
.init_data = &vcc_sdhi0_init_data,
};
/*
* SDHI1 power supplies:
* Vcc and VccQ to SDHI1 on APE6EVM are both fixed at 3.3V
*/
static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
};
/* MMCIF */
static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.ccs_unsupported = true,
};
static const struct resource mmcif0_resources[] __initconst = {
@ -215,14 +249,19 @@ static void __init ape6evm_add_standard_devices(void)
platform_device_register_resndata(&platform_bus, "smsc911x", -1,
lan9220_res, ARRAY_SIZE(lan9220_res),
&lan9220_data, sizeof(lan9220_data));
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_always_on(1, "MMC0 Vcc", vcc_mmc0_consumers,
ARRAY_SIZE(vcc_mmc0_consumers), 2800000);
platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
&mmcif0_pdata, sizeof(mmcif0_pdata));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
&vcc_sdhi0_info, sizeof(vcc_sdhi0_info));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_pdata, sizeof(sdhi0_pdata));
regulator_register_always_on(3, "SDHI1 Vcc", vcc_sdhi1_consumers,
ARRAY_SIZE(vcc_sdhi1_consumers), 3300000);
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
&sdhi1_pdata, sizeof(sdhi1_pdata));

1
arch/arm/mach-shmobile/board-armadillo800eva.c
View File

@ -823,6 +823,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
.caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE,
.ccs_unsupported = true,
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
};

370
arch/arm/mach-shmobile/board-bockw.c
View File

@ -32,11 +32,19 @@
#include <linux/smsc911x.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/usb/renesas_usbhs.h>
#include <media/soc_camera.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7778.h>
#include <asm/mach/arch.h>
#include <sound/rcar_snd.h>
#include <sound/simple_card.h>
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define COMCTLR 0x101c
static void __iomem *fpga;
/*
* CN9(Upper side) SCIF/RCAN selection
@ -63,6 +71,45 @@
* SW19 (MMC) 1 pin
*/
/*
* SSI settings
*
* SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
* SW46: 1101 (SSI6 Recorde)
* SW47: 1110 (SSI5 Playback)
* SW48: 11 (Recorde power)
* SW49: 1 (SSI slave mode)
* SW50: 1111 (SSI7, SSI8)
* SW51: 1111 (SSI3, SSI4)
* SW54: 1pin (ak4554 FPGA control)
* SW55: 1 (CLKB is 24.5760MHz)
* SW60: 1pin (ak4554 FPGA control)
* SW61: 3pin (use X11 clock)
* SW78: 3-6 (ak4642 connects I2C0)
*
* You can use sound as
*
* hw0: CN19: SSI56-AK4643
* hw1: CN21: SSI3-AK4554(playback)
* hw2: CN21: SSI4-AK4554(capture)
* hw3: CN20: SSI7-AK4554(playback)
* hw4: CN20: SSI8-AK4554(capture)
*
* this command is required when playback on hw0.
*
* # amixer set "LINEOUT Mixer DACL" on
*/
/*
* USB
*
* USB1 (CN29) can be Host/Function
*
* Host Func
* SW98 1 2
* SW99 1 3
*/
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
@ -81,13 +128,71 @@ static struct resource smsc911x_resources[] __initdata = {
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
};
#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
/*
* When USB1 is Func
*/
static int usbhsf_get_id(struct platform_device *pdev)
{
return USBHS_GADGET;
}
#define SUSPMODE 0x102
static int usbhsf_power_ctrl(struct platform_device *pdev,
void __iomem *base, int enable)
{
enable = !!enable;
r8a7778_usb_phy_power(enable);
iowrite16(enable << 14, base + SUSPMODE);
return 0;
}
static struct resource usbhsf_resources[] __initdata = {
DEFINE_RES_MEM(0xffe60000, 0x110),
DEFINE_RES_IRQ(gic_iid(0x4f)),
};
static struct renesas_usbhs_platform_info usbhs_info __initdata = {
.platform_callback = {
.get_id = usbhsf_get_id,
.power_ctrl = usbhsf_power_ctrl,
},
.driver_param = {
.buswait_bwait = 4,
},
};
#define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
#define USB1_DEVICE "renesas_usbhs"
#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
platform_device_register_resndata( \
&platform_bus, "renesas_usbhs", -1, \
usbhsf_resources, \
ARRAY_SIZE(usbhsf_resources), \
&usbhs_info, sizeof(struct renesas_usbhs_platform_info))
#else
/*
* When USB1 is Host
*/
#define USB_PHY_SETTING { }
#define USB1_DEVICE "ehci-platform"
#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
#endif
/* USB */
static struct resource usb_phy_resources[] __initdata = {
DEFINE_RES_MEM(0xffe70800, 0x100),
DEFINE_RES_MEM(0xffe76000, 0x100),
};
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
USB_PHY_SETTING;
/* SDHI */
static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
@ -118,7 +223,9 @@ static struct sh_eth_plat_data ether_platform_data __initdata = {
static struct i2c_board_info i2c0_devices[] = {
{
I2C_BOARD_INFO("rx8581", 0x51),
},
}, {
I2C_BOARD_INFO("ak4643", 0x12),
}
};
/* HSPI*/
@ -181,7 +288,213 @@ static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
BOCKW_CAMERA(0);
BOCKW_CAMERA(1);
/* Sound */
static struct resource rsnd_resources[] __initdata = {
[RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
[RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
[RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
};
static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_UNUSED, /* SSI 0 */
RSND_SSI_UNUSED, /* SSI 1 */
RSND_SSI_UNUSED, /* SSI 2 */
RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
};
static struct rsnd_scu_platform_info rsnd_scu[9] = {
/* no member at this point */
};
enum {
AK4554_34 = 0,
AK4643_56,
AK4554_78,
SOUND_MAX,
};
static int rsnd_codec_power(int id, int enable)
{
static int sound_user[SOUND_MAX] = {0, 0, 0};
int *usr = NULL;
u32 bit;
switch (id) {
case 3:
case 4:
usr = sound_user + AK4554_34;
bit = (1 << 10);
break;
case 5:
case 6:
usr = sound_user + AK4643_56;
bit = (1 << 6);
break;
case 7:
case 8:
usr = sound_user + AK4554_78;
bit = (1 << 7);
break;
}
if (!usr)
return -EIO;
if (enable) {
if (*usr == 0) {
u32 val = ioread16(fpga + COMCTLR);
val &= ~bit;
iowrite16(val, fpga + COMCTLR);
}
(*usr)++;
} else {
if (*usr == 0)
return 0;
(*usr)--;
if (*usr == 0) {
u32 val = ioread16(fpga + COMCTLR);
val |= bit;
iowrite16(val, fpga + COMCTLR);
}
}
return 0;
}
static int rsnd_start(int id)
{
return rsnd_codec_power(id, 1);
}
static int rsnd_stop(int id)
{
return rsnd_codec_power(id, 0);
}
static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN1,
.ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu,
.scu_info_nr = ARRAY_SIZE(rsnd_scu),
.start = rsnd_start,
.stop = rsnd_stop,
};
static struct asoc_simple_card_info rsnd_card_info[] = {
/* SSI5, SSI6 */
{
.name = "AK4643",
.card = "SSI56-AK4643",
.codec = "ak4642-codec.0-0012",
.platform = "rcar_sound",
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "rsnd-dai.0",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
},
/* SSI3 */
{
.name = "AK4554",
.card = "SSI3-AK4554(playback)",
.codec = "ak4554-adc-dac.0",
.platform = "rcar_sound",
.cpu_dai = {
.name = "rsnd-dai.1",
.fmt = SND_SOC_DAIFMT_CBM_CFM |
SND_SOC_DAIFMT_RIGHT_J,
},
.codec_dai = {
.name = "ak4554-hifi",
},
},
/* SSI4 */
{
.name = "AK4554",
.card = "SSI4-AK4554(capture)",
.codec = "ak4554-adc-dac.0",
.platform = "rcar_sound",
.cpu_dai = {
.name = "rsnd-dai.2",
.fmt = SND_SOC_DAIFMT_CBM_CFM |
SND_SOC_DAIFMT_LEFT_J,
},
.codec_dai = {
.name = "ak4554-hifi",
},
},
/* SSI7 */
{
.name = "AK4554",
.card = "SSI7-AK4554(playback)",
.codec = "ak4554-adc-dac.1",
.platform = "rcar_sound",
.cpu_dai = {
.name = "rsnd-dai.3",
.fmt = SND_SOC_DAIFMT_CBM_CFM |
SND_SOC_DAIFMT_RIGHT_J,
},
.codec_dai = {
.name = "ak4554-hifi",
},
},
/* SSI8 */
{
.name = "AK4554",
.card = "SSI8-AK4554(capture)",
.codec = "ak4554-adc-dac.1",
.platform = "rcar_sound",
.cpu_dai = {
.name = "rsnd-dai.4",
.fmt = SND_SOC_DAIFMT_CBM_CFM |
SND_SOC_DAIFMT_LEFT_J,
},
.codec_dai = {
.name = "ak4554-hifi",
},
}
};
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* AUDIO */
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"audio_clk_a", "audio_clk"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"audio_clk_b", "audio_clk"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi34_ctrl", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi3_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi4_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi5_ctrl", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi5_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi6_ctrl", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi6_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi78_ctrl", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi7_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
"ssi8_data", "ssi"),
/* Ether */
PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
"ether_rmii", "ether"),
@ -201,7 +514,7 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
/* USB */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
"usb0", "usb0"),
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
"usb1", "usb1"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
@ -224,13 +537,13 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
"vin1_data8", "vin1"),
};
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define PFC 0xfffc0000
#define PUPR4 0x110
static void __init bockw_init(void)
{
void __iomem *base;
struct clk *clk;
int i;
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
@ -269,8 +582,8 @@ static void __init bockw_init(void)
/* for SMSC */
base = ioremap_nocache(FPGA, SZ_1M);
if (base) {
fpga = ioremap_nocache(FPGA, SZ_1M);
if (fpga) {
/*
* CAUTION
*
@ -278,10 +591,9 @@ static void __init bockw_init(void)
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
u16 val = ioread16(base + IRQ0MR);
u16 val = ioread16(fpga + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
iowrite16(val, base + IRQ0MR);
iounmap(base);
iowrite16(val, fpga + IRQ0MR);
regulator_register_fixed(0, dummy_supplies,
ARRAY_SIZE(dummy_supplies));
@ -308,6 +620,42 @@ static void __init bockw_init(void)
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
}
/* for Audio */
clk = clk_get(NULL, "audio_clk_b");
clk_set_rate(clk, 24576000);
clk_put(clk);
rsnd_codec_power(5, 1); /* enable ak4642 */
platform_device_register_simple(
"ak4554-adc-dac", 0, NULL, 0);
platform_device_register_simple(
"ak4554-adc-dac", 1, NULL, 0);
platform_device_register_resndata(
&platform_bus, "rcar_sound", -1,
rsnd_resources, ARRAY_SIZE(rsnd_resources),
&rsnd_info, sizeof(rsnd_info));
for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
struct platform_device_info cardinfo = {
.parent = &platform_bus,
.name = "asoc-simple-card",
.id = i,
.data = &rsnd_card_info[i],
.size_data = sizeof(struct asoc_simple_card_info),
.dma_mask = ~0,
};
platform_device_register_full(&cardinfo);
}
}
static void __init bockw_init_late(void)
{
r8a7778_init_late();
ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
}
static const char *bockw_boards_compat_dt[] __initdata = {
@ -320,5 +668,5 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
.dt_compat = bockw_boards_compat_dt,
.init_late = r8a7778_init_late,
.init_late = bockw_init_late,
MACHINE_END

44
arch/arm/mach-shmobile/board-koelsch.c Normal file
View File

@ -0,0 +1,44 @@
/*
* Koelsch board support
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <mach/common.h>
#include <mach/r8a7791.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static void __init koelsch_add_standard_devices(void)
{
r8a7791_clock_init();
r8a7791_add_dt_devices();
}
static const char * const koelsch_boards_compat_dt[] __initconst = {
"renesas,koelsch",
NULL,
};
DT_MACHINE_START(KOELSCH_DT, "koelsch")
.init_early = r8a7791_init_early,
.init_machine = koelsch_add_standard_devices,
.dt_compat = koelsch_boards_compat_dt,
MACHINE_END

1
arch/arm/mach-shmobile/board-kzm9g.c
View File

@ -366,6 +366,7 @@ static struct resource sh_mmcif_resources[] = {
static struct sh_mmcif_plat_data sh_mmcif_platdata = {
.ocr = MMC_VDD_165_195,
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.ccs_unsupported = true,
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
};

68
arch/arm/mach-shmobile/board-lager.c
View File

@ -28,6 +28,7 @@
#include <linux/mmc/sh_mmcif.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
@ -38,6 +39,62 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/* DU */
static struct rcar_du_encoder_data lager_du_encoders[] = {
{
.type = RCAR_DU_ENCODER_VGA,
.output = RCAR_DU_OUTPUT_DPAD0,
}, {
.type = RCAR_DU_ENCODER_NONE,
.output = RCAR_DU_OUTPUT_LVDS1,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static const struct rcar_du_platform_data lager_du_pdata __initconst = {
.encoders = lager_du_encoders,
.num_encoders = ARRAY_SIZE(lager_du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfeb00000, 0x70000),
DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
DEFINE_RES_IRQ(gic_spi(256)),
DEFINE_RES_IRQ(gic_spi(268)),
DEFINE_RES_IRQ(gic_spi(269)),
};
static void __init lager_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7790",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &lager_du_pdata,
.size_data = sizeof(lager_du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
/* LEDS */
static struct gpio_led lager_leds[] = {
{
@ -85,6 +142,8 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
/* MMCIF */
static struct sh_mmcif_plat_data mmcif1_pdata __initdata = {
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.clk_ctrl2_present = true,
.ccs_unsupported = true,
};
static struct resource mmcif1_resources[] __initdata = {
@ -106,6 +165,13 @@ static struct resource ether_resources[] __initdata = {
};
static const struct pinctrl_map lager_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_rgb666", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_sync_1", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_clk_out_0", "du"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
"scif0_data", "scif0"),
@ -153,6 +219,8 @@ static void __init lager_add_standard_devices(void)
ether_resources,
ARRAY_SIZE(ether_resources),
&ether_pdata, sizeof(ether_pdata));
lager_add_du_device();
}
static const char *lager_boards_compat_dt[] __initdata = {

72
arch/arm/mach-shmobile/board-marzen.c
View File

@ -30,6 +30,7 @@
#include <linux/dma-mapping.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
@ -169,6 +170,63 @@ static struct platform_device hspi_device = {
.num_resources = ARRAY_SIZE(hspi_resources),
};
/*
* DU
*
* The panel only specifies the [hv]display and [hv]total values. The position
* and width of the sync pulses don't matter, they're copied from VESA timings.
*/
static struct rcar_du_encoder_data du_encoders[] = {
{
.type = RCAR_DU_ENCODER_VGA,
.output = RCAR_DU_OUTPUT_DPAD0,
}, {
.type = RCAR_DU_ENCODER_LVDS,
.output = RCAR_DU_OUTPUT_DPAD1,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static const struct rcar_du_platform_data du_pdata __initconst = {
.encoders = du_encoders,
.num_encoders = ARRAY_SIZE(du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfff80000, 0x40000),
DEFINE_RES_IRQ(gic_iid(0x3f)),
};
static void __init marzen_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7779",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &du_pdata,
.size_data = sizeof(du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
/* LEDS */
static struct gpio_led marzen_leds[] = {
{
@ -237,6 +295,19 @@ static struct platform_device *marzen_devices[] __initdata = {
};
static const struct pinctrl_map marzen_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_rgb888", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_sync_1", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_clk_out_0", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_rgb666", "du1"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_sync_1", "du1"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_clk_out", "du1"),
/* HSPI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
"hspi0", "hspi0"),
@ -297,6 +368,7 @@ static void __init marzen_init(void)
r8a7779_add_vin_device(1, &vin_platform_data);
r8a7779_add_vin_device(3, &vin_platform_data);
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
marzen_add_du_device();
}
static const char *marzen_boards_compat_dt[] __initdata = {

44
arch/arm/mach-shmobile/clock-r8a7778.c
View File

@ -69,6 +69,15 @@ static struct clk extal_clk = {
.mapping = &cpg_mapping,
};
static struct clk audio_clk_a = {
};
static struct clk audio_clk_b = {
};
static struct clk audio_clk_c = {
};
/*
* clock ratio of these clock will be updated
* on r8a7778_clock_init()
@ -100,18 +109,23 @@ static struct clk *main_clks[] = {
&p_clk,
&g_clk,
&z_clk,
&audio_clk_a,
&audio_clk_b,
&audio_clk_c,
};
enum {
MSTP331,
MSTP323, MSTP322, MSTP321,
MSTP311, MSTP310,
MSTP309, MSTP308, MSTP307,
MSTP114,
MSTP110, MSTP109,
MSTP100,
MSTP030,
MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
MSTP016, MSTP015,
MSTP007,
MSTP016, MSTP015, MSTP012, MSTP011, MSTP010,
MSTP009, MSTP008, MSTP007,
MSTP_NR };
static struct clk mstp_clks[MSTP_NR] = {
@ -119,6 +133,11 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
[MSTP311] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 11, 0), /* SSI4 */
[MSTP310] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 10, 0), /* SSI5 */
[MSTP309] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 9, 0), /* SSI6 */
[MSTP308] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 8, 0), /* SSI7 */
[MSTP307] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 7, 0), /* SSI8 */
[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
[MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
[MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 9, 0), /* VIN1 */
@ -135,11 +154,20 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
[MSTP012] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 12, 0), /* SSI0 */
[MSTP011] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 11, 0), /* SSI1 */
[MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
[MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
[MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
};
static struct clk_lookup lookups[] = {
/* main */
CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
CLKDEV_CON_ID("shyway_clk", &s_clk),
CLKDEV_CON_ID("peripheral_clk", &p_clk),
@ -153,6 +181,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
@ -168,6 +197,17 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP011]),
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP010]),
CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP311]),
CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP310]),
CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
};
void __init r8a7778_clock_init(void)

2
arch/arm/mach-shmobile/clock-r8a7779.c
View File

@ -200,7 +200,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
CLKDEV_DEV_ID("rcar-du.0", &mstp_clks[MSTP103]), /* DU */
CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
};
void __init r8a7779_clock_init(void)

12
arch/arm/mach-shmobile/clock-r8a7790.c
View File

@ -182,7 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */
enum {
MSTP813,
MSTP721, MSTP720,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
MSTP717, MSTP716,
MSTP522,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
@ -193,6 +193,11 @@ enum {
static struct clk mstp_clks[MSTP_NR] = {
[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
[MSTP722] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 22, 0), /* DU2 */
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
@ -251,6 +256,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
/* MSTP */
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),

237
arch/arm/mach-shmobile/clock-r8a7791.c Normal file
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@ -0,0 +1,237 @@
/*
* r8a7791 clock framework support
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/sh_clk.h>
#include <linux/clkdev.h>
#include <mach/clock.h>
#include <mach/common.h>
/*
* MD EXTAL PLL0 PLL1 PLL3
* 14 13 19 (MHz) *1 *1
*---------------------------------------------------
* 0 0 0 15 x 1 x172/2 x208/2 x106
* 0 0 1 15 x 1 x172/2 x208/2 x88
* 0 1 0 20 x 1 x130/2 x156/2 x80
* 0 1 1 20 x 1 x130/2 x156/2 x66
* 1 0 0 26 / 2 x200/2 x240/2 x122
* 1 0 1 26 / 2 x200/2 x240/2 x102
* 1 1 0 30 / 2 x172/2 x208/2 x106
* 1 1 1 30 / 2 x172/2 x208/2 x88
*
* *1 : Table 7.6 indicates VCO ouput (PLLx = VCO/2)
* see "p1 / 2" on R8A7791_CLOCK_ROOT() below
*/
#define MD(nr) (1 << nr)
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
#define SMSTPCR0 0xE6150130
#define SMSTPCR1 0xE6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xE615013C
#define SMSTPCR5 0xE6150144
#define SMSTPCR7 0xe615014c
#define SMSTPCR8 0xE6150990
#define SMSTPCR9 0xE6150994
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
#define MODEMR 0xE6160060
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
#define SD3CKCR 0xE615007C
#define MMC0CKCR 0xE6150240
#define MMC1CKCR 0xE6150244
#define SSPCKCR 0xE6150248
#define SSPRSCKCR 0xE615024C
static struct clk_mapping cpg_mapping = {
.phys = CPG_BASE,
.len = CPG_LEN,
};
static struct clk extal_clk = {
/* .rate will be updated on r8a7791_clock_init() */
.mapping = &cpg_mapping,
};
static struct sh_clk_ops followparent_clk_ops = {
.recalc = followparent_recalc,
};
static struct clk main_clk = {
/* .parent will be set r8a73a4_clock_init */
.ops = &followparent_clk_ops,
};
/*
* clock ratio of these clock will be updated
* on r8a7791_clock_init()
*/
SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
/* fixed ratio clock */
SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
SH_FIXED_RATIO_CLK_SET(cp_clk, extal_clk, 1, 2);
SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2);
SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
static struct clk *main_clks[] = {
&extal_clk,
&extal_div2_clk,
&main_clk,
&pll1_clk,
&pll1_div2_clk,
&pll3_clk,
&hp_clk,
&p_clk,
&rclk_clk,
&mp_clk,
&cp_clk,
};
/* MSTP */
enum {
MSTP721, MSTP720,
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP216, MSTP207, MSTP206,
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
MSTP124,
MSTP_NR
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
[MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */
[MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */
[MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */
[MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
};
static struct clk_lookup lookups[] = {
/* main clocks */
CLKDEV_CON_ID("extal", &extal_clk),
CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
CLKDEV_CON_ID("main", &main_clk),
CLKDEV_CON_ID("pll1", &pll1_clk),
CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk),
CLKDEV_CON_ID("pll3", &pll3_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("cp", &cp_clk),
CLKDEV_CON_ID("peripheral_clk", &hp_clk),
/* MSTP */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), /* SCIFB1 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), /* SCIFB2 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), /* SCIFA2 */
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP719]), /* SCIF2 */
CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP718]), /* SCIF3 */
CLKDEV_DEV_ID("sh-sci.10", &mstp_clks[MSTP715]), /* SCIF4 */
CLKDEV_DEV_ID("sh-sci.11", &mstp_clks[MSTP714]), /* SCIF5 */
CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
};
#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
extal_clk.rate = e * 1000 * 1000; \
main_clk.parent = m; \
SH_CLK_SET_RATIO(&pll1_clk_ratio, p1 / 2, 1); \
if (mode & MD(19)) \
SH_CLK_SET_RATIO(&pll3_clk_ratio, p31, 1); \
else \
SH_CLK_SET_RATIO(&pll3_clk_ratio, p30, 1)
void __init r8a7791_clock_init(void)
{
void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
u32 mode;
int k, ret = 0;
BUG_ON(!modemr);
mode = ioread32(modemr);
iounmap(modemr);
switch (mode & (MD(14) | MD(13))) {
case 0:
R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
break;
case MD(13):
R8A7791_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
break;
case MD(14):
R8A7791_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
break;
case MD(13) | MD(14):
R8A7791_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
break;
}
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
if (!ret)
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
shmobile_clk_init();
else
goto epanic;
return;
epanic:
panic("failed to setup r8a7791 clocks\n");
}

2
arch/arm/mach-shmobile/include/mach/r8a7778.h
View File

@ -35,4 +35,6 @@ extern void r8a7778_clock_init(void);
extern void r8a7778_init_irq_extpin(int irlm);
extern void r8a7778_pinmux_init(void);
extern int r8a7778_usb_phy_power(bool enable);
#endif /* __ASM_R8A7778_H__ */

8
arch/arm/mach-shmobile/include/mach/r8a7791.h Normal file
View File

@ -0,0 +1,8 @@
#ifndef __ASM_R8A7791_H__
#define __ASM_R8A7791_H__
void r8a7791_add_dt_devices(void);
void r8a7791_clock_init(void);
void r8a7791_init_early(void);
#endif /* __ASM_R8A7791_H__ */

37
arch/arm/mach-shmobile/setup-r8a7778.c
View File

@ -95,29 +95,46 @@ static struct sh_timer_config sh_tmu1_platform_data __initdata = {
&sh_tmu##idx##_platform_data, \
sizeof(sh_tmu##idx##_platform_data))
/* USB */
static struct usb_phy *phy;
int r8a7778_usb_phy_power(bool enable)
{
static struct usb_phy *phy = NULL;
int ret = 0;
if (!phy)
phy = usb_get_phy(USB_PHY_TYPE_USB2);
if (IS_ERR(phy)) {
pr_err("kernel doesn't have usb phy driver\n");
return PTR_ERR(phy);
}
if (enable)
ret = usb_phy_init(phy);
else
usb_phy_shutdown(phy);
return ret;
}
/* USB */
static int usb_power_on(struct platform_device *pdev)
{
if (IS_ERR(phy))
return PTR_ERR(phy);
int ret = r8a7778_usb_phy_power(true);
if (ret)
return ret;
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
usb_phy_init(phy);
return 0;
}
static void usb_power_off(struct platform_device *pdev)
{
if (IS_ERR(phy))
if (r8a7778_usb_phy_power(false))
return;
usb_phy_shutdown(phy);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
}
@ -353,8 +370,6 @@ void __init r8a7778_add_standard_devices(void)
void __init r8a7778_init_late(void)
{
phy = usb_get_phy(USB_PHY_TYPE_USB2);
platform_device_register_full(&ehci_info);
platform_device_register_full(&ohci_info);
}

149
arch/arm/mach-shmobile/setup-r8a7791.c Normal file
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@ -0,0 +1,149 @@
/*
* r8a7791 processor support
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
#include <asm/mach/arch.h>
#define SCIF_COMMON(scif_type, baseaddr, irq) \
.type = scif_type, \
.mapbase = baseaddr, \
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
.irqs = SCIx_IRQ_MUXED(irq)
#define SCIFA_DATA(index, baseaddr, irq) \
[index] = { \
SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
.scbrr_algo_id = SCBRR_ALGO_4, \
.scscr = SCSCR_RE | SCSCR_TE, \
}
#define SCIFB_DATA(index, baseaddr, irq) \
[index] = { \
SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
.scbrr_algo_id = SCBRR_ALGO_4, \
.scscr = SCSCR_RE | SCSCR_TE, \
}
#define SCIF_DATA(index, baseaddr, irq) \
[index] = { \
SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
.scbrr_algo_id = SCBRR_ALGO_2, \
.scscr = SCSCR_RE | SCSCR_TE, \
}
#define HSCIF_DATA(index, baseaddr, irq) \
[index] = { \
SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
.scbrr_algo_id = SCBRR_ALGO_6, \
.scscr = SCSCR_RE | SCSCR_TE, \
}
enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
SCIF2, SCIF3, SCIF4, SCIF5, SCIFA3, SCIFA4, SCIFA5 };
static const struct plat_sci_port scif[] __initconst = {
SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
SCIF_DATA(SCIF2, 0xe6e58000, gic_spi(22)), /* SCIF2 */
SCIF_DATA(SCIF3, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
SCIF_DATA(SCIF4, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
SCIF_DATA(SCIF5, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
SCIFA_DATA(SCIFA3, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
SCIFA_DATA(SCIFA4, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
SCIFA_DATA(SCIFA5, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
};
static inline void r8a7791_register_scif(int idx)
{
platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
sizeof(struct plat_sci_port));
}
static const struct sh_timer_config cmt00_platform_data __initconst = {
.name = "CMT00",
.timer_bit = 0,
.clockevent_rating = 80,
};
static const struct resource cmt00_resources[] __initconst = {
DEFINE_RES_MEM(0xffca0510, 0x0c),
DEFINE_RES_MEM(0xffca0500, 0x04),
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
};
#define r8a7791_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a7791_add_dt_devices(void)
{
r8a7791_register_scif(SCIFA0);
r8a7791_register_scif(SCIFA1);
r8a7791_register_scif(SCIFB0);
r8a7791_register_scif(SCIFB1);
r8a7791_register_scif(SCIFB2);
r8a7791_register_scif(SCIFA2);
r8a7791_register_scif(SCIF0);
r8a7791_register_scif(SCIF1);
r8a7791_register_scif(SCIF2);
r8a7791_register_scif(SCIF3);
r8a7791_register_scif(SCIF4);
r8a7791_register_scif(SCIF5);
r8a7791_register_scif(SCIFA3);
r8a7791_register_scif(SCIFA4);
r8a7791_register_scif(SCIFA5);
r8a7791_register_cmt(00);
}
void __init r8a7791_init_early(void)
{
#ifndef CONFIG_ARM_ARCH_TIMER
shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
#endif
}
#ifdef CONFIG_USE_OF
static const char *r8a7791_boards_compat_dt[] __initdata = {
"renesas,r8a7791",
NULL,
};
DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
.init_early = r8a7791_init_early,
.dt_compat = r8a7791_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */