- Add Mediatek MT8186 DT bindings (Allen-KH Cheng)
- Remove dead code corresponding of the IXP4xx board removal (Linus Walleij) - Add CLOCK_EVT_FEAT_C3STOP flag for the RISC-V SBI timer (Samuel Holland) - Do not return an error if there are multiple definitions of the sp804 timers in the DT (Andre Przywara) - Add the missing SPDX identifier (Thomas Gleixner) - Remove an unncessary NULL check as it is done right before at probe time for the timer-ti-dm (Dan Carpenter) - Fix the irq_of_parse_and_map() return code check on onexas-nps (Krzysztof Kozlowski) -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEGn3N4YVz0WNVyHskqDIjiipP6E8FAmKMi58ACgkQqDIjiipP 6E9ZMwgAmKDEeUiSalNwVO/dwHqfquzNGixLWyiGLHTnrmgnqEbAOh6iOFH9zfn3 mKLUx5NaMpT/0AZvdBIV2VfFHAagDDA5ByB8AwpmqiQ7jubCZl7/i2pnvS9kBCJ7 3XjpxGKfTwfVejIKriCUu77hMqAT2NBh0VdEV5FiPL9h7TPLskhnFUfENqwEvb0d FHIW5Z0fPxRmoJcr4sJhPjt7L609iZ6IaEZjWvWwXBk0GaHChaN44R3Qi/mPFR4k BrxwQw5Ytq6dKrKA4iK1z/CpH7SlhpNpggMJvaRRzzR90PBIfDm2Xn1dWu8yePW8 lowCg0F2dx444DHKrpjQ8JeHxE2VQw== =Cpcq -----END PGP SIGNATURE----- Merge tag 'timers-v5.19-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clockevent/clocksource driver updates from Daniel Lezcano: - Add Mediatek MT8186 DT bindings (Allen-KH Cheng) - Remove dead code corresponding of the IXP4xx board removal (Linus Walleij) - Add CLOCK_EVT_FEAT_C3STOP flag for the RISC-V SBI timer (Samuel Holland) - Do not return an error if there are multiple definitions of the sp804 timers in the DT (Andre Przywara) - Add the missing SPDX identifier (Thomas Gleixner) - Remove an unncessary NULL check as it is done right before at probe time for the timer-ti-dm (Dan Carpenter) - Fix the irq_of_parse_and_map() return code check on onexas-nps (Krzysztof Kozlowski) Link: https://lore.kernel.org/lkml/b5a83e54-1ee1-f910-4be4-bc3bf1015243@linaro.org
This commit is contained in:
commit
57963a92a7
Documentation/devicetree/bindings/timer
drivers/clocksource
Kconfigbcm_kona_timer.cjcore-pit.cmips-gic-timer.ctimer-armada-370-xp.ctimer-digicolor.ctimer-ixp4xx.ctimer-lpc32xx.ctimer-orion.ctimer-oxnas-rps.ctimer-pistachio.ctimer-riscv.ctimer-sp804.ctimer-sun4i.ctimer-sun5i.ctimer-ti-dm.c
include/linux/platform_data
@ -23,6 +23,7 @@ Required properties:
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For those SoCs that use SYST
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* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
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* "mediatek,mt8186-timer" for MT8186 compatible timers (SYST)
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* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
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* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
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* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
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@ -80,7 +80,7 @@ config IXP4XX_TIMER
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bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST
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depends on HAS_IOMEM
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select CLKSRC_MMIO
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select TIMER_OF if OF
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select TIMER_OF
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help
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Enables support for the Intel XScale IXP4xx SoC timer.
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@ -1,15 +1,5 @@
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/*
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* Copyright (C) 2012 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2012 Broadcom Corporation
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#include <linux/init.h>
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#include <linux/irq.h>
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@ -1,11 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* J-Core SoC PIT/clocksource driver
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*
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* Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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@ -1,10 +1,5 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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#define pr_fmt(fmt) "mips-gic-timer: " fmt
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Marvell Armada 370/XP SoC timer handling.
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*
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@ -7,10 +8,6 @@
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Timer 0 is used as free-running clocksource, while timer 1 is
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* used as clock_event_device.
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*
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Conexant Digicolor timer driver
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*
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@ -11,10 +12,6 @@
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* Copyright (C) 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/*
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@ -19,8 +19,6 @@
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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/* Goes away with OF conversion */
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#include <linux/platform_data/timer-ixp4xx.h>
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/*
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* Constants to make it easy to access Timer Control/Status registers
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@ -263,28 +261,6 @@ static struct platform_driver ixp4xx_timer_driver = {
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};
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builtin_platform_driver(ixp4xx_timer_driver);
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/**
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* ixp4xx_timer_setup() - Timer setup function to be called from boardfiles
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* @timerbase: physical base of timer block
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* @timer_irq: Linux IRQ number for the timer
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* @timer_freq: Fixed frequency of the timer
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*/
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void __init ixp4xx_timer_setup(resource_size_t timerbase,
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int timer_irq,
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unsigned int timer_freq)
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{
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void __iomem *base;
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base = ioremap(timerbase, 0x100);
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if (!base) {
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pr_crit("IXP4xx: can't remap timer\n");
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return;
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}
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ixp4xx_timer_register(base, timer_irq, timer_freq);
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}
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EXPORT_SYMBOL_GPL(ixp4xx_timer_setup);
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#ifdef CONFIG_OF
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static __init int ixp4xx_of_timer_init(struct device_node *np)
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{
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void __iomem *base;
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@ -315,4 +291,3 @@ out_unmap:
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return ret;
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}
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TIMER_OF_DECLARE(ixp4xx, "intel,ixp4xx-timer", ixp4xx_of_timer_init);
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#endif
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Clocksource driver for NXP LPC32xx/18xx/43xx timer
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*
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@ -6,11 +7,6 @@
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* Based on:
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* time-efm32 Copyright (C) 2013 Pengutronix
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* mach-lpc32xx/timer.c Copyright (C) 2009 - 2010 NXP Semiconductors
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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@ -1,12 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Marvell Orion SoC timer handling.
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*
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* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Timer 0 is used as free-running clocksource, while timer 1 is
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* used as clock_event_device.
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*/
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@ -236,7 +236,7 @@ static int __init oxnas_rps_timer_init(struct device_node *np)
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}
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rps->irq = irq_of_parse_and_map(np, 0);
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if (rps->irq < 0) {
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if (!rps->irq) {
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ret = -EINVAL;
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goto err_iomap;
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}
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@ -1,11 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Pistachio clocksource based on general-purpose timers
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*
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* Copyright (C) 2015 Imagination Technologies
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
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static unsigned int riscv_clock_event_irq;
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static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
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.name = "riscv_timer_clockevent",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
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.rating = 100,
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.set_next_event = riscv_clock_next_event,
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};
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@ -259,6 +259,11 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time
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struct clk *clk1, *clk2;
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const char *name = of_get_property(np, "compatible", NULL);
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if (initialized) {
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pr_debug("%pOF: skipping further SP804 timer device\n", np);
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return 0;
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}
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base = of_iomap(np, 0);
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if (!base)
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return -ENXIO;
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@ -270,11 +275,6 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time
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writel(0, timer1_base + timer->ctrl);
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writel(0, timer2_base + timer->ctrl);
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if (initialized || !of_device_is_available(np)) {
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ret = -EINVAL;
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goto err;
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}
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clk1 = of_clk_get(np, 0);
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if (IS_ERR(clk1))
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clk1 = NULL;
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Allwinner A1X SoCs timer handling.
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*
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@ -8,10 +9,6 @@
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* Based on code from
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Benn Huang <benn@allwinnertech.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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@ -1,13 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Allwinner SoCs hstimer driver.
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*
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* Copyright (C) 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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@ -828,8 +828,7 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
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cpu_pm_register_notifier(&timer->nb);
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}
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if (pdata)
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timer->errata = pdata->timer_errata;
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timer->errata = pdata->timer_errata;
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timer->pdev = pdev;
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@ -1,11 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __TIMER_IXP4XX_H
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#define __TIMER_IXP4XX_H
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#include <linux/ioport.h>
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void __init ixp4xx_timer_setup(resource_size_t timerbase,
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int timer_irq,
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unsigned int timer_freq);
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#endif
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