Merge branch 'imx6/boards' into next/boards

* imx6/boards:
  ARM: imx6q: generate imx6q dtb files
  arm/imx6q: Rename Sabreauto to Armadillo2
  arm/imx6q-sabrelite: add enet phy ksz9021rn fixup
  arm/imx6: add imx6q sabrelite board support
  dts/imx: rename uart labels to consistent with hw spec
  dts/imx: rename gpio labels to consistent with hw spec
This commit is contained in:
Olof Johansson 2011-12-16 14:51:24 -08:00
commit 578bd83d7e
13 changed files with 174 additions and 99 deletions

View File

@ -21,6 +21,10 @@ i.MX53 Smart Mobile Reference Design Board
Required root node properties:
- compatible = "fsl,imx53-smd", "fsl,imx53";
i.MX6 Quad SABRE Automotive Board
i.MX6 Quad Armadillo2 Board
Required root node properties:
- compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
- compatible = "fsl,imx6q-arm2", "fsl,imx6q";
i.MX6 Quad SABRE Lite Board
Required root node properties:
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";

View File

@ -35,20 +35,19 @@
};
esdhc@70008000 { /* ESDHC2 */
cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
cd-gpios = <&gpio1 6 0>;
wp-gpios = <&gpio1 5 0>;
status = "okay";
};
uart2: uart@7000c000 { /* UART3 */
uart3: uart@7000c000 {
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@70010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
<&gpio3 25 0>; /* GPIO4_25 */
cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
status = "okay";
pmic: mc13892@0 {
@ -57,7 +56,7 @@
compatible = "fsl,mc13892";
spi-max-frequency = <6000000>;
reg = <0>;
mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
mc13xxx-irq-gpios = <&gpio1 8 0>;
fsl,mc13xxx-uses-regulator;
};
@ -91,12 +90,12 @@
reg = <0x73fa8000 0x4000>;
};
uart0: uart@73fbc000 {
uart1: uart@73fbc000 {
fsl,uart-has-rtscts;
status = "okay";
};
uart1: uart@73fc0000 {
uart2: uart@73fc0000 {
status = "okay";
};
};
@ -127,7 +126,7 @@
power {
label = "Power Button";
gpios = <&gpio1 21 0>;
gpios = <&gpio2 21 0>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};

View File

@ -14,9 +14,9 @@
/ {
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
};
tzic: tz-interrupt-controller@e0000000 {
@ -86,7 +86,7 @@
status = "disabled";
};
uart2: uart@7000c000 { /* UART3 */
uart3: uart@7000c000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x7000c000 0x4000>;
interrupts = <33>;
@ -117,7 +117,7 @@
};
};
gpio0: gpio@73f84000 { /* GPIO1 */
gpio1: gpio@73f84000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f84000 0x4000>;
interrupts = <50 51>;
@ -127,7 +127,7 @@
#interrupt-cells = <1>;
};
gpio1: gpio@73f88000 { /* GPIO2 */
gpio2: gpio@73f88000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f88000 0x4000>;
interrupts = <52 53>;
@ -137,7 +137,7 @@
#interrupt-cells = <1>;
};
gpio2: gpio@73f8c000 { /* GPIO3 */
gpio3: gpio@73f8c000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f8c000 0x4000>;
interrupts = <54 55>;
@ -147,7 +147,7 @@
#interrupt-cells = <1>;
};
gpio3: gpio@73f90000 { /* GPIO4 */
gpio4: gpio@73f90000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f90000 0x4000>;
interrupts = <56 57>;
@ -171,14 +171,14 @@
status = "disabled";
};
uart0: uart@73fbc000 {
uart1: uart@73fbc000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x73fbc000 0x4000>;
interrupts = <31>;
status = "disabled";
};
uart1: uart@73fc0000 {
uart2: uart@73fc0000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x73fc0000 0x4000>;
interrupts = <32>;

View File

@ -29,8 +29,8 @@
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
};
};
@ -44,7 +44,7 @@
reg = <0x53fa8000 0x4000>;
};
uart0: uart@53fbc000 { /* UART1 */
uart1: uart@53fbc000 {
status = "okay";
};
};
@ -67,7 +67,7 @@
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0xf4000000 0x2000000>;
phy-mode = "mii";
interrupt-parent = <&gpio1>;
interrupt-parent = <&gpio2>;
interrupts = <31>;
reg-io-width = <4>;
smsc,irq-push-pull;
@ -79,34 +79,34 @@
home {
label = "Home";
gpios = <&gpio4 10 0>; /* GPIO5_10 */
gpios = <&gpio5 10 0>;
linux,code = <102>; /* KEY_HOME */
gpio-key,wakeup;
};
back {
label = "Back";
gpios = <&gpio4 11 0>; /* GPIO5_11 */
gpios = <&gpio5 11 0>;
linux,code = <158>; /* KEY_BACK */
gpio-key,wakeup;
};
program {
label = "Program";
gpios = <&gpio4 12 0>; /* GPIO5_12 */
gpios = <&gpio5 12 0>;
linux,code = <362>; /* KEY_PROGRAM */
gpio-key,wakeup;
};
volume-up {
label = "Volume Up";
gpios = <&gpio4 13 0>; /* GPIO5_13 */
gpios = <&gpio5 13 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio3 0 0>; /* GPIO4_0 */
gpios = <&gpio4 0 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};

View File

@ -29,15 +29,14 @@
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio3 14 0>;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
<&gpio2 19 0>; /* GPIO3_19 */
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
flash: at45db321d@1 {
@ -61,8 +60,8 @@
};
esdhc@50020000 { /* ESDHC3 */
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
@ -76,7 +75,7 @@
reg = <0x53fa8000 0x4000>;
};
uart0: uart@53fbc000 { /* UART1 */
uart1: uart@53fbc000 {
status = "okay";
};
};
@ -102,7 +101,7 @@
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
@ -113,7 +112,7 @@
green {
label = "Heartbeat";
gpios = <&gpio6 7 0>; /* GPIO7_7 */
gpios = <&gpio7 7 0>;
linux,default-trigger = "heartbeat";
};
};

View File

@ -29,13 +29,13 @@
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
cd-gpios = <&gpio3 13 0>;
status = "okay";
};
esdhc@50020000 { /* ESDHC3 */
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
@ -49,7 +49,7 @@
reg = <0x53fa8000 0x4000>;
};
uart0: uart@53fbc000 { /* UART1 */
uart1: uart@53fbc000 {
status = "okay";
};
};
@ -84,7 +84,7 @@
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
@ -95,20 +95,20 @@
power {
label = "Power Button";
gpios = <&gpio0 8 0>; /* GPIO1_8 */
gpios = <&gpio1 8 0>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
volume-up {
label = "Volume Up";
gpios = <&gpio1 14 0>; /* GPIO2_14 */
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio1 15 0>; /* GPIO2_15 */
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
@ -118,7 +118,7 @@
user {
label = "Heartbeat";
gpios = <&gpio6 7 0>; /* GPIO7_7 */
gpios = <&gpio7 7 0>;
linux,default-trigger = "heartbeat";
};
};

View File

@ -29,8 +29,8 @@
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio4 11 0>;
status = "okay";
};
@ -39,15 +39,14 @@
status = "okay";
};
uart2: uart@5000c000 { /* UART3 */
uart3: uart@5000c000 {
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
<&gpio2 19 0>; /* GPIO3_19 */
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
zigbee: mc1323@0 {
@ -91,11 +90,11 @@
reg = <0x53fa8000 0x4000>;
};
uart0: uart@53fbc000 { /* UART1 */
uart1: uart@53fbc000 {
status = "okay";
};
uart1: uart@53fc0000 { /* UART2 */
uart2: uart@53fc0000 {
status = "okay";
};
};
@ -145,7 +144,7 @@
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
@ -156,13 +155,13 @@
volume-up {
label = "Volume Up";
gpios = <&gpio1 14 0>; /* GPIO2_14 */
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio1 15 0>; /* GPIO2_15 */
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};

View File

@ -14,11 +14,11 @@
/ {
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
};
tzic: tz-interrupt-controller@0fffc000 {
@ -88,7 +88,7 @@
status = "disabled";
};
uart2: uart@5000c000 { /* UART3 */
uart3: uart@5000c000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x5000c000 0x4000>;
interrupts = <33>;
@ -119,7 +119,7 @@
};
};
gpio0: gpio@53f84000 { /* GPIO1 */
gpio1: gpio@53f84000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f84000 0x4000>;
interrupts = <50 51>;
@ -129,7 +129,7 @@
#interrupt-cells = <1>;
};
gpio1: gpio@53f88000 { /* GPIO2 */
gpio2: gpio@53f88000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f88000 0x4000>;
interrupts = <52 53>;
@ -139,7 +139,7 @@
#interrupt-cells = <1>;
};
gpio2: gpio@53f8c000 { /* GPIO3 */
gpio3: gpio@53f8c000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f8c000 0x4000>;
interrupts = <54 55>;
@ -149,7 +149,7 @@
#interrupt-cells = <1>;
};
gpio3: gpio@53f90000 { /* GPIO4 */
gpio4: gpio@53f90000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f90000 0x4000>;
interrupts = <56 57>;
@ -173,21 +173,21 @@
status = "disabled";
};
uart0: uart@53fbc000 { /* UART1 */
uart1: uart@53fbc000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53fbc000 0x4000>;
interrupts = <31>;
status = "disabled";
};
uart1: uart@53fc0000 { /* UART2 */
uart2: uart@53fc0000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53fc0000 0x4000>;
interrupts = <32>;
status = "disabled";
};
gpio4: gpio@53fdc000 { /* GPIO5 */
gpio5: gpio@53fdc000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fdc000 0x4000>;
interrupts = <103 104>;
@ -197,7 +197,7 @@
#interrupt-cells = <1>;
};
gpio5: gpio@53fe0000 { /* GPIO6 */
gpio6: gpio@53fe0000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fe0000 0x4000>;
interrupts = <105 106>;
@ -207,7 +207,7 @@
#interrupt-cells = <1>;
};
gpio6: gpio@53fe4000 { /* GPIO7 */
gpio7: gpio@53fe4000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fe4000 0x4000>;
interrupts = <107 108>;
@ -226,7 +226,7 @@
status = "disabled";
};
uart3: uart@53ff0000 { /* UART4 */
uart4: uart@53ff0000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53ff0000 0x4000>;
interrupts = <13>;
@ -241,7 +241,7 @@
reg = <0x60000000 0x10000000>;
ranges;
uart4: uart@63f90000 { /* UART5 */
uart5: uart@63f90000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x63f90000 0x4000>;
interrupts = <86>;

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@ -14,8 +14,8 @@
/include/ "imx6q.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Automotive Board";
compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
model = "Freescale i.MX6 Quad Armadillo2 Board";
compatible = "fsl,imx6q-arm2", "fsl,imx6q";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
@ -34,8 +34,8 @@
};
usdhc@02198000 { /* uSDHC3 */
cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */
wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */
cd-gpios = <&gpio6 11 0>;
wp-gpios = <&gpio6 14 0>;
status = "okay";
};
@ -44,7 +44,7 @@
status = "okay";
};
uart3: uart@021f0000 { /* UART4 */
uart4: uart@021f0000 {
status = "okay";
};
};
@ -55,7 +55,7 @@
debug-led {
label = "Heartbeat";
gpios = <&gpio2 25 0>; /* GPIO3_25 */
gpios = <&gpio3 25 0>;
linux,default-trigger = "heartbeat";
};
};

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@ -0,0 +1,49 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx6q.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Lite Board";
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
memory {
reg = <0x10000000 0x40000000>;
};
soc {
aips-bus@02100000 { /* AIPS2 */
enet@02188000 {
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "okay";
};
usdhc@02198000 { /* uSDHC3 */
cd-gpios = <&gpio7 0 0>;
wp-gpios = <&gpio7 1 0>;
status = "okay";
};
usdhc@0219c000 { /* uSDHC4 */
cd-gpios = <&gpio2 6 0>;
wp-gpios = <&gpio2 7 0>;
status = "okay";
};
uart2: uart@021e8000 {
status = "okay";
};
};
};
};

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@ -14,11 +14,11 @@
/ {
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
};
cpus {
@ -165,7 +165,7 @@
status = "disabled";
};
uart0: uart@02020000 { /* UART1 */
uart1: uart@02020000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>;
@ -247,7 +247,7 @@
interrupts = <0 55 0x04>;
};
gpio0: gpio@0209c000 { /* GPIO1 */
gpio1: gpio@0209c000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x0209c000 0x4000>;
interrupts = <0 66 0x04 0 67 0x04>;
@ -257,7 +257,7 @@
#interrupt-cells = <1>;
};
gpio1: gpio@020a0000 { /* GPIO2 */
gpio2: gpio@020a0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a0000 0x4000>;
interrupts = <0 68 0x04 0 69 0x04>;
@ -267,7 +267,7 @@
#interrupt-cells = <1>;
};
gpio2: gpio@020a4000 { /* GPIO3 */
gpio3: gpio@020a4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a4000 0x4000>;
interrupts = <0 70 0x04 0 71 0x04>;
@ -277,7 +277,7 @@
#interrupt-cells = <1>;
};
gpio3: gpio@020a8000 { /* GPIO4 */
gpio4: gpio@020a8000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a8000 0x4000>;
interrupts = <0 72 0x04 0 73 0x04>;
@ -287,7 +287,7 @@
#interrupt-cells = <1>;
};
gpio4: gpio@020ac000 { /* GPIO5 */
gpio5: gpio@020ac000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020ac000 0x4000>;
interrupts = <0 74 0x04 0 75 0x04>;
@ -297,7 +297,7 @@
#interrupt-cells = <1>;
};
gpio5: gpio@020b0000 { /* GPIO6 */
gpio6: gpio@020b0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020b0000 0x4000>;
interrupts = <0 76 0x04 0 77 0x04>;
@ -307,7 +307,7 @@
#interrupt-cells = <1>;
};
gpio6: gpio@020b4000 { /* GPIO7 */
gpio7: gpio@020b4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020b4000 0x4000>;
interrupts = <0 78 0x04 0 79 0x04>;
@ -543,28 +543,28 @@
interrupts = <0 18 0x04>;
};
uart1: uart@021e8000 { /* UART2 */
uart2: uart@021e8000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>;
interrupts = <0 27 0x04>;
status = "disabled";
};
uart2: uart@021ec000 { /* UART3 */
uart3: uart@021ec000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>;
interrupts = <0 28 0x04>;
status = "disabled";
};
uart3: uart@021f0000 { /* UART4 */
uart4: uart@021f0000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>;
interrupts = <0 29 0x04>;
status = "disabled";
};
uart4: uart@021f4000 { /* UART5 */
uart5: uart@021f4000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>;
interrupts = <0 30 0x04>;

View File

@ -25,3 +25,6 @@ initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
imx6q-sabrelite.dtb

View File

@ -16,6 +16,8 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <linux/micrel_phy.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
@ -23,8 +25,27 @@
#include <mach/common.h>
#include <mach/hardware.h>
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
/* max rx/tx clock delay, min rx/tx control delay */
phy_write(phydev, 0x0b, 0x8104);
phy_write(phydev, 0x0c, 0xf0f0);
phy_write(phydev, 0x0b, 0x104);
return 0;
}
static void __init imx6q_init_machine(void)
{
if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
imx6q_pm_init();
@ -72,7 +93,8 @@ static struct sys_timer imx6q_timer = {
};
static const char *imx6q_dt_compat[] __initdata = {
"fsl,imx6q-sabreauto",
"fsl,imx6q-arm2",
"fsl,imx6q-sabrelite",
NULL,
};