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dt-bindings: phy: zynqmp-psgtr: Fix example's numbers of cells in reg

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The DT examples are by default compiled in a parent that has
 #address-cells and #size-cells both set to 1. Fix the example
accordingly, even if it doesn't match the actual hardware, as this is
the recommended practice for DT bindings examples.

Fixes: cea0f76a48 ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY")
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200701134853.30656-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Laurent Pinchart 2020-07-01 16:48:53 +03:00 committed by Vinod Koul
parent 4a33bea003
commit 574ba36678
1 changed files with 2 additions and 2 deletions
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4
Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
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@ -94,8 +94,8 @@ examples:
- |
phy: phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
reg = <0x0 0xfd400000 0x0 0x40000>,
<0x0 0xfd3d0000 0x0 0x1000>;
reg = <0xfd400000 0x40000>,
<0xfd3d0000 0x1000>;
reg-names = "serdes", "siou";
clocks = <&refclks 3>, <&refclks 2>, <&refclks 0>;
clock-names = "ref1", "ref2", "ref3";