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ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema

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Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Krzysztof Kozlowski
2020-06-26 10:06:37 +02:00
committed by Wei Xu
parent b3a9e3b962
commit 5720fcdc2e
2 changed files with 2 additions and 2 deletions
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2
arch/arm/boot/dts/hi3620.dtsi
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@@ -71,7 +71,7 @@
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
ranges = <0 0xfc000000 0x2000000>; ranges = <0 0xfc000000 0x2000000>;
L2: l2-cache { L2: cache-controller {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x100000 0x100000>; reg = <0x100000 0x100000>;
interrupts = <0 15 4>; interrupts = <0 15 4>;

2
arch/arm/boot/dts/hisi-x5hd2.dtsi
View File

@@ -381,7 +381,7 @@
interrupts = <1 13 0xf01>; interrupts = <1 13 0xf01>;
}; };
l2: l2-cache { l2: cache-controller {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x00a10000 0x100000>; reg = <0x00a10000 0x100000>;
interrupts = <0 15 4>; interrupts = <0 15 4>;