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ARM: dts: dra7x-evm: switch to new cpsw switch drv

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Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Grygorii Strashko 2020-09-07 23:21:23 +03:00 committed by Tony Lindgren
parent ea952beb29
commit 56d6c721f2
6 changed files with 35 additions and 37 deletions
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13
arch/arm/boot/dts/dra7-evm.dts
View File

@ -537,24 +537,23 @@
ti,no-idle-on-init;
};
&mac {
&mac_sw {
status = "okay";
dual_emac;
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
ethphy0: ethernet-phy@2 {
reg = <2>;
};

14
arch/arm/boot/dts/dra71-evm.dts
View File

@ -219,26 +219,26 @@
vqmmc-supply = <&evm_1v8_sw>;
};
&mac {
&mac_sw {
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
dual_emac;
status = "okay";
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
dp83867_0: ethernet-phy@2 {
reg = <2>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;

4
arch/arm/boot/dts/dra72-evm-common.dtsi
View File

@ -462,10 +462,6 @@
};
};
&mac {
status = "okay";
};
&dcan1 {
status = "okay";
pinctrl-names = "default", "sleep", "active";

14
arch/arm/boot/dts/dra72-evm-revc.dts
View File

@ -77,26 +77,26 @@
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
};
&mac {
&mac_sw {
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
dual_emac;
status = "okay";
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
dp83867_0: ethernet-phy@2 {
reg = <2>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;

13
arch/arm/boot/dts/dra72-evm.dts
View File

@ -69,17 +69,22 @@
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
};
&mac {
slaves = <1>;
&mac_sw {
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
ti,dual-emac-pvid = <1>;
};
&davinci_mdio {
&cpsw_port2 {
status = "disabled";
};
&davinci_mdio_sw {
ethphy0: ethernet-phy@3 {
reg = <3>;
};

14
arch/arm/boot/dts/dra76-evm.dts
View File

@ -475,25 +475,23 @@
status = "disabled";
};
&mac {
&mac_sw {
status = "okay";
dual_emac;
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
dp83867_0: ethernet-phy@2 {
reg = <2>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;