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mt76 patches for 4.20

Browse Source 
* unify code between mt76x0, mt76x2
 * mt76x0 fixes
 * another fix for rx buffer allocation regression on usb
 * move mt76x2 source files to mt76x2 folder
 * more work on mt76x0e support
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Merge tag 'mt76-for-kvalo-2018-10-05' of https://github.com/nbd168/wireless

mt76 patches for 4.20

* unify code between mt76x0, mt76x2
* mt76x0 fixes
* another fix for rx buffer allocation regression on usb
* move mt76x2 source files to mt76x2 folder
* more work on mt76x0e support
This commit is contained in:
Kalle Valo 2018-10-06 14:22:47 +03:00
commit 5580d81056
73 changed files with 1685 additions and 2089 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
drivers/net/wireless/mediatek/mt76/Kconfig
View File

@ -13,44 +13,5 @@ config MT76x02_USB
tristate
select MT76_USB
config MT76x0_COMMON
tristate
select MT76x02_LIB
config MT76x2_COMMON
tristate
select MT76x02_LIB
config MT76x0U
tristate "MediaTek MT76x0U (USB) support"
select MT76x0_COMMON
select MT76x02_USB
depends on MAC80211
depends on USB
help
This adds support for MT7610U-based wireless USB dongles.
config MT76x0E
tristate "MediaTek MT76x0E (PCIe) support"
select MT76x0_COMMON
depends on MAC80211
depends on PCI
help
This adds support for MT7610/MT7630-based wireless PCIe devices.
config MT76x2E
tristate "MediaTek MT76x2E (PCIe) support"
select MT76x2_COMMON
depends on MAC80211
depends on PCI
---help---
This adds support for MT7612/MT7602/MT7662-based wireless PCIe devices.
config MT76x2U
tristate "MediaTek MT76x2U (USB) support"
select MT76x2_COMMON
select MT76x02_USB
depends on MAC80211
depends on USB
help
This adds support for MT7612U-based wireless USB dongles.
source "drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig"
source "drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig"

26
drivers/net/wireless/mediatek/mt76/Makefile
View File

@ -1,11 +1,7 @@
obj-$(CONFIG_MT76_CORE) += mt76.o
obj-$(CONFIG_MT76_USB) += mt76-usb.o
obj-$(CONFIG_MT76x0_COMMON) += mt76x0/
obj-$(CONFIG_MT76x02_LIB) += mt76x02-lib.o
obj-$(CONFIG_MT76x02_USB) += mt76x02-usb.o
obj-$(CONFIG_MT76x2_COMMON) += mt76x2-common.o
obj-$(CONFIG_MT76x2E) += mt76x2e.o
obj-$(CONFIG_MT76x2U) += mt76x2u.o
mt76-y := \
mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o tx.o agg-rx.o
@ -14,25 +10,13 @@ mt76-usb-y := usb.o usb_trace.o usb_mcu.o
CFLAGS_trace.o := -I$(src)
CFLAGS_usb_trace.o := -I$(src)
CFLAGS_mt76x02_trace.o := -I$(src)
mt76x02-lib-y := mt76x02_util.o mt76x02_mac.o mt76x02_mcu.o \
mt76x02_eeprom.o mt76x02_phy.o mt76x02_mmio.o
mt76x02_eeprom.o mt76x02_phy.o mt76x02_mmio.o \
mt76x02_txrx.o mt76x02_trace.o
mt76x02-usb-y := mt76x02_usb_mcu.o mt76x02_usb_core.o
mt76x2-common-y := \
mt76x2_eeprom.o mt76x2_tx_common.o mt76x2_mac_common.o \
mt76x2_init_common.o mt76x2_common.o mt76x2_phy_common.o \
mt76x2_debugfs.o mt76x2_mcu_common.o
mt76x2e-y := \
mt76x2_pci.o mt76x2_dma.o \
mt76x2_main.o mt76x2_init.o mt76x2_tx.o \
mt76x2_core.o mt76x2_mac.o mt76x2_mcu.o mt76x2_phy.o \
mt76x2_dfs.o mt76x2_trace.o
mt76x2u-y := \
mt76x2_usb.o mt76x2u_init.o mt76x2u_main.o mt76x2u_mac.o \
mt76x2u_mcu.o mt76x2u_phy.o mt76x2u_core.o
CFLAGS_mt76x2_trace.o := -I$(src)
obj-$(CONFIG_MT76x0_COMMON) += mt76x0/
obj-$(CONFIG_MT76x2_COMMON) += mt76x2/

6
drivers/net/wireless/mediatek/mt76/mt76.h
View File

@ -262,8 +262,6 @@ struct mt76_driver_ops {
void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
bool ps);
s8 (*get_max_txpwr_adj)(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate);
};
struct mt76_channel_state {
@ -519,8 +517,8 @@ static inline u16 mt76_rev(struct mt76_dev *dev)
#define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
#define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
#define __mt76_init_queues(dev) (dev)->queue_ops->init((dev))
#define __mt76_queue_alloc(dev, ...) (dev)->queue_ops->alloc((dev), __VA_ARGS__)
#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)

20
drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig Normal file
View File

@ -0,0 +1,20 @@
config MT76x0_COMMON
tristate
select MT76x02_LIB
config MT76x0U
tristate "MediaTek MT76x0U (USB) support"
select MT76x0_COMMON
select MT76x02_USB
depends on MAC80211
depends on USB
help
This adds support for MT7610U-based wireless USB dongles.
config MT76x0E
tristate "MediaTek MT76x0E (PCIe) support"
select MT76x0_COMMON
depends on MAC80211
depends on PCI
help
This adds support for MT7610/MT7630-based wireless PCIe devices.

2
drivers/net/wireless/mediatek/mt76/mt76x0/Makefile
View File

@ -4,7 +4,7 @@ obj-$(CONFIG_MT76x0_COMMON) += mt76x0-common.o
mt76x0-common-y := \
init.o main.o trace.o eeprom.o phy.o \
mac.o debugfs.o tx.o
mac.o debugfs.o
mt76x0u-y := usb.o usb_mcu.o
mt76x0e-y := pci.o pci_mcu.o

4
drivers/net/wireless/mediatek/mt76/mt76x0/debugfs.c
View File

@ -21,7 +21,7 @@
static int
mt76x0_ampdu_stat_read(struct seq_file *file, void *data)
{
struct mt76x0_dev *dev = file->private;
struct mt76x02_dev *dev = file->private;
int i, j;
#define stat_printf(grp, off, name) \
@ -75,7 +75,7 @@ static const struct file_operations fops_ampdu_stat = {
.release = single_release,
};
void mt76x0_init_debugfs(struct mt76x0_dev *dev)
void mt76x0_init_debugfs(struct mt76x02_dev *dev)
{
struct dentry *dir;

28
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c
View File

@ -25,7 +25,7 @@
#define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16)
static int
mt76x0_efuse_physical_size_check(struct mt76x0_dev *dev)
mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev)
{
u8 data[MT_MAP_READS * 16];
int ret, i;
@ -53,7 +53,7 @@ mt76x0_efuse_physical_size_check(struct mt76x0_dev *dev)
return 0;
}
static void mt76x0_set_chip_cap(struct mt76x0_dev *dev)
static void mt76x0_set_chip_cap(struct mt76x02_dev *dev)
{
u16 nic_conf0 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_0);
u16 nic_conf1 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_1);
@ -82,20 +82,20 @@ static void mt76x0_set_chip_cap(struct mt76x0_dev *dev)
dev_err(dev->mt76.dev, "invalid tx-rx stream\n");
}
static void mt76x0_set_temp_offset(struct mt76x0_dev *dev)
static void mt76x0_set_temp_offset(struct mt76x02_dev *dev)
{
u8 val;
val = mt76x02_eeprom_get(&dev->mt76, MT_EE_2G_TARGET_POWER) >> 8;
if (mt76x02_field_valid(val))
dev->caldata.temp_offset = mt76x02_sign_extend(val, 8);
dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);
else
dev->caldata.temp_offset = -10;
dev->cal.rx.temp_offset = -10;
}
static void mt76x0_set_freq_offset(struct mt76x0_dev *dev)
static void mt76x0_set_freq_offset(struct mt76x02_dev *dev)
{
struct mt76x0_caldata *caldata = &dev->caldata;
struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
u8 val;
val = mt76x02_eeprom_get(&dev->mt76, MT_EE_FREQ_OFFSET);
@ -110,10 +110,10 @@ static void mt76x0_set_freq_offset(struct mt76x0_dev *dev)
caldata->freq_offset -= mt76x02_sign_extend(val, 8);
}
void mt76x0_read_rx_gain(struct mt76x0_dev *dev)
void mt76x0_read_rx_gain(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
struct mt76x0_caldata *caldata = &dev->caldata;
struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
s8 val, lna_5g[3], lna_2g;
u16 rssi_offset;
int i;
@ -157,7 +157,7 @@ static s8 mt76x0_get_delta(struct mt76_dev *dev)
return mt76x02_rate_power_val(val);
}
void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
bool is_2ghz = chan->band == NL80211_BAND_2GHZ;
@ -216,7 +216,7 @@ void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
mt76x02_add_rate_power_offset(t, delta);
}
void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info)
void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info)
{
struct mt76x0_chan_map {
u8 chan;
@ -277,7 +277,7 @@ void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info)
info[1] = 5;
}
static int mt76x0_check_eeprom(struct mt76x0_dev *dev)
static int mt76x0_check_eeprom(struct mt76x02_dev *dev)
{
u16 val;
@ -297,7 +297,7 @@ static int mt76x0_check_eeprom(struct mt76x0_dev *dev)
}
}
static int mt76x0_load_eeprom(struct mt76x0_dev *dev)
static int mt76x0_load_eeprom(struct mt76x02_dev *dev)
{
int found;
@ -316,7 +316,7 @@ static int mt76x0_load_eeprom(struct mt76x0_dev *dev)
MT76X0_EEPROM_SIZE, MT_EE_READ);
}
int mt76x0_eeprom_init(struct mt76x0_dev *dev)
int mt76x0_eeprom_init(struct mt76x02_dev *dev)
{
u8 version, fae;
u16 data;

18
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h
View File

@ -18,23 +18,15 @@
#include "../mt76x02_eeprom.h"
struct mt76x0_dev;
struct mt76x02_dev;
#define MT76X0U_EE_MAX_VER 0x0c
#define MT76X0_EEPROM_SIZE 512
struct mt76x0_caldata {
s8 rssi_offset[2];
s8 lna_gain;
s16 temp_offset;
u8 freq_offset;
};
int mt76x0_eeprom_init(struct mt76x0_dev *dev);
void mt76x0_read_rx_gain(struct mt76x0_dev *dev);
void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev);
void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info);
int mt76x0_eeprom_init(struct mt76x02_dev *dev);
void mt76x0_read_rx_gain(struct mt76x02_dev *dev);
void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev);
void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info);
static inline s8 s6_to_s8(u32 val)
{

50
drivers/net/wireless/mediatek/mt76/mt76x0/init.c
View File

@ -18,9 +18,6 @@
#include "eeprom.h"
#include "trace.h"
#include "mcu.h"
#include "../mt76x02_util.h"
#include "../mt76x02_dma.h"
#include "initvals.h"
static void mt76x0_vht_cap_mask(struct ieee80211_supported_band *sband)
@ -42,7 +39,7 @@ static void mt76x0_vht_cap_mask(struct ieee80211_supported_band *sband)
}
static void
mt76x0_set_wlan_state(struct mt76x0_dev *dev, u32 val, bool enable)
mt76x0_set_wlan_state(struct mt76x02_dev *dev, u32 val, bool enable)
{
u32 mask = MT_CMB_CTRL_XTAL_RDY | MT_CMB_CTRL_PLL_LD;
@ -69,12 +66,10 @@ mt76x0_set_wlan_state(struct mt76x0_dev *dev, u32 val, bool enable)
dev_err(dev->mt76.dev, "PLL and XTAL check failed\n");
}
void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset)
void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset)
{
u32 val;
mutex_lock(&dev->hw_atomic_mutex);
val = mt76_rr(dev, MT_WLAN_FUN_CTRL);
if (reset) {
@ -96,12 +91,10 @@ void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset)
udelay(20);
mt76x0_set_wlan_state(dev, val, enable);
mutex_unlock(&dev->hw_atomic_mutex);
}
EXPORT_SYMBOL_GPL(mt76x0_chip_onoff);
static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev)
static void mt76x0_reset_csr_bbp(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_RESET_CSR |
@ -116,7 +109,7 @@ static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev)
mt76_wr_rp(dev, MT_MCU_MEMMAP_WLAN, \
tab, ARRAY_SIZE(tab))
static int mt76x0_init_bbp(struct mt76x0_dev *dev)
static int mt76x0_init_bbp(struct mt76x02_dev *dev)
{
int ret, i;
@ -139,7 +132,7 @@ static int mt76x0_init_bbp(struct mt76x0_dev *dev)
return 0;
}
static void mt76x0_init_mac_registers(struct mt76x0_dev *dev)
static void mt76x0_init_mac_registers(struct mt76x02_dev *dev)
{
u32 reg;
@ -172,15 +165,9 @@ static void mt76x0_init_mac_registers(struct mt76x0_dev *dev)
reg &= ~0x000003FF;
reg |= 0x00000201;
mt76_wr(dev, MT_WMM_CTRL, reg);
/* TODO: Probably not needed */
mt76_wr(dev, 0x7028, 0);
mt76_wr(dev, 0x7010, 0);
mt76_wr(dev, 0x7024, 0);
msleep(10);
}
static int mt76x0_init_wcid_mem(struct mt76x0_dev *dev)
static int mt76x0_init_wcid_mem(struct mt76x02_dev *dev)
{
u32 *vals;
int i;
@ -199,14 +186,14 @@ static int mt76x0_init_wcid_mem(struct mt76x0_dev *dev)
return 0;
}
static void mt76x0_init_key_mem(struct mt76x0_dev *dev)
static void mt76x0_init_key_mem(struct mt76x02_dev *dev)
{
u32 vals[4] = {};
mt76_wr_copy(dev, MT_SKEY_MODE_BASE_0, vals, ARRAY_SIZE(vals));
}
static int mt76x0_init_wcid_attr_mem(struct mt76x0_dev *dev)
static int mt76x0_init_wcid_attr_mem(struct mt76x02_dev *dev)
{
u32 *vals;
int i;
@ -223,7 +210,7 @@ static int mt76x0_init_wcid_attr_mem(struct mt76x0_dev *dev)
return 0;
}
static void mt76x0_reset_counters(struct mt76x0_dev *dev)
static void mt76x0_reset_counters(struct mt76x02_dev *dev)
{
mt76_rr(dev, MT_RX_STAT_0);
mt76_rr(dev, MT_RX_STAT_1);
@ -233,7 +220,7 @@ static void mt76x0_reset_counters(struct mt76x0_dev *dev)
mt76_rr(dev, MT_TX_STA_2);
}
int mt76x0_mac_start(struct mt76x0_dev *dev)
int mt76x0_mac_start(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
@ -248,7 +235,7 @@ int mt76x0_mac_start(struct mt76x0_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x0_mac_start);
void mt76x0_mac_stop(struct mt76x0_dev *dev)
void mt76x0_mac_stop(struct mt76x02_dev *dev)
{
int i = 200, ok = 0;
@ -281,7 +268,7 @@ void mt76x0_mac_stop(struct mt76x0_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x0_mac_stop);
int mt76x0_init_hardware(struct mt76x0_dev *dev)
int mt76x0_init_hardware(struct mt76x02_dev *dev)
{
int ret;
@ -335,12 +322,12 @@ int mt76x0_init_hardware(struct mt76x0_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x0_init_hardware);
struct mt76x0_dev *
struct mt76x02_dev *
mt76x0_alloc_device(struct device *pdev,
const struct mt76_driver_ops *drv_ops,
const struct ieee80211_ops *ops)
{
struct mt76x0_dev *dev;
struct mt76x02_dev *dev;
struct mt76_dev *mdev;
mdev = mt76_alloc_device(sizeof(*dev), ops);
@ -350,18 +337,15 @@ mt76x0_alloc_device(struct device *pdev,
mdev->dev = pdev;
mdev->drv = drv_ops;
dev = container_of(mdev, struct mt76x0_dev, mt76);
mutex_init(&dev->reg_atomic_mutex);
mutex_init(&dev->hw_atomic_mutex);
spin_lock_init(&dev->mac_lock);
spin_lock_init(&dev->con_mon_lock);
dev = container_of(mdev, struct mt76x02_dev, mt76);
mutex_init(&dev->phy_mutex);
atomic_set(&dev->avg_ampdu_len, 1);
return dev;
}
EXPORT_SYMBOL_GPL(mt76x0_alloc_device);
int mt76x0_register_device(struct mt76x0_dev *dev)
int mt76x0_register_device(struct mt76x02_dev *dev)
{
struct mt76_dev *mdev = &dev->mt76;
struct ieee80211_hw *hw = mdev->hw;

3
drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h
View File

@ -83,7 +83,8 @@ static const struct mt76_reg_pair mt76x0_mac_reg_table[] = {
{ MT_LDO_CTRL_1, 0x6B006464 },
{ MT_HT_BASIC_RATE, 0x00004003 },
{ MT_HT_CTRL_CFG, 0x000001FF },
{ MT_TXOP_HLDR_ET, 0x00000000 }
{ MT_TXOP_HLDR_ET, 0x00000000 },
{ MT_PN_PAD_MODE, 0x00000003 },
};
static const struct mt76_reg_pair mt76x0_bbp_init_tab[] = {

84
drivers/net/wireless/mediatek/mt76/mt76x0/mac.c
View File

@ -13,13 +13,13 @@
* GNU General Public License for more details.
*/
#include "mt76x0.h"
#include "trace.h"
#include "../mt76x02_util.h"
#include <linux/etherdevice.h>
void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
int ht_mode)
#include "mt76x0.h"
#include "trace.h"
void mt76x0_mac_set_protection(struct mt76x02_dev *dev, bool legacy_prot,
int ht_mode)
{
int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
@ -77,7 +77,7 @@ void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
}
void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
void mt76x0_mac_set_short_preamble(struct mt76x02_dev *dev, bool short_preamb)
{
if (short_preamb)
mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
@ -85,7 +85,7 @@ void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
}
void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
void mt76x0_mac_config_tsf(struct mt76x02_dev *dev, bool enable, int interval)
{
u32 val = mt76_rr(dev, MT_BEACON_TIME_CFG);
@ -105,7 +105,7 @@ void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
MT_BEACON_TIME_CFG_TBTT_EN;
}
static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
static void mt76x0_check_mac_err(struct mt76x02_dev *dev)
{
u32 val = mt76_rr(dev, 0x10f4);
@ -120,7 +120,7 @@ static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
}
void mt76x0_mac_work(struct work_struct *work)
{
struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev,
mac_work.work);
struct {
u32 addr_base;
@ -171,7 +171,7 @@ void mt76x0_mac_work(struct work_struct *work)
ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work, 10 * HZ);
}
void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
void mt76x0_mac_set_ampdu_factor(struct mt76x02_dev *dev)
{
struct ieee80211_sta *sta;
struct mt76_wcid *wcid;
@ -195,67 +195,3 @@ void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
mt76_wr(dev, MT_MAX_LEN_CFG, 0xa0fff |
FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));
}
static void
mt76x0_rx_monitor_beacon(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi,
u16 rate, int rssi)
{
dev->bcn_phy_mode = FIELD_GET(MT_RXWI_RATE_PHY, rate);
dev->avg_rssi = ((dev->avg_rssi * 15) / 16 + (rssi << 8)) / 256;
}
static int
mt76x0_rx_is_our_beacon(struct mt76x0_dev *dev, u8 *data)
{
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data;
return ieee80211_is_beacon(hdr->frame_control) &&
ether_addr_equal(hdr->addr2, dev->ap_bssid);
}
u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
void *rxi)
{
struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
struct mt76x02_rxwi *rxwi = rxi;
u32 len, ctl = le32_to_cpu(rxwi->ctl);
u16 rate = le16_to_cpu(rxwi->rate);
int rssi, pad_len = 0;
len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
if (WARN_ON(len < 10))
return 0;
if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
status->flag |= RX_FLAG_DECRYPTED;
status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
}
if (rxwi->rxinfo & MT_RXINFO_L2PAD)
pad_len += 2;
mt76x02_remove_hdr_pad(skb, pad_len);
pskb_trim(skb, len);
status->chains = BIT(0);
rssi = mt76x0_phy_get_rssi(dev, rxwi);
status->chain_signal[0] = status->signal = rssi;
status->freq = dev->mt76.chandef.chan->center_freq;
status->band = dev->mt76.chandef.chan->band;
mt76x02_mac_process_rate(status, rate);
spin_lock_bh(&dev->con_mon_lock);
if (mt76x0_rx_is_our_beacon(dev, skb->data)) {
mt76x0_rx_monitor_beacon(dev, rxwi, rate, rssi);
} else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST)) {
if (dev->avg_rssi == 0)
dev->avg_rssi = rssi;
else
dev->avg_rssi = (dev->avg_rssi * 15) / 16 + rssi / 16;
}
spin_unlock_bh(&dev->con_mon_lock);
return len;
}

20
drivers/net/wireless/mediatek/mt76/mt76x0/mac.h
View File

@ -1,20 +0,0 @@
/*
* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MT76_MAC_H
#define __MT76_MAC_H
u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
void *rxi);
#endif

19
drivers/net/wireless/mediatek/mt76/mt76x0/main.c
View File

@ -13,14 +13,12 @@
* GNU General Public License for more details.
*/
#include "mt76x0.h"
#include "mac.h"
#include "../mt76x02_util.h"
#include <linux/etherdevice.h>
#include "mt76x0.h"
int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int ret = 0;
mutex_lock(&dev->mt76.mutex);
@ -54,7 +52,7 @@ int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
EXPORT_SYMBOL_GPL(mt76x0_config);
static void
mt76x0_addr_wr(struct mt76x0_dev *dev, const u32 offset, const u8 *addr)
mt76x0_addr_wr(struct mt76x02_dev *dev, const u32 offset, const u8 *addr)
{
mt76_wr(dev, offset, get_unaligned_le32(addr));
mt76_wr(dev, offset + 4, addr[4] | addr[5] << 8);
@ -64,13 +62,10 @@ void mt76x0_bss_info_changed(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_bss_conf *info, u32 changed)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
if (changed & BSS_CHANGED_ASSOC)
mt76x0_phy_con_cal_onoff(dev, info);
if (changed & BSS_CHANGED_BSSID) {
mt76x0_addr_wr(dev, MT_MAC_BSSID_DW0, info->bssid);
@ -117,7 +112,7 @@ EXPORT_SYMBOL_GPL(mt76x0_bss_info_changed);
void mt76x0_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
const u8 *mac_addr)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
cancel_delayed_work_sync(&dev->cal_work);
mt76x0_agc_save(dev);
@ -128,7 +123,7 @@ EXPORT_SYMBOL_GPL(mt76x0_sw_scan);
void mt76x0_sw_scan_complete(struct ieee80211_hw *hw,
struct ieee80211_vif *vif)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mt76x0_agc_restore(dev);
clear_bit(MT76_SCANNING, &dev->mt76.state);
@ -140,7 +135,7 @@ EXPORT_SYMBOL_GPL(mt76x0_sw_scan_complete);
int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mt76_rmw_field(dev, MT_TX_RTS_CFG, MT_TX_RTS_CFG_THRESH, value);

8
drivers/net/wireless/mediatek/mt76/mt76x0/mcu.h
View File

@ -17,7 +17,7 @@
#include "../mt76x02_mcu.h"
struct mt76x0_dev;
struct mt76x02_dev;
#define MT_MCU_IVB_SIZE 0x40
#define MT_MCU_DLM_OFFSET 0x80000
@ -41,9 +41,9 @@ enum mcu_calibrate {
MCU_CAL_TX_GROUP_DELAY,
};
int mt76x0e_mcu_init(struct mt76x0_dev *dev);
int mt76x0u_mcu_init(struct mt76x0_dev *dev);
static inline int mt76x0_firmware_running(struct mt76x0_dev *dev)
int mt76x0e_mcu_init(struct mt76x02_dev *dev);
int mt76x0u_mcu_init(struct mt76x02_dev *dev);
static inline int mt76x0_firmware_running(struct mt76x02_dev *dev)
{
return mt76_rr(dev, MT_MCU_COM_REG0) == 1;
}

135
drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h
View File

@ -25,114 +25,33 @@
#include <net/mac80211.h>
#include <linux/debugfs.h>
#include "../mt76.h"
#include "../mt76x02_regs.h"
#include "../mt76x02_mac.h"
#include "../mt76x02.h"
#include "eeprom.h"
#define MT_CALIBRATE_INTERVAL (4 * HZ)
#define MT_FREQ_CAL_INIT_DELAY (30 * HZ)
#define MT_FREQ_CAL_CHECK_INTERVAL (10 * HZ)
#define MT_FREQ_CAL_ADJ_INTERVAL (HZ / 2)
#define MT_BBP_REG_VERSION 0x00
#define MT_USB_AGGR_SIZE_LIMIT 21 /* * 1024B */
#define MT_USB_AGGR_TIMEOUT 0x80 /* * 33ns */
struct mac_stats {
u64 rx_stat[6];
u64 tx_stat[6];
u64 aggr_stat[2];
u64 aggr_n[32];
u64 zero_len_del[2];
};
struct mt76x0_eeprom_params;
#define MT_EE_TEMPERATURE_SLOPE 39
#define MT_FREQ_OFFSET_INVALID -128
/* addr req mask */
#define MT_VEND_TYPE_EEPROM BIT(31)
#define MT_VEND_TYPE_CFG BIT(30)
#define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
#define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
enum mt_bw {
MT_BW_20,
MT_BW_40,
};
/**
* struct mt76x0_dev - adapter structure
* @lock: protects @wcid->tx_rate.
* @mac_lock: locks out mac80211's tx status and rx paths.
* @con_mon_lock: protects @ap_bssid, @bcn_*, @avg_rssi.
* @mutex: ensures exclusive access from mac80211 callbacks.
* @reg_atomic_mutex: ensures atomicity of indirect register accesses
* (accesses to RF and BBP).
* @hw_atomic_mutex: ensures exclusive access to HW during critical
* operations (power management, channel switch).
*/
struct mt76x0_dev {
struct mt76_dev mt76; /* must be first */
u8 data[32];
struct delayed_work cal_work;
struct delayed_work mac_work;
spinlock_t mac_lock;
struct mt76x0_caldata caldata;
struct mutex reg_atomic_mutex;
struct mutex hw_atomic_mutex;
atomic_t avg_ampdu_len;
/* Connection monitoring things */
spinlock_t con_mon_lock;
u8 ap_bssid[ETH_ALEN];
s8 bcn_freq_off;
u8 bcn_phy_mode;
int avg_rssi; /* starts at 0 and converges */
u8 agc_save;
bool no_2ghz;
struct mac_stats stats;
};
static inline bool is_mt7610e(struct mt76x0_dev *dev)
static inline bool is_mt7610e(struct mt76x02_dev *dev)
{
/* TODO */
return false;
}
void mt76x0_init_debugfs(struct mt76x0_dev *dev);
/* Compatibility with mt76 */
#define mt76_rmw_field(_dev, _reg, _field, _val) \
mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
void mt76x0_init_debugfs(struct mt76x02_dev *dev);
/* Init */
struct mt76x0_dev *
struct mt76x02_dev *
mt76x0_alloc_device(struct device *pdev,
const struct mt76_driver_ops *drv_ops,
const struct ieee80211_ops *ops);
int mt76x0_init_hardware(struct mt76x0_dev *dev);
int mt76x0_register_device(struct mt76x0_dev *dev);
void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset);
int mt76x0_init_hardware(struct mt76x02_dev *dev);
int mt76x0_register_device(struct mt76x02_dev *dev);
void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset);
int mt76x0_mac_start(struct mt76x0_dev *dev);
void mt76x0_mac_stop(struct mt76x0_dev *dev);
int mt76x0_mac_start(struct mt76x02_dev *dev);
void mt76x0_mac_stop(struct mt76x02_dev *dev);
int mt76x0_config(struct ieee80211_hw *hw, u32 changed);
void mt76x0_bss_info_changed(struct ieee80211_hw *hw,
@ -145,35 +64,21 @@ void mt76x0_sw_scan_complete(struct ieee80211_hw *hw,
int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value);
/* PHY */
void mt76x0_phy_init(struct mt76x0_dev *dev);
int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev);
void mt76x0_agc_save(struct mt76x0_dev *dev);
void mt76x0_agc_restore(struct mt76x0_dev *dev);
int mt76x0_phy_set_channel(struct mt76x0_dev *dev,
void mt76x0_phy_init(struct mt76x02_dev *dev);
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev);
void mt76x0_agc_save(struct mt76x02_dev *dev);
void mt76x0_agc_restore(struct mt76x02_dev *dev);
int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef);
void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev);
int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi);
void mt76x0_phy_con_cal_onoff(struct mt76x0_dev *dev,
struct ieee80211_bss_conf *info);
void mt76x0_phy_set_txpower(struct mt76x0_dev *dev);
void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev);
void mt76x0_phy_set_txpower(struct mt76x02_dev *dev);
/* MAC */
void mt76x0_mac_work(struct work_struct *work);
void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
void mt76x0_mac_set_protection(struct mt76x02_dev *dev, bool legacy_prot,
int ht_mode);
void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb);
void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval);
void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev);
/* TX */
void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb);
struct mt76x02_txwi *
mt76x0_push_txwi(struct mt76x0_dev *dev, struct sk_buff *skb,
struct ieee80211_sta *sta, struct mt76_wcid *wcid,
int pkt_len);
void mt76x0_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb);
void mt76x0_mac_set_short_preamble(struct mt76x02_dev *dev, bool short_preamb);
void mt76x0_mac_config_tsf(struct mt76x02_dev *dev, bool enable, int interval);
void mt76x0_mac_set_ampdu_factor(struct mt76x02_dev *dev);
#endif

44
drivers/net/wireless/mediatek/mt76/mt76x0/pci.c
View File

@ -20,16 +20,14 @@
#include "mt76x0.h"
#include "mcu.h"
#include "../mt76x02_dma.h"
#include "../mt76x02_util.h"
static int mt76x0e_start(struct ieee80211_hw *hw)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
mt76x02_mac_start(&dev->mt76);
mt76x02_mac_start(dev);
ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work,
MT_CALIBRATE_INTERVAL);
ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
@ -41,13 +39,8 @@ static int mt76x0e_start(struct ieee80211_hw *hw)
return 0;
}
static void mt76x0e_stop(struct ieee80211_hw *hw)
static void mt76x0e_stop_hw(struct mt76x02_dev *dev)
{
struct mt76x0_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
cancel_delayed_work_sync(&dev->cal_work);
cancel_delayed_work_sync(&dev->mac_work);
@ -62,12 +55,20 @@ static void mt76x0e_stop(struct ieee80211_hw *hw)
0, 1000))
dev_warn(dev->mt76.dev, "TX DMA did not stop\n");
mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_EN);
}
static void mt76x0e_stop(struct ieee80211_hw *hw)
{
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
mt76x0e_stop_hw(dev);
mutex_unlock(&dev->mt76.mutex);
}
static const struct ieee80211_ops mt76x0e_ops = {
.tx = mt76x0_tx,
.tx = mt76x02_tx,
.start = mt76x0e_start,
.stop = mt76x0e_stop,
.config = mt76x0_config,
@ -76,7 +77,7 @@ static const struct ieee80211_ops mt76x0e_ops = {
.configure_filter = mt76x02_configure_filter,
};
static int mt76x0e_register_device(struct mt76x0_dev *dev)
static int mt76x0e_register_device(struct mt76x02_dev *dev)
{
int err;
@ -84,12 +85,12 @@ static int mt76x0e_register_device(struct mt76x0_dev *dev)
if (!mt76x02_wait_for_mac(&dev->mt76))
return -ETIMEDOUT;
mt76x02_dma_disable(&dev->mt76);
mt76x02_dma_disable(dev);
err = mt76x0e_mcu_init(dev);
if (err < 0)
return err;
err = mt76x02_dma_init(&dev->mt76);
err = mt76x02_dma_init(dev);
if (err < 0)
return err;
@ -123,8 +124,8 @@ static int mt76x0e_register_device(struct mt76x0_dev *dev)
static int
mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct mt76x0_dev *dev;
int ret = -ENODEV;
struct mt76x02_dev *dev;
int ret;
ret = pcim_enable_device(pdev);
if (ret)
@ -160,12 +161,23 @@ error:
return ret;
}
static void mt76x0e_cleanup(struct mt76x02_dev *dev)
{
clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
mt76x0_chip_onoff(dev, false, false);
mt76x0e_stop_hw(dev);
mt76x02_dma_cleanup(dev);
mt76x02_mcu_cleanup(&dev->mt76);
}
static void
mt76x0e_remove(struct pci_dev *pdev)
{
struct mt76_dev *mdev = pci_get_drvdata(pdev);
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
mt76_unregister_device(mdev);
mt76x0e_cleanup(dev);
ieee80211_free_hw(mdev->hw);
}

4
drivers/net/wireless/mediatek/mt76/mt76x0/pci_mcu.c
View File

@ -24,7 +24,7 @@
#define MT_MCU_IVB_ADDR (MT_MCU_ILM_ADDR + 0x54000 - MT_MCU_IVB_SIZE)
static int mt76x0e_load_firmware(struct mt76x0_dev *dev)
static int mt76x0e_load_firmware(struct mt76x02_dev *dev)
{
bool is_combo_chip = mt76_chip(&dev->mt76) != 0x7610;
u32 val, ilm_len, dlm_len, offset = 0;
@ -126,7 +126,7 @@ out:
return err;
}
int mt76x0e_mcu_init(struct mt76x0_dev *dev)
int mt76x0e_mcu_init(struct mt76x02_dev *dev)
{
static const struct mt76_mcu_ops mt76x0e_mcu_ops = {
.mcu_msg_alloc = mt76x02_mcu_msg_alloc,

112
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
View File

@ -26,7 +26,7 @@
#include <linux/etherdevice.h>
static int
mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
mt76x0_rf_csr_wr(struct mt76x02_dev *dev, u32 offset, u8 value)
{
int ret = 0;
u8 bank, reg;
@ -40,7 +40,7 @@ mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)
return -EINVAL;
mutex_lock(&dev->reg_atomic_mutex);
mutex_lock(&dev->phy_mutex);
if (!mt76_poll(dev, MT_RF_CSR_CFG, MT_RF_CSR_CFG_KICK, 0, 100)) {
ret = -ETIMEDOUT;
@ -55,7 +55,7 @@ mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
MT_RF_CSR_CFG_KICK);
trace_mt76x0_rf_write(&dev->mt76, bank, offset, value);
out:
mutex_unlock(&dev->reg_atomic_mutex);
mutex_unlock(&dev->phy_mutex);
if (ret < 0)
dev_err(dev->mt76.dev, "Error: RF write %d:%d failed:%d!!\n",
@ -64,8 +64,7 @@ out:
return ret;
}
static int
mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset)
{
int ret = -ETIMEDOUT;
u32 val;
@ -80,7 +79,7 @@ mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)
return -EINVAL;
mutex_lock(&dev->reg_atomic_mutex);
mutex_lock(&dev->phy_mutex);
if (!mt76_poll(dev, MT_RF_CSR_CFG, MT_RF_CSR_CFG_KICK, 0, 100))
goto out;
@ -100,7 +99,7 @@ mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
trace_mt76x0_rf_read(&dev->mt76, bank, offset, ret);
}
out:
mutex_unlock(&dev->reg_atomic_mutex);
mutex_unlock(&dev->phy_mutex);
if (ret < 0)
dev_err(dev->mt76.dev, "Error: RF read %d:%d failed:%d!!\n",
@ -110,7 +109,7 @@ out:
}
static int
rf_wr(struct mt76x0_dev *dev, u32 offset, u8 val)
rf_wr(struct mt76x02_dev *dev, u32 offset, u8 val)
{
if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state)) {
struct mt76_reg_pair pair = {
@ -126,7 +125,7 @@ rf_wr(struct mt76x0_dev *dev, u32 offset, u8 val)
}
static int
rf_rr(struct mt76x0_dev *dev, u32 offset)
rf_rr(struct mt76x02_dev *dev, u32 offset)
{
int ret;
u32 val;
@ -147,7 +146,7 @@ rf_rr(struct mt76x0_dev *dev, u32 offset)
}
static int
rf_rmw(struct mt76x0_dev *dev, u32 offset, u8 mask, u8 val)
rf_rmw(struct mt76x02_dev *dev, u32 offset, u8 mask, u8 val)
{
int ret;
@ -163,14 +162,14 @@ rf_rmw(struct mt76x0_dev *dev, u32 offset, u8 mask, u8 val)
}
static int
rf_set(struct mt76x0_dev *dev, u32 offset, u8 val)
rf_set(struct mt76x02_dev *dev, u32 offset, u8 val)
{
return rf_rmw(dev, offset, 0, val);
}
#if 0
static int
rf_clear(struct mt76x0_dev *dev, u32 offset, u8 mask)
rf_clear(struct mt76x02_dev *dev, u32 offset, u8 mask)
{
return rf_rmw(dev, offset, mask, 0);
}
@ -180,7 +179,7 @@ rf_clear(struct mt76x0_dev *dev, u32 offset, u8 mask)
mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, \
tab, ARRAY_SIZE(tab))
int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev)
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev)
{
int i = 20;
u32 val;
@ -201,7 +200,7 @@ int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev)
}
static void
mt76x0_bbp_set_ctrlch(struct mt76x0_dev *dev, enum nl80211_chan_width width,
mt76x0_bbp_set_ctrlch(struct mt76x02_dev *dev, enum nl80211_chan_width width,
u8 ctrl)
{
int core_val, agc_val;
@ -227,14 +226,7 @@ mt76x0_bbp_set_ctrlch(struct mt76x0_dev *dev, enum nl80211_chan_width width,
mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
}
int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi)
{
struct mt76x0_caldata *caldata = &dev->caldata;
return rxwi->rssi[0] + caldata->rssi_offset[0] - caldata->lna_gain;
}
static void mt76x0_vco_cal(struct mt76x0_dev *dev, u8 channel)
static void mt76x0_vco_cal(struct mt76x02_dev *dev, u8 channel)
{
u8 val;
@ -291,14 +283,14 @@ static void mt76x0_vco_cal(struct mt76x0_dev *dev, u8 channel)
}
static void
mt76x0_mac_set_ctrlch(struct mt76x0_dev *dev, bool primary_upper)
mt76x0_mac_set_ctrlch(struct mt76x02_dev *dev, bool primary_upper)
{
mt76_rmw_field(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_UPPER_40M,
primary_upper);
}
static void
mt76x0_phy_set_band(struct mt76x0_dev *dev, enum nl80211_band band)
mt76x0_phy_set_band(struct mt76x02_dev *dev, enum nl80211_band band)
{
switch (band) {
case NL80211_BAND_2GHZ:
@ -331,7 +323,7 @@ mt76x0_phy_set_band(struct mt76x0_dev *dev, enum nl80211_band band)
}
static void
mt76x0_phy_set_chan_rf_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band)
mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_band)
{
u16 rf_band = rf_bw_band & 0xff00;
u16 rf_bw = rf_bw_band & 0x00ff;
@ -522,7 +514,7 @@ mt76x0_phy_set_chan_rf_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band
}
static void
mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band)
mt76x0_phy_set_chan_bbp_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_band)
{
int i;
@ -538,7 +530,7 @@ mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_ban
u8 gain;
gain = FIELD_GET(MT_BBP_AGC_GAIN, val);
gain -= dev->caldata.lna_gain * 2;
gain -= dev->cal.rx.lna_gain * 2;
val &= ~MT_BBP_AGC_GAIN;
val |= FIELD_PREP(MT_BBP_AGC_GAIN, gain);
mt76_wr(dev, pair->reg, val);
@ -548,7 +540,7 @@ mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_ban
}
}
static void mt76x0_ant_select(struct mt76x0_dev *dev)
static void mt76x0_ant_select(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
@ -568,7 +560,7 @@ static void mt76x0_ant_select(struct mt76x0_dev *dev)
}
static void
mt76x0_bbp_set_bw(struct mt76x0_dev *dev, enum nl80211_chan_width width)
mt76x0_bbp_set_bw(struct mt76x02_dev *dev, enum nl80211_chan_width width)
{
enum { BW_20 = 0, BW_40 = 1, BW_80 = 2, BW_10 = 4};
int bw;
@ -598,7 +590,7 @@ mt76x0_bbp_set_bw(struct mt76x0_dev *dev, enum nl80211_chan_width width)
mt76x02_mcu_function_select(&dev->mt76, BW_SETTING, bw, false);
}
void mt76x0_phy_set_txpower(struct mt76x0_dev *dev)
void mt76x0_phy_set_txpower(struct mt76x02_dev *dev)
{
struct mt76_rate_power *t = &dev->mt76.rate_power;
u8 info[2];
@ -614,9 +606,8 @@ void mt76x0_phy_set_txpower(struct mt76x0_dev *dev)
mt76x02_phy_set_txpower(&dev->mt76, info[0], info[1]);
}
static int
__mt76x0_phy_set_channel(struct mt76x0_dev *dev,
struct cfg80211_chan_def *chandef)
int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef)
{
u32 ext_cca_chan[4] = {
[0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |
@ -713,19 +704,7 @@ __mt76x0_phy_set_channel(struct mt76x0_dev *dev,
return 0;
}
int mt76x0_phy_set_channel(struct mt76x0_dev *dev,
struct cfg80211_chan_def *chandef)
{
int ret;
mutex_lock(&dev->hw_atomic_mutex);
ret = __mt76x0_phy_set_channel(dev, chandef);
mutex_unlock(&dev->hw_atomic_mutex);
return ret;
}
void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev)
void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev)
{
u32 tx_alc, reg_val;
u8 channel = dev->mt76.chandef.chan->hw_value;
@ -761,18 +740,18 @@ void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev)
mt76x02_mcu_calibrate(&dev->mt76, MCU_CAL_RXDCOC, 1, false);
}
void mt76x0_agc_save(struct mt76x0_dev *dev)
void mt76x0_agc_save(struct mt76x02_dev *dev)
{
/* Only one RX path */
dev->agc_save = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, 8)));
}
void mt76x0_agc_restore(struct mt76x0_dev *dev)
void mt76x0_agc_restore(struct mt76x02_dev *dev)
{
mt76_rmw_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN, dev->agc_save);
}
static void mt76x0_temp_sensor(struct mt76x0_dev *dev)
static void mt76x0_temp_sensor(struct mt76x02_dev *dev)
{
u8 rf_b7_73, rf_b0_66, rf_b0_67;
int cycle, temp;
@ -808,7 +787,7 @@ static void mt76x0_temp_sensor(struct mt76x0_dev *dev)
else
sval |= 0xffffff00; /* Negative */
temp = (35 * (sval - dev->caldata.temp_offset)) / 10 + 25;
temp = (35 * (sval - dev->cal.rx.temp_offset)) / 10 + 25;
done:
rf_wr(dev, MT_RF(7, 73), rf_b7_73);
@ -816,14 +795,17 @@ done:
rf_wr(dev, MT_RF(0, 73), rf_b0_67);
}
static void mt76x0_dynamic_vga_tuning(struct mt76x0_dev *dev)
static void mt76x0_dynamic_vga_tuning(struct mt76x02_dev *dev)
{
struct cfg80211_chan_def *chandef = &dev->mt76.chandef;
u32 val, init_vga;
int avg_rssi;
init_vga = (dev->mt76.chandef.chan->band == NL80211_BAND_5GHZ) ? 0x54 : 0x4E;
if (dev->avg_rssi > -60)
init_vga = chandef->chan->band == NL80211_BAND_5GHZ ? 0x54 : 0x4E;
avg_rssi = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
if (avg_rssi > -60)
init_vga -= 0x20;
else if (dev->avg_rssi > -70)
else if (avg_rssi > -70)
init_vga -= 0x10;
val = mt76_rr(dev, MT_BBP(AGC, 8));
@ -834,8 +816,8 @@ static void mt76x0_dynamic_vga_tuning(struct mt76x0_dev *dev)
static void mt76x0_phy_calibrate(struct work_struct *work)
{
struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
cal_work.work);
struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev,
cal_work.work);
mt76x0_dynamic_vga_tuning(dev);
mt76x0_temp_sensor(dev);
@ -844,19 +826,7 @@ static void mt76x0_phy_calibrate(struct work_struct *work)
MT_CALIBRATE_INTERVAL);
}
void mt76x0_phy_con_cal_onoff(struct mt76x0_dev *dev,
struct ieee80211_bss_conf *info)
{
/* Start/stop collecting beacon data */
spin_lock_bh(&dev->con_mon_lock);
ether_addr_copy(dev->ap_bssid, info->bssid);
dev->avg_rssi = 0;
dev->bcn_freq_off = MT_FREQ_OFFSET_INVALID;
spin_unlock_bh(&dev->con_mon_lock);
}
static void
mt76x0_rf_init(struct mt76x0_dev *dev)
static void mt76x0_rf_init(struct mt76x02_dev *dev)
{
int i;
u8 val;
@ -889,7 +859,7 @@ mt76x0_rf_init(struct mt76x0_dev *dev)
E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1>
*/
rf_wr(dev, MT_RF(0, 22),
min_t(u8, dev->caldata.freq_offset, 0xbf));
min_t(u8, dev->cal.rx.freq_offset, 0xbf));
val = rf_rr(dev, MT_RF(0, 22));
/*
@ -909,7 +879,7 @@ mt76x0_rf_init(struct mt76x0_dev *dev)
rf_set(dev, MT_RF(0, 4), 0x80);
}
void mt76x0_phy_init(struct mt76x0_dev *dev)
void mt76x0_phy_init(struct mt76x02_dev *dev)
{
INIT_DELAYED_WORK(&dev->cal_work, mt76x0_phy_calibrate);

1
drivers/net/wireless/mediatek/mt76/mt76x0/trace.h
View File

@ -17,7 +17,6 @@
#include <linux/tracepoint.h>
#include "mt76x0.h"
#include "mac.h"
#undef TRACE_SYSTEM
#define TRACE_SYSTEM mt76x0

101
drivers/net/wireless/mediatek/mt76/mt76x0/tx.c
View File

@ -1,101 +0,0 @@
/*
* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "mt76x0.h"
#include "trace.h"
#include "../mt76x02_util.h"
#include "../mt76x02_usb.h"
struct mt76x02_txwi *
mt76x0_push_txwi(struct mt76x0_dev *dev, struct sk_buff *skb,
struct ieee80211_sta *sta, struct mt76_wcid *wcid,
int pkt_len)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_tx_rate *rate = &info->control.rates[0];
struct mt76x02_txwi *txwi;
unsigned long flags;
u16 rate_ctl;
u8 nss;
txwi = (struct mt76x02_txwi *)skb_push(skb, sizeof(struct mt76x02_txwi));
memset(txwi, 0, sizeof(*txwi));
if (!wcid->tx_rate_set)
ieee80211_get_tx_rates(info->control.vif, sta, skb,
info->control.rates, 1);
spin_lock_irqsave(&dev->mt76.lock, flags);
if (rate->idx < 0 || !rate->count) {
rate_ctl = wcid->tx_rate;
nss = wcid->tx_rate_nss;
} else {
rate_ctl = mt76x02_mac_tx_rate_val(&dev->mt76, rate, &nss);
}
spin_unlock_irqrestore(&dev->mt76.lock, flags);
txwi->wcid = wcid->idx;
txwi->rate = cpu_to_le16(rate_ctl);
txwi->pktid = (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) ? 1 : 0;
mt76x02_mac_fill_txwi(txwi, skb, sta, pkt_len, nss);
return txwi;
}
EXPORT_SYMBOL_GPL(mt76x0_push_txwi);
void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct mt76x0_dev *dev = hw->priv;
struct ieee80211_vif *vif = info->control.vif;
struct mt76_wcid *wcid = &dev->mt76.global_wcid;
if (control->sta) {
struct mt76x02_sta *msta;
msta = (struct mt76x02_sta *)control->sta->drv_priv;
wcid = &msta->wcid;
/* sw encrypted frames */
if (!info->control.hw_key && wcid->hw_key_idx != 0xff)
control->sta = NULL;
}
if (vif && !control->sta) {
struct mt76x02_vif *mvif;
mvif = (struct mt76x02_vif *)vif->drv_priv;
wcid = &mvif->group_wcid;
}
mt76_tx(&dev->mt76, control->sta, wcid, skb);
}
EXPORT_SYMBOL_GPL(mt76x0_tx);
void mt76x0_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb)
{
struct mt76x0_dev *dev = container_of(mdev, struct mt76x0_dev, mt76);
void *rxwi = skb->data;
skb_pull(skb, sizeof(struct mt76x02_rxwi));
if (!mt76x0_mac_process_rx(dev, skb, rxwi)) {
dev_kfree_skb(skb);
return;
}
mt76_rx(&dev->mt76, q, skb);
}
EXPORT_SYMBOL_GPL(mt76x0_queue_rx_skb);

70
drivers/net/wireless/mediatek/mt76/mt76x0/usb.c
View File

@ -18,7 +18,6 @@
#include "mt76x0.h"
#include "mcu.h"
#include "trace.h"
#include "../mt76x02_util.h"
#include "../mt76x02_usb.h"
static struct usb_device_id mt76x0_device_table[] = {
@ -49,7 +48,7 @@ static struct usb_device_id mt76x0_device_table[] = {
{ 0, }
};
static void mt76x0_init_usb_dma(struct mt76x0_dev *dev)
static void mt76x0_init_usb_dma(struct mt76x02_dev *dev)
{
u32 val;
@ -76,7 +75,7 @@ static void mt76x0_init_usb_dma(struct mt76x0_dev *dev)
mt76_wr(dev, MT_USB_DMA_CFG, val);
}
static void mt76x0u_cleanup(struct mt76x0_dev *dev)
static void mt76x0u_cleanup(struct mt76x02_dev *dev)
{
clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
mt76x0_chip_onoff(dev, false, false);
@ -84,16 +83,16 @@ static void mt76x0u_cleanup(struct mt76x0_dev *dev)
mt76u_mcu_deinit(&dev->mt76);
}
static void mt76x0u_mac_stop(struct mt76x0_dev *dev)
static void mt76x0u_mac_stop(struct mt76x02_dev *dev)
{
if (test_bit(MT76_REMOVED, &dev->mt76.state))
return;
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
cancel_delayed_work_sync(&dev->cal_work);
cancel_delayed_work_sync(&dev->mac_work);
mt76u_stop_stat_wk(&dev->mt76);
if (test_bit(MT76_REMOVED, &dev->mt76.state))
return;
mt76_clear(dev, MT_BEACON_TIME_CFG, MT_BEACON_TIME_CFG_TIMER_EN |
MT_BEACON_TIME_CFG_SYNC_MODE | MT_BEACON_TIME_CFG_TBTT_EN |
MT_BEACON_TIME_CFG_BEACON_TX);
@ -109,7 +108,7 @@ static void mt76x0u_mac_stop(struct mt76x0_dev *dev)
static int mt76x0u_start(struct ieee80211_hw *hw)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int ret;
mutex_lock(&dev->mt76.mutex);
@ -131,7 +130,7 @@ out:
static void mt76x0u_stop(struct ieee80211_hw *hw)
{
struct mt76x0_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
mt76x0u_mac_stop(dev);
@ -139,7 +138,7 @@ static void mt76x0u_stop(struct ieee80211_hw *hw)
}
static const struct ieee80211_ops mt76x0u_ops = {
.tx = mt76x0_tx,
.tx = mt76x02_tx,
.start = mt76x0u_start,
.stop = mt76x0u_stop,
.add_interface = mt76x02_add_interface,
@ -159,48 +158,33 @@ static const struct ieee80211_ops mt76x0u_ops = {
.wake_tx_queue = mt76_wake_tx_queue,
};
static int mt76x0u_tx_prepare_skb(struct mt76_dev *mdev, void *data,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info)
{
struct mt76x0_dev *dev = container_of(mdev, struct mt76x0_dev, mt76);
struct mt76x02_txwi *txwi;
int len = skb->len;
mt76x02_insert_hdr_pad(skb);
txwi = mt76x0_push_txwi(dev, skb, sta, wcid, len);
return mt76x02u_set_txinfo(skb, wcid, q2ep(q->hw_idx));
}
static int mt76x0u_register_device(struct mt76x0_dev *dev)
static int mt76x0u_register_device(struct mt76x02_dev *dev)
{
struct ieee80211_hw *hw = dev->mt76.hw;
int err;
err = mt76u_mcu_init_rx(&dev->mt76);
if (err < 0)
return err;
err = mt76u_alloc_queues(&dev->mt76);
if (err < 0)
return err;
goto out_err;
err = mt76u_mcu_init_rx(&dev->mt76);
if (err < 0)
goto out_err;
mt76x0_chip_onoff(dev, true, true);
if (!mt76x02_wait_for_mac(&dev->mt76)) {
err = -ETIMEDOUT;
goto err;
goto out_err;
}
err = mt76x0u_mcu_init(dev);
if (err < 0)
goto err;
goto out_err;
mt76x0_init_usb_dma(dev);
err = mt76x0_init_hardware(dev);
if (err < 0)
goto err;
goto out_err;
mt76_rmw(dev, MT_US_CYC_CFG, MT_US_CYC_CNT, 0x1e);
mt76_wr(dev, MT_TXOP_CTRL_CFG,
@ -209,7 +193,7 @@ static int mt76x0u_register_device(struct mt76x0_dev *dev)
err = mt76x0_register_device(dev);
if (err < 0)
goto err;
goto out_err;
/* check hw sg support in order to enable AMSDU */
if (mt76u_check_sg(&dev->mt76))
@ -221,7 +205,7 @@ static int mt76x0u_register_device(struct mt76x0_dev *dev)
return 0;
err:
out_err:
mt76x0u_cleanup(dev);
return err;
}
@ -230,13 +214,13 @@ static int mt76x0u_probe(struct usb_interface *usb_intf,
const struct usb_device_id *id)
{
static const struct mt76_driver_ops drv_ops = {
.tx_prepare_skb = mt76x0u_tx_prepare_skb,
.tx_complete_skb = mt76x02_tx_complete_skb,
.tx_prepare_skb = mt76x02u_tx_prepare_skb,
.tx_complete_skb = mt76x02u_tx_complete_skb,
.tx_status_data = mt76x02_tx_status_data,
.rx_skb = mt76x0_queue_rx_skb,
.rx_skb = mt76x02_queue_rx_skb,
};
struct usb_device *usb_dev = interface_to_usbdev(usb_intf);
struct mt76x0_dev *dev;
struct mt76x02_dev *dev;
u32 asic_rev, mac_rev;
int ret;
@ -292,7 +276,7 @@ err:
static void mt76x0_disconnect(struct usb_interface *usb_intf)
{
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
bool initalized = test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
if (!initalized)
@ -310,7 +294,7 @@ static void mt76x0_disconnect(struct usb_interface *usb_intf)
static int __maybe_unused mt76x0_suspend(struct usb_interface *usb_intf,
pm_message_t state)
{
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
struct mt76_usb *usb = &dev->mt76.usb;
mt76u_stop_queues(&dev->mt76);
@ -322,7 +306,7 @@ static int __maybe_unused mt76x0_suspend(struct usb_interface *usb_intf,
static int __maybe_unused mt76x0_resume(struct usb_interface *usb_intf)
{
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
struct mt76_usb *usb = &dev->mt76.usb;
int ret;

6
drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c
View File

@ -25,7 +25,7 @@
#define MT7610U_FIRMWARE "mediatek/mt7610u.bin"
static int
mt76x0u_upload_firmware(struct mt76x0_dev *dev,
mt76x0u_upload_firmware(struct mt76x02_dev *dev,
const struct mt76x02_fw_header *hdr)
{
u8 *fw_payload = (u8 *)(hdr + 1);
@ -76,7 +76,7 @@ out:
return err;
}
static int mt76x0u_load_firmware(struct mt76x0_dev *dev)
static int mt76x0u_load_firmware(struct mt76x02_dev *dev)
{
const struct firmware *fw;
const struct mt76x02_fw_header *hdr;
@ -160,7 +160,7 @@ err_inv_fw:
return -ENOENT;
}
int mt76x0u_mcu_init(struct mt76x0_dev *dev)
int mt76x0u_mcu_init(struct mt76x02_dev *dev)
{
int ret;

208
drivers/net/wireless/mediatek/mt76/mt76x02.h Normal file
View File

@ -0,0 +1,208 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76X02_UTIL_H
#define __MT76X02_UTIL_H
#include <linux/kfifo.h>
#include "mt76.h"
#include "mt76x02_regs.h"
#include "mt76x02_mac.h"
#include "mt76x02_dfs.h"
#include "mt76x02_dma.h"
struct mt76x02_mac_stats {
u64 rx_stat[6];
u64 tx_stat[6];
u64 aggr_stat[2];
u64 aggr_n[32];
u64 zero_len_del[2];
};
#define MT_MAX_CHAINS 2
struct mt76x02_rx_freq_cal {
s8 high_gain[MT_MAX_CHAINS];
s8 rssi_offset[MT_MAX_CHAINS];
s8 lna_gain;
u32 mcu_gain;
s16 temp_offset;
u8 freq_offset;
};
struct mt76x02_calibration {
struct mt76x02_rx_freq_cal rx;
u8 agc_gain_init[MT_MAX_CHAINS];
u8 agc_gain_cur[MT_MAX_CHAINS];
u16 false_cca;
s8 avg_rssi_all;
s8 agc_gain_adjust;
s8 low_gain;
u8 temp;
bool init_cal_done;
bool tssi_cal_done;
bool tssi_comp_pending;
bool dpd_cal_done;
bool channel_cal_done;
};
struct mt76x02_dev {
struct mt76_dev mt76; /* must be first */
struct mac_address macaddr_list[8];
struct mutex phy_mutex;
struct mutex mutex;
u8 txdone_seq;
DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status);
struct sk_buff *rx_head;
struct tasklet_struct tx_tasklet;
struct tasklet_struct pre_tbtt_tasklet;
struct delayed_work cal_work;
struct delayed_work mac_work;
struct mt76x02_mac_stats stats;
atomic_t avg_ampdu_len;
u32 aggr_stats[32];
struct sk_buff *beacons[8];
u8 beacon_mask;
u8 beacon_data_mask;
u8 tbtt_count;
u16 beacon_int;
struct mt76x02_calibration cal;
s8 target_power;
s8 target_power_delta[2];
bool enable_tpc;
bool no_2ghz;
u8 agc_save;
u8 coverage_class;
u8 slottime;
struct mt76x02_dfs_pattern_detector dfs_pd;
};
extern struct ieee80211_rate mt76x02_rates[12];
void mt76x02_configure_filter(struct ieee80211_hw *hw,
unsigned int changed_flags,
unsigned int *total_flags, u64 multicast);
int mt76x02_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
int mt76x02_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
void mt76x02_vif_init(struct mt76_dev *dev, struct ieee80211_vif *vif,
unsigned int idx);
int mt76x02_add_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
void mt76x02_remove_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_ampdu_params *params);
int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
struct ieee80211_key_conf *key);
int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
u16 queue, const struct ieee80211_tx_queue_params *params);
void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
s8 mt76x02_tx_get_max_txpwr_adj(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate);
s8 mt76x02_tx_get_txpwr_adj(struct mt76_dev *mdev, s8 txpwr, s8 max_txpwr_adj);
void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr);
int mt76x02_insert_hdr_pad(struct sk_buff *skb);
void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len);
void mt76x02_tx_complete(struct mt76_dev *dev, struct sk_buff *skb);
bool mt76x02_tx_status_data(struct mt76_dev *dev, u8 *update);
void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb);
void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance);
void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb);
int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info);
extern const u16 mt76x02_beacon_offsets[16];
void mt76x02_set_beacon_offsets(struct mt76_dev *dev);
void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set);
void mt76x02_mac_start(struct mt76x02_dev *dev);
static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask)
{
mt76x02_set_irq_mask(dev, 0, mask);
}
static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask)
{
mt76x02_set_irq_mask(dev, mask, 0);
}
static inline bool
mt76x02_wait_for_txrx_idle(struct mt76_dev *dev)
{
return __mt76_poll_msec(dev, MT_MAC_STATUS,
MT_MAC_STATUS_TX | MT_MAC_STATUS_RX,
0, 100);
}
static inline struct mt76x02_sta *
mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx)
{
struct mt76_wcid *wcid;
if (idx >= ARRAY_SIZE(dev->wcid))
return NULL;
wcid = rcu_dereference(dev->wcid[idx]);
if (!wcid)
return NULL;
return container_of(wcid, struct mt76x02_sta, wcid);
}
static inline struct mt76_wcid *
mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast)
{
if (!sta)
return NULL;
if (unicast)
return &sta->wcid;
else
return &sta->vif->group_wcid;
}
#endif

40
drivers/net/wireless/mediatek/mt76/mt76x2_dfs.h → drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h
View File

@ -14,8 +14,8 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76x2_DFS_H
#define __MT76x2_DFS_H
#ifndef __MT76x02_DFS_H
#define __MT76x02_DFS_H
#include <linux/types.h>
#include <linux/nl80211.h>
@ -49,7 +49,7 @@
#define MT_DFS_ETSI_MAX_PRI (133333 + 125000 + 117647 + 1000)
#define MT_DFS_ETSI_MIN_PRI (4500 - 20)
struct mt76x2_radar_specs {
struct mt76x02_radar_specs {
u8 mode;
u16 avg_len;
u16 e_low;
@ -70,7 +70,7 @@ struct mt76x2_radar_specs {
#define MT_DFS_EVENT_ENGINE(x) (((x) & BIT(31)) ? 2 : 0)
#define MT_DFS_EVENT_TIMESTAMP(x) ((x) & GENMASK(21, 0))
#define MT_DFS_EVENT_WIDTH(x) ((x) & GENMASK(11, 0))
struct mt76x2_dfs_event {
struct mt76x02_dfs_event {
unsigned long fetch_ts;
u32 ts;
u16 width;
@ -78,12 +78,12 @@ struct mt76x2_dfs_event {
};
#define MT_DFS_EVENT_BUFLEN 256
struct mt76x2_dfs_event_rb {
struct mt76x2_dfs_event data[MT_DFS_EVENT_BUFLEN];
struct mt76x02_dfs_event_rb {
struct mt76x02_dfs_event data[MT_DFS_EVENT_BUFLEN];
int h_rb, t_rb;
};
struct mt76x2_dfs_sequence {
struct mt76x02_dfs_sequence {
struct list_head head;
u32 first_ts;
u32 last_ts;
@ -92,7 +92,7 @@ struct mt76x2_dfs_sequence {
u8 engine;
};
struct mt76x2_dfs_hw_pulse {
struct mt76x02_dfs_hw_pulse {
u8 engine;
u32 period;
u32 w1;
@ -100,47 +100,41 @@ struct mt76x2_dfs_hw_pulse {
u32 burst;
};
struct mt76x2_dfs_sw_detector_params {
struct mt76x02_dfs_sw_detector_params {
u32 min_pri;
u32 max_pri;
u32 pri_margin;
};
struct mt76x2_dfs_engine_stats {
struct mt76x02_dfs_engine_stats {
u32 hw_pattern;
u32 hw_pulse_discarded;
u32 sw_pattern;
};
struct mt76x2_dfs_seq_stats {
struct mt76x02_dfs_seq_stats {
u32 seq_pool_len;
u32 seq_len;
};
struct mt76x2_dfs_pattern_detector {
struct mt76x02_dfs_pattern_detector {
enum nl80211_dfs_regions region;
u8 chirp_pulse_cnt;
u32 chirp_pulse_ts;
struct mt76x2_dfs_sw_detector_params sw_dpd_params;
struct mt76x2_dfs_event_rb event_rb[2];
struct mt76x02_dfs_sw_detector_params sw_dpd_params;
struct mt76x02_dfs_event_rb event_rb[2];
struct list_head sequences;
struct list_head seq_pool;
struct mt76x2_dfs_seq_stats seq_stats;
struct mt76x02_dfs_seq_stats seq_stats;
unsigned long last_sw_check;
u32 last_event_ts;
struct mt76x2_dfs_engine_stats stats[MT_DFS_NUM_ENGINES];
struct mt76x02_dfs_engine_stats stats[MT_DFS_NUM_ENGINES];
struct tasklet_struct dfs_tasklet;
};
void mt76x2_dfs_init_params(struct mt76x2_dev *dev);
void mt76x2_dfs_init_detector(struct mt76x2_dev *dev);
void mt76x2_dfs_adjust_agc(struct mt76x2_dev *dev);
void mt76x2_dfs_set_domain(struct mt76x2_dev *dev,
enum nl80211_dfs_regions region);
#endif /* __MT76x2_DFS_H */
#endif /* __MT76x02_DFS_H */

8
drivers/net/wireless/mediatek/mt76/mt76x02_dma.h
View File

@ -17,8 +17,8 @@
#ifndef __MT76x02_DMA_H
#define __MT76x02_DMA_H
#include "mt76x02.h"
#include "dma.h"
#include "mt76x02_regs.h"
#define MT_TXD_INFO_LEN GENMASK(15, 0)
#define MT_TXD_INFO_NEXT_VLD BIT(16)
@ -70,8 +70,8 @@ mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
0, timeout);
}
int mt76x02_dma_init(struct mt76_dev *dev);
void mt76x02_dma_enable(struct mt76_dev *dev);
void mt76x02_dma_disable(struct mt76_dev *dev);
int mt76x02_dma_init(struct mt76x02_dev *dev);
void mt76x02_dma_disable(struct mt76x02_dev *dev);
void mt76x02_dma_cleanup(struct mt76x02_dev *dev);
#endif /* __MT76x02_DMA_H */

239
drivers/net/wireless/mediatek/mt76/mt76x02_mac.c
View File

@ -15,9 +15,8 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "mt76.h"
#include "mt76x02_regs.h"
#include "mt76x02_mac.h"
#include "mt76x02.h"
#include "mt76x02_trace.h"
enum mt76x02_cipher_type
mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
@ -156,8 +155,9 @@ void mt76x02_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
}
EXPORT_SYMBOL_GPL(mt76x02_txq_init);
void mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
struct ieee80211_sta *sta, int len, u8 nss)
static void
mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
struct ieee80211_sta *sta, int len, u8 nss)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
@ -196,9 +196,8 @@ void mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
txwi->flags |= cpu_to_le16(txwi_flags);
txwi->len_ctl = cpu_to_le16(len);
}
EXPORT_SYMBOL_GPL(mt76x02_mac_fill_txwi);
__le16
static __le16
mt76x02_mac_tx_rate_val(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate, u8 *nss_val)
{
@ -248,7 +247,6 @@ mt76x02_mac_tx_rate_val(struct mt76_dev *dev,
*nss_val = nss;
return cpu_to_le16(rateval);
}
EXPORT_SYMBOL_GPL(mt76x02_mac_tx_rate_val);
void mt76x02_mac_wcid_set_rate(struct mt76_dev *dev, struct mt76_wcid *wcid,
const struct ieee80211_tx_rate *rate)
@ -341,6 +339,66 @@ mt76x02_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
return 0;
}
void mt76x02_mac_write_txwi(struct mt76_dev *dev, struct mt76x02_txwi *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int len)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_tx_rate *rate = &info->control.rates[0];
struct ieee80211_key_conf *key = info->control.hw_key;
u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
u8 nss;
s8 txpwr_adj, max_txpwr_adj;
u8 ccmp_pn[8], nstreams = dev->chainmask & 0xf;
memset(txwi, 0, sizeof(*txwi));
if (wcid)
txwi->wcid = wcid->idx;
else
txwi->wcid = 0xff;
txwi->pktid = 1;
if (wcid && wcid->sw_iv && key) {
u64 pn = atomic64_inc_return(&key->tx_pn);
ccmp_pn[0] = pn;
ccmp_pn[1] = pn >> 8;
ccmp_pn[2] = 0;
ccmp_pn[3] = 0x20 | (key->keyidx << 6);
ccmp_pn[4] = pn >> 16;
ccmp_pn[5] = pn >> 24;
ccmp_pn[6] = pn >> 32;
ccmp_pn[7] = pn >> 40;
txwi->iv = *((__le32 *)&ccmp_pn[0]);
txwi->eiv = *((__le32 *)&ccmp_pn[1]);
}
spin_lock_bh(&dev->lock);
if (wcid && (rate->idx < 0 || !rate->count)) {
txwi->rate = wcid->tx_rate;
max_txpwr_adj = wcid->max_txpwr_adj;
nss = wcid->tx_rate_nss;
} else {
txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);
max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
}
spin_unlock_bh(&dev->lock);
txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->txpower_conf,
max_txpwr_adj);
txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E4)
txwi->txstream = 0x13;
else if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E3 &&
!(txwi->rate & cpu_to_le16(rate_ht_mask)))
txwi->txstream = 0x93;
mt76x02_mac_fill_txwi(txwi, skb, sta, len, nss);
}
EXPORT_SYMBOL_GPL(mt76x02_mac_write_txwi);
static void
mt76x02_mac_fill_tx_status(struct mt76_dev *dev,
struct ieee80211_tx_info *info,
@ -520,3 +578,168 @@ void mt76x02_mac_setaddr(struct mt76_dev *dev, u8 *addr)
FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));
}
EXPORT_SYMBOL_GPL(mt76x02_mac_setaddr);
static int
mt76x02_mac_get_rssi(struct mt76x02_dev *dev, s8 rssi, int chain)
{
struct mt76x02_rx_freq_cal *cal = &dev->cal.rx;
rssi += cal->rssi_offset[chain];
rssi -= cal->lna_gain;
return rssi;
}
int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb,
void *rxi)
{
struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
struct mt76x02_rxwi *rxwi = rxi;
struct mt76x02_sta *sta;
u32 rxinfo = le32_to_cpu(rxwi->rxinfo);
u32 ctl = le32_to_cpu(rxwi->ctl);
u16 rate = le16_to_cpu(rxwi->rate);
u16 tid_sn = le16_to_cpu(rxwi->tid_sn);
bool unicast = rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST);
int i, pad_len = 0, nstreams = dev->mt76.chainmask & 0xf;
s8 signal;
u8 pn_len;
u8 wcid;
int len;
if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
return -EINVAL;
if (rxinfo & MT_RXINFO_L2PAD)
pad_len += 2;
if (rxinfo & MT_RXINFO_DECRYPT) {
status->flag |= RX_FLAG_DECRYPTED;
status->flag |= RX_FLAG_MMIC_STRIPPED;
status->flag |= RX_FLAG_MIC_STRIPPED;
status->flag |= RX_FLAG_IV_STRIPPED;
}
wcid = FIELD_GET(MT_RXWI_CTL_WCID, ctl);
sta = mt76x02_rx_get_sta(&dev->mt76, wcid);
status->wcid = mt76x02_rx_get_sta_wcid(sta, unicast);
len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
pn_len = FIELD_GET(MT_RXINFO_PN_LEN, rxinfo);
if (pn_len) {
int offset = ieee80211_get_hdrlen_from_skb(skb) + pad_len;
u8 *data = skb->data + offset;
status->iv[0] = data[7];
status->iv[1] = data[6];
status->iv[2] = data[5];
status->iv[3] = data[4];
status->iv[4] = data[1];
status->iv[5] = data[0];
/*
* Driver CCMP validation can't deal with fragments.
* Let mac80211 take care of it.
*/
if (rxinfo & MT_RXINFO_FRAG) {
status->flag &= ~RX_FLAG_IV_STRIPPED;
} else {
pad_len += pn_len << 2;
len -= pn_len << 2;
}
}
mt76x02_remove_hdr_pad(skb, pad_len);
if ((rxinfo & MT_RXINFO_BA) && !(rxinfo & MT_RXINFO_NULL))
status->aggr = true;
if (WARN_ON_ONCE(len > skb->len))
return -EINVAL;
pskb_trim(skb, len);
status->chains = BIT(0);
signal = mt76x02_mac_get_rssi(dev, rxwi->rssi[0], 0);
for (i = 1; i < nstreams; i++) {
status->chains |= BIT(i);
status->chain_signal[i] = mt76x02_mac_get_rssi(dev,
rxwi->rssi[i],
i);
signal = max_t(s8, signal, status->chain_signal[i]);
}
status->signal = signal;
status->freq = dev->mt76.chandef.chan->center_freq;
status->band = dev->mt76.chandef.chan->band;
status->tid = FIELD_GET(MT_RXWI_TID, tid_sn);
status->seqno = FIELD_GET(MT_RXWI_SN, tid_sn);
if (sta) {
ewma_signal_add(&sta->rssi, status->signal);
sta->inactive_count = 0;
}
return mt76x02_mac_process_rate(status, rate);
}
void mt76x02_mac_poll_tx_status(struct mt76x02_dev *dev, bool irq)
{
struct mt76x02_tx_status stat = {};
unsigned long flags;
u8 update = 1;
bool ret;
if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
return;
trace_mac_txstat_poll(dev);
while (!irq || !kfifo_is_full(&dev->txstatus_fifo)) {
spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags);
ret = mt76x02_mac_load_tx_status(&dev->mt76, &stat);
spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags);
if (!ret)
break;
trace_mac_txstat_fetch(dev, &stat);
if (!irq) {
mt76x02_send_tx_status(&dev->mt76, &stat, &update);
continue;
}
kfifo_put(&dev->txstatus_fifo, stat);
}
}
EXPORT_SYMBOL_GPL(mt76x02_mac_poll_tx_status);
static void
mt76x02_mac_queue_txdone(struct mt76x02_dev *dev, struct sk_buff *skb,
void *txwi_ptr)
{
struct mt76x02_tx_info *txi = mt76x02_skb_tx_info(skb);
struct mt76x02_txwi *txwi = txwi_ptr;
mt76x02_mac_poll_tx_status(dev, false);
txi->tries = 0;
txi->jiffies = jiffies;
txi->wcid = txwi->wcid;
txi->pktid = txwi->pktid;
trace_mac_txdone_add(dev, txwi->wcid, txwi->pktid);
mt76x02_tx_complete(&dev->mt76, skb);
}
void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush)
{
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
if (e->txwi)
mt76x02_mac_queue_txdone(dev, e->skb, &e->txwi->txwi);
else
dev_kfree_skb_any(e->skb);
}
EXPORT_SYMBOL_GPL(mt76x02_tx_complete_skb);

32
drivers/net/wireless/mediatek/mt76/mt76x02_mac.h
View File

@ -20,6 +20,8 @@
#include <linux/average.h>
struct mt76x02_dev;
struct mt76x02_tx_status {
u8 valid:1;
u8 success:1;
@ -40,6 +42,15 @@ struct mt76x02_vif {
struct mt76_wcid group_wcid;
};
struct mt76x02_tx_info {
unsigned long jiffies;
u8 tries;
u8 wcid;
u8 pktid;
u8 retry;
};
DECLARE_EWMA(signal, 10, 8);
struct mt76x02_sta {
@ -179,9 +190,15 @@ static inline bool mt76x02_wait_for_mac(struct mt76_dev *dev)
return false;
}
static inline struct mt76x02_tx_info *
mt76x02_skb_tx_info(struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
return (void *)info->status.status_driver_data;
}
void mt76x02_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
void mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
struct ieee80211_sta *sta, int len, u8 nss);
enum mt76x02_cipher_type
mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data);
@ -193,14 +210,19 @@ void mt76x02_mac_wcid_setup(struct mt76_dev *dev, u8 idx, u8 vif_idx, u8 *mac);
void mt76x02_mac_wcid_set_drop(struct mt76_dev *dev, u8 idx, bool drop);
void mt76x02_mac_wcid_set_rate(struct mt76_dev *dev, struct mt76_wcid *wcid,
const struct ieee80211_tx_rate *rate);
__le16
mt76x02_mac_tx_rate_val(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate, u8 *nss_val);
bool mt76x02_mac_load_tx_status(struct mt76_dev *dev,
struct mt76x02_tx_status *stat);
void mt76x02_send_tx_status(struct mt76_dev *dev,
struct mt76x02_tx_status *stat, u8 *update);
int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb,
void *rxi);
int
mt76x02_mac_process_rate(struct mt76_rx_status *status, u16 rate);
void mt76x02_mac_setaddr(struct mt76_dev *dev, u8 *addr);
void mt76x02_mac_write_txwi(struct mt76_dev *dev, struct mt76x02_txwi *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int len);
void mt76x02_mac_poll_tx_status(struct mt76x02_dev *dev, bool irq);
void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush);
#endif

2
drivers/net/wireless/mediatek/mt76/mt76x02_mcu.h
View File

@ -15,7 +15,7 @@
*/
#ifndef __MT76x02_MCU_H
#define __MT76x0x_MCU_H
#define __MT76x02_MCU_H
#define MT_MCU_RESET_CTL 0x070C
#define MT_MCU_INT_LEVEL 0x0718

179
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c
View File

@ -16,23 +16,22 @@
*/
#include <linux/kernel.h>
#include <linux/irq.h>
#include "mt76.h"
#include "mt76x02_dma.h"
#include "mt76x02_util.h"
#include "mt76x02_mac.h"
#include "mt76x02.h"
#include "mt76x02_trace.h"
static int
mt76x02_init_tx_queue(struct mt76_dev *dev, struct mt76_queue *q,
mt76x02_init_tx_queue(struct mt76x02_dev *dev, struct mt76_queue *q,
int idx, int n_desc)
{
int ret;
q->regs = dev->mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
q->regs = dev->mt76.mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->hw_idx = idx;
ret = __mt76_queue_alloc(dev, q);
ret = mt76_queue_alloc(dev, q);
if (ret)
return ret;
@ -42,16 +41,16 @@ mt76x02_init_tx_queue(struct mt76_dev *dev, struct mt76_queue *q,
}
static int
mt76x02_init_rx_queue(struct mt76_dev *dev, struct mt76_queue *q,
mt76x02_init_rx_queue(struct mt76x02_dev *dev, struct mt76_queue *q,
int idx, int n_desc, int bufsize)
{
int ret;
q->regs = dev->mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
q->regs = dev->mt76.mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->buf_size = bufsize;
ret = __mt76_queue_alloc(dev, q);
ret = mt76_queue_alloc(dev, q);
if (ret)
return ret;
@ -60,100 +59,200 @@ mt76x02_init_rx_queue(struct mt76_dev *dev, struct mt76_queue *q,
return 0;
}
int mt76x02_dma_init(struct mt76_dev *dev)
static void mt76x02_process_tx_status_fifo(struct mt76x02_dev *dev)
{
struct mt76x02_tx_status stat;
u8 update = 1;
while (kfifo_get(&dev->txstatus_fifo, &stat))
mt76x02_send_tx_status(&dev->mt76, &stat, &update);
}
static void mt76x02_tx_tasklet(unsigned long data)
{
struct mt76x02_dev *dev = (struct mt76x02_dev *)data;
int i;
mt76x02_process_tx_status_fifo(dev);
for (i = MT_TXQ_MCU; i >= 0; i--)
mt76_queue_tx_cleanup(dev, i, false);
mt76x02_mac_poll_tx_status(dev, false);
mt76x02_irq_enable(dev, MT_INT_TX_DONE_ALL);
}
int mt76x02_dma_init(struct mt76x02_dev *dev)
{
struct mt76_txwi_cache __maybe_unused *t;
int i, ret, fifo_size;
struct mt76_queue *q;
int i, ret;
void *status_fifo;
BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
mt76_dma_attach(dev);
__mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
fifo_size = roundup_pow_of_two(32 * sizeof(struct mt76x02_tx_status));
status_fifo = devm_kzalloc(dev->mt76.dev, fifo_size, GFP_KERNEL);
if (!status_fifo)
return -ENOMEM;
tasklet_init(&dev->tx_tasklet, mt76x02_tx_tasklet, (unsigned long) dev);
kfifo_init(&dev->txstatus_fifo, status_fifo, fifo_size);
mt76_dma_attach(&dev->mt76);
mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[i],
ret = mt76x02_init_tx_queue(dev, &dev->mt76.q_tx[i],
mt76_ac_to_hwq(i),
MT_TX_RING_SIZE);
if (ret)
return ret;
}
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_PSD],
ret = mt76x02_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
if (ret)
return ret;
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_MCU],
ret = mt76x02_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
if (ret)
return ret;
ret = mt76x02_init_rx_queue(dev, &dev->q_rx[MT_RXQ_MCU], 1,
ret = mt76x02_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
if (ret)
return ret;
q = &dev->q_rx[MT_RXQ_MAIN];
q = &dev->mt76.q_rx[MT_RXQ_MAIN];
q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
ret = mt76x02_init_rx_queue(dev, q, 0, MT76X02_RX_RING_SIZE,
MT_RX_BUF_SIZE);
if (ret)
return ret;
return __mt76_init_queues(dev);
return mt76_init_queues(dev);
}
EXPORT_SYMBOL_GPL(mt76x02_dma_init);
void mt76x02_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set)
void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
{
struct mt76x02_dev *dev;
dev = container_of(mdev, struct mt76x02_dev, mt76);
mt76x02_irq_enable(dev, MT_INT_RX_DONE(q));
}
EXPORT_SYMBOL_GPL(mt76x02_rx_poll_complete);
irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance)
{
struct mt76x02_dev *dev = dev_instance;
u32 intr;
intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state))
return IRQ_NONE;
trace_dev_irq(dev, intr, dev->mt76.mmio.irqmask);
intr &= dev->mt76.mmio.irqmask;
if (intr & MT_INT_TX_DONE_ALL) {
mt76x02_irq_disable(dev, MT_INT_TX_DONE_ALL);
tasklet_schedule(&dev->tx_tasklet);
}
if (intr & MT_INT_RX_DONE(0)) {
mt76x02_irq_disable(dev, MT_INT_RX_DONE(0));
napi_schedule(&dev->mt76.napi[0]);
}
if (intr & MT_INT_RX_DONE(1)) {
mt76x02_irq_disable(dev, MT_INT_RX_DONE(1));
napi_schedule(&dev->mt76.napi[1]);
}
if (intr & MT_INT_PRE_TBTT)
tasklet_schedule(&dev->pre_tbtt_tasklet);
/* send buffered multicast frames now */
if (intr & MT_INT_TBTT)
mt76_queue_kick(dev, &dev->mt76.q_tx[MT_TXQ_PSD]);
if (intr & MT_INT_TX_STAT) {
mt76x02_mac_poll_tx_status(dev, true);
tasklet_schedule(&dev->tx_tasklet);
}
if (intr & MT_INT_GPTIMER) {
mt76x02_irq_disable(dev, MT_INT_GPTIMER);
tasklet_schedule(&dev->dfs_pd.dfs_tasklet);
}
return IRQ_HANDLED;
}
EXPORT_SYMBOL_GPL(mt76x02_irq_handler);
void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set)
{
unsigned long flags;
spin_lock_irqsave(&dev->mmio.irq_lock, flags);
dev->mmio.irqmask &= ~clear;
dev->mmio.irqmask |= set;
__mt76_wr(dev, MT_INT_MASK_CSR, dev->mmio.irqmask);
spin_unlock_irqrestore(&dev->mmio.irq_lock, flags);
spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags);
dev->mt76.mmio.irqmask &= ~clear;
dev->mt76.mmio.irqmask |= set;
mt76_wr(dev, MT_INT_MASK_CSR, dev->mt76.mmio.irqmask);
spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags);
}
EXPORT_SYMBOL_GPL(mt76x02_set_irq_mask);
void mt76x02_dma_enable(struct mt76_dev *dev)
static void mt76x02_dma_enable(struct mt76x02_dev *dev)
{
u32 val;
__mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76x02_wait_for_wpdma(dev, 1000);
mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76x02_wait_for_wpdma(&dev->mt76, 1000);
usleep_range(50, 100);
val = FIELD_PREP(MT_WPDMA_GLO_CFG_DMA_BURST_SIZE, 3) |
MT_WPDMA_GLO_CFG_TX_DMA_EN |
MT_WPDMA_GLO_CFG_RX_DMA_EN;
__mt76_set(dev, MT_WPDMA_GLO_CFG, val);
__mt76_clear(dev, MT_WPDMA_GLO_CFG,
MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
mt76_set(dev, MT_WPDMA_GLO_CFG, val);
mt76_clear(dev, MT_WPDMA_GLO_CFG,
MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
}
EXPORT_SYMBOL_GPL(mt76x02_dma_enable);
void mt76x02_dma_disable(struct mt76_dev *dev)
void mt76x02_dma_cleanup(struct mt76x02_dev *dev)
{
u32 val = __mt76_rr(dev, MT_WPDMA_GLO_CFG);
tasklet_kill(&dev->tx_tasklet);
mt76_dma_cleanup(&dev->mt76);
}
EXPORT_SYMBOL_GPL(mt76x02_dma_cleanup);
void mt76x02_dma_disable(struct mt76x02_dev *dev)
{
u32 val = mt76_rr(dev, MT_WPDMA_GLO_CFG);
val &= MT_WPDMA_GLO_CFG_DMA_BURST_SIZE |
MT_WPDMA_GLO_CFG_BIG_ENDIAN |
MT_WPDMA_GLO_CFG_HDR_SEG_LEN;
val |= MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE;
__mt76_wr(dev, MT_WPDMA_GLO_CFG, val);
mt76_wr(dev, MT_WPDMA_GLO_CFG, val);
}
EXPORT_SYMBOL_GPL(mt76x02_dma_disable);
void mt76x02_mac_start(struct mt76_dev *dev)
void mt76x02_mac_start(struct mt76x02_dev *dev)
{
mt76x02_dma_enable(dev);
__mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter);
__mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_ENABLE_TX |
MT_MAC_SYS_CTRL_ENABLE_RX);
mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_ENABLE_TX |
MT_MAC_SYS_CTRL_ENABLE_RX);
mt76x02_irq_enable(dev,
MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
MT_INT_TX_STAT);

48
drivers/net/wireless/mediatek/mt76/mt76x02_phy.c
View File

@ -19,6 +19,7 @@
#include "mt76.h"
#include "mt76x02_phy.h"
#include "mt76x02_mac.h"
void mt76x02_phy_set_rxpath(struct mt76_dev *dev)
{
@ -133,3 +134,50 @@ void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_1)
mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9]));
}
EXPORT_SYMBOL_GPL(mt76x02_phy_set_txpower);
int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev)
{
struct mt76x02_sta *sta;
struct mt76_wcid *wcid;
int i, j, min_rssi = 0;
s8 cur_rssi;
local_bh_disable();
rcu_read_lock();
for (i = 0; i < ARRAY_SIZE(dev->wcid_mask); i++) {
unsigned long mask = dev->wcid_mask[i];
if (!mask)
continue;
for (j = i * BITS_PER_LONG; mask; j++, mask >>= 1) {
if (!(mask & 1))
continue;
wcid = rcu_dereference(dev->wcid[j]);
if (!wcid)
continue;
sta = container_of(wcid, struct mt76x02_sta, wcid);
spin_lock(&dev->rx_lock);
if (sta->inactive_count++ < 5)
cur_rssi = ewma_signal_read(&sta->rssi);
else
cur_rssi = 0;
spin_unlock(&dev->rx_lock);
if (cur_rssi < min_rssi)
min_rssi = cur_rssi;
}
}
rcu_read_unlock();
local_bh_enable();
if (!min_rssi)
return -75;
return min_rssi;
}
EXPORT_SYMBOL_GPL(mt76x02_phy_get_min_avg_rssi);

1
drivers/net/wireless/mediatek/mt76/mt76x02_phy.h
View File

@ -25,5 +25,6 @@ void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
void mt76x02_phy_set_rxpath(struct mt76_dev *dev);
void mt76x02_phy_set_txdac(struct mt76_dev *dev);
int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev);
#endif /* __MT76x02_PHY_H */

2
drivers/net/wireless/mediatek/mt76/mt76x2_trace.c → drivers/net/wireless/mediatek/mt76/mt76x02_trace.c
View File

@ -18,6 +18,6 @@
#ifndef __CHECKER__
#define CREATE_TRACE_POINTS
#include "mt76x2_trace.h"
#include "mt76x02_trace.h"
#endif

31
drivers/net/wireless/mediatek/mt76/mt76x2_trace.h → drivers/net/wireless/mediatek/mt76/mt76x02_trace.h
View File

@ -14,14 +14,14 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#if !defined(__MT76x2_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define __MT76x2_TRACE_H
#if !defined(__MT76x02_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define __MT76x02_TRACE_H
#include <linux/tracepoint.h>
#include "mt76x2.h"
#include "mt76x02.h"
#undef TRACE_SYSTEM
#define TRACE_SYSTEM mt76x2
#define TRACE_SYSTEM mt76x02
#define MAXNAME 32
#define DEV_ENTRY __array(char, wiphy_name, 32)
@ -35,7 +35,7 @@
#define TXID_PR_ARG __entry->wcid, __entry->pktid
DECLARE_EVENT_CLASS(dev_evt,
TP_PROTO(struct mt76x2_dev *dev),
TP_PROTO(struct mt76x02_dev *dev),
TP_ARGS(dev),
TP_STRUCT__entry(
DEV_ENTRY
@ -47,7 +47,7 @@ DECLARE_EVENT_CLASS(dev_evt,
);
DECLARE_EVENT_CLASS(dev_txid_evt,
TP_PROTO(struct mt76x2_dev *dev, u8 wcid, u8 pktid),
TP_PROTO(struct mt76x02_dev *dev, u8 wcid, u8 pktid),
TP_ARGS(dev, wcid, pktid),
TP_STRUCT__entry(
DEV_ENTRY
@ -63,18 +63,18 @@ DECLARE_EVENT_CLASS(dev_txid_evt,
)
);
DEFINE_EVENT(dev_evt, mac_txstat_poll,
TP_PROTO(struct mt76x2_dev *dev),
TP_ARGS(dev)
);
DEFINE_EVENT(dev_txid_evt, mac_txdone_add,
TP_PROTO(struct mt76x2_dev *dev, u8 wcid, u8 pktid),
TP_PROTO(struct mt76x02_dev *dev, u8 wcid, u8 pktid),
TP_ARGS(dev, wcid, pktid)
);
DEFINE_EVENT(dev_evt, mac_txstat_poll,
TP_PROTO(struct mt76x02_dev *dev),
TP_ARGS(dev)
);
TRACE_EVENT(mac_txstat_fetch,
TP_PROTO(struct mt76x2_dev *dev,
TP_PROTO(struct mt76x02_dev *dev,
struct mt76x02_tx_status *stat),
TP_ARGS(dev, stat),
@ -110,9 +110,8 @@ TRACE_EVENT(mac_txstat_fetch,
)
);
TRACE_EVENT(dev_irq,
TP_PROTO(struct mt76x2_dev *dev, u32 val, u32 mask),
TP_PROTO(struct mt76x02_dev *dev, u32 val, u32 mask),
TP_ARGS(dev, val, mask),
@ -139,6 +138,6 @@ TRACE_EVENT(dev_irq,
#undef TRACE_INCLUDE_PATH
#define TRACE_INCLUDE_PATH .
#undef TRACE_INCLUDE_FILE
#define TRACE_INCLUDE_FILE mt76x2_trace
#define TRACE_INCLUDE_FILE mt76x02_trace
#include <trace/define_trace.h>

203
drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c Normal file
View File

@ -0,0 +1,203 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <linux/kernel.h>
#include "mt76x02.h"
void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct mt76x02_dev *dev = hw->priv;
struct ieee80211_vif *vif = info->control.vif;
struct mt76_wcid *wcid = &dev->mt76.global_wcid;
if (control->sta) {
struct mt76x02_sta *msta;
msta = (struct mt76x02_sta *)control->sta->drv_priv;
wcid = &msta->wcid;
/* sw encrypted frames */
if (!info->control.hw_key && wcid->hw_key_idx != 0xff)
control->sta = NULL;
}
if (vif && !control->sta) {
struct mt76x02_vif *mvif;
mvif = (struct mt76x02_vif *)vif->drv_priv;
wcid = &mvif->group_wcid;
}
mt76_tx(&dev->mt76, control->sta, wcid, skb);
}
EXPORT_SYMBOL_GPL(mt76x02_tx);
void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb)
{
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
void *rxwi = skb->data;
if (q == MT_RXQ_MCU) {
/* this is used just by mmio code */
skb_queue_tail(&mdev->mmio.mcu.res_q, skb);
wake_up(&mdev->mmio.mcu.wait);
return;
}
skb_pull(skb, sizeof(struct mt76x02_rxwi));
if (mt76x02_mac_process_rx(dev, skb, rxwi)) {
dev_kfree_skb(skb);
return;
}
mt76_rx(mdev, q, skb);
}
EXPORT_SYMBOL_GPL(mt76x02_queue_rx_skb);
s8 mt76x02_tx_get_max_txpwr_adj(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate)
{
s8 max_txpwr;
if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
u8 mcs = ieee80211_rate_get_vht_mcs(rate);
if (mcs == 8 || mcs == 9) {
max_txpwr = dev->rate_power.vht[8];
} else {
u8 nss, idx;
nss = ieee80211_rate_get_vht_nss(rate);
idx = ((nss - 1) << 3) + mcs;
max_txpwr = dev->rate_power.ht[idx & 0xf];
}
} else if (rate->flags & IEEE80211_TX_RC_MCS) {
max_txpwr = dev->rate_power.ht[rate->idx & 0xf];
} else {
enum nl80211_band band = dev->chandef.chan->band;
if (band == NL80211_BAND_2GHZ) {
const struct ieee80211_rate *r;
struct wiphy *wiphy = dev->hw->wiphy;
struct mt76_rate_power *rp = &dev->rate_power;
r = &wiphy->bands[band]->bitrates[rate->idx];
if (r->flags & IEEE80211_RATE_SHORT_PREAMBLE)
max_txpwr = rp->cck[r->hw_value & 0x3];
else
max_txpwr = rp->ofdm[r->hw_value & 0x7];
} else {
max_txpwr = dev->rate_power.ofdm[rate->idx & 0x7];
}
}
return max_txpwr;
}
EXPORT_SYMBOL_GPL(mt76x02_tx_get_max_txpwr_adj);
s8 mt76x02_tx_get_txpwr_adj(struct mt76_dev *mdev, s8 txpwr, s8 max_txpwr_adj)
{
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
txpwr = min_t(s8, txpwr, dev->mt76.txpower_conf);
txpwr -= (dev->target_power + dev->target_power_delta[0]);
txpwr = min_t(s8, txpwr, max_txpwr_adj);
if (!dev->enable_tpc)
return 0;
else if (txpwr >= 0)
return min_t(s8, txpwr, 7);
else
return (txpwr < -16) ? 8 : (txpwr + 32) / 2;
}
EXPORT_SYMBOL_GPL(mt76x02_tx_get_txpwr_adj);
void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr)
{
s8 txpwr_adj;
txpwr_adj = mt76x02_tx_get_txpwr_adj(&dev->mt76, txpwr,
dev->mt76.rate_power.ofdm[4]);
mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
MT_PROT_AUTO_TX_CFG_PROT_PADJ, txpwr_adj);
mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
MT_PROT_AUTO_TX_CFG_AUTO_PADJ, txpwr_adj);
}
EXPORT_SYMBOL_GPL(mt76x02_tx_set_txpwr_auto);
void mt76x02_tx_complete(struct mt76_dev *dev, struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
if (info->flags & IEEE80211_TX_CTL_AMPDU) {
ieee80211_free_txskb(dev->hw, skb);
} else {
ieee80211_tx_info_clear_status(info);
info->status.rates[0].idx = -1;
info->flags |= IEEE80211_TX_STAT_ACK;
ieee80211_tx_status(dev->hw, skb);
}
}
EXPORT_SYMBOL_GPL(mt76x02_tx_complete);
bool mt76x02_tx_status_data(struct mt76_dev *dev, u8 *update)
{
struct mt76x02_tx_status stat;
if (!mt76x02_mac_load_tx_status(dev, &stat))
return false;
mt76x02_send_tx_status(dev, &stat, update);
return true;
}
EXPORT_SYMBOL_GPL(mt76x02_tx_status_data);
int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info)
{
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
int qsel = MT_QSEL_EDCA;
int ret;
if (q == &dev->mt76.q_tx[MT_TXQ_PSD] && wcid && wcid->idx < 128)
mt76x02_mac_wcid_set_drop(&dev->mt76, wcid->idx, false);
mt76x02_mac_write_txwi(mdev, txwi, skb, wcid, sta, skb->len);
ret = mt76x02_insert_hdr_pad(skb);
if (ret < 0)
return ret;
if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
qsel = MT_QSEL_MGMT;
*tx_info = FIELD_PREP(MT_TXD_INFO_QSEL, qsel) |
MT_TXD_INFO_80211;
if (!wcid || wcid->hw_key_idx == 0xff || wcid->sw_iv)
*tx_info |= MT_TXD_INFO_WIV;
return 0;
}
EXPORT_SYMBOL_GPL(mt76x02_tx_prepare_skb);

9
drivers/net/wireless/mediatek/mt76/mt76x02_usb.h
View File

@ -15,7 +15,7 @@
*/
#ifndef __MT76x02_USB_H
#define __MT76x0x_USB_H
#define __MT76x02_USB_H
#include "mt76.h"
@ -25,5 +25,10 @@ int mt76x02u_mcu_fw_send_data(struct mt76_dev *dev, const void *data,
int data_len, u32 max_payload, u32 offset);
int mt76x02u_skb_dma_info(struct sk_buff *skb, int port, u32 flags);
int mt76x02u_set_txinfo(struct sk_buff *skb, struct mt76_wcid *wcid, u8 ep);
int mt76x02u_tx_prepare_skb(struct mt76_dev *dev, void *data,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info);
void mt76x02u_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush);
#endif /* __MT76x02_USB_H */

57
drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c
View File

@ -14,8 +14,36 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "mt76.h"
#include "mt76x02_dma.h"
#include "mt76x02.h"
static void mt76x02u_remove_dma_hdr(struct sk_buff *skb)
{
int hdr_len;
skb_pull(skb, sizeof(struct mt76x02_txwi) + MT_DMA_HDR_LEN);
hdr_len = ieee80211_get_hdrlen_from_skb(skb);
if (hdr_len % 4)
mt76x02_remove_hdr_pad(skb, 2);
}
void mt76x02u_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush)
{
mt76x02u_remove_dma_hdr(e->skb);
mt76x02_tx_complete(mdev, e->skb);
}
EXPORT_SYMBOL_GPL(mt76x02u_tx_complete_skb);
static int mt76x02u_check_skb_rooms(struct sk_buff *skb)
{
int hdr_len = ieee80211_get_hdrlen_from_skb(skb);
u32 need_head;
need_head = sizeof(struct mt76x02_txwi) + MT_DMA_HDR_LEN;
if (hdr_len % 4)
need_head += 2;
return skb_cow(skb, need_head);
}
int mt76x02u_skb_dma_info(struct sk_buff *skb, int port, u32 flags)
{
@ -50,7 +78,8 @@ int mt76x02u_skb_dma_info(struct sk_buff *skb, int port, u32 flags)
return 0;
}
int mt76x02u_set_txinfo(struct sk_buff *skb, struct mt76_wcid *wcid, u8 ep)
static int
mt76x02u_set_txinfo(struct sk_buff *skb, struct mt76_wcid *wcid, u8 ep)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
enum mt76_qsel qsel;
@ -69,4 +98,24 @@ int mt76x02u_set_txinfo(struct sk_buff *skb, struct mt76_wcid *wcid, u8 ep)
return mt76x02u_skb_dma_info(skb, WLAN_PORT, flags);
}
EXPORT_SYMBOL_GPL(mt76x02u_set_txinfo);
int mt76x02u_tx_prepare_skb(struct mt76_dev *dev, void *data,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info)
{
struct mt76x02_txwi *txwi;
int err, len = skb->len;
err = mt76x02u_check_skb_rooms(skb);
if (err < 0)
return -ENOMEM;
mt76x02_insert_hdr_pad(skb);
txwi = skb_push(skb, sizeof(struct mt76x02_txwi));
mt76x02_mac_write_txwi(dev, txwi, skb, wcid, sta, len);
return mt76x02u_set_txinfo(skb, wcid, q2ep(q->hw_idx));
}
EXPORT_SYMBOL_GPL(mt76x02u_tx_prepare_skb);

55
drivers/net/wireless/mediatek/mt76/mt76x02_util.c
View File

@ -16,10 +16,7 @@
*/
#include <linux/module.h>
#include "mt76.h"
#include "mt76x02_dma.h"
#include "mt76x02_regs.h"
#include "mt76x02_mac.h"
#include "mt76x02.h"
#define CCK_RATE(_idx, _rate) { \
.bitrate = _rate, \
@ -373,9 +370,7 @@ void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
rate.idx = rates->rate[0].idx;
rate.flags = rates->rate[0].flags;
mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
if (dev->drv && dev->drv->get_max_txpwr_adj)
msta->wcid.max_txpwr_adj = dev->drv->get_max_txpwr_adj(dev, &rate);
msta->wcid.max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, &rate);
}
EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
@ -408,52 +403,6 @@ void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
}
EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
static void mt76x02_remove_dma_hdr(struct sk_buff *skb)
{
int hdr_len;
skb_pull(skb, sizeof(struct mt76x02_txwi) + MT_DMA_HDR_LEN);
hdr_len = ieee80211_get_hdrlen_from_skb(skb);
if (hdr_len % 4)
mt76x02_remove_hdr_pad(skb, 2);
}
void mt76x02_tx_complete(struct mt76_dev *dev, struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
if (info->flags & IEEE80211_TX_CTL_AMPDU) {
ieee80211_free_txskb(dev->hw, skb);
} else {
ieee80211_tx_info_clear_status(info);
info->status.rates[0].idx = -1;
info->flags |= IEEE80211_TX_STAT_ACK;
ieee80211_tx_status(dev->hw, skb);
}
}
EXPORT_SYMBOL_GPL(mt76x02_tx_complete);
void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush)
{
mt76x02_remove_dma_hdr(e->skb);
mt76x02_tx_complete(mdev, e->skb);
}
EXPORT_SYMBOL_GPL(mt76x02_tx_complete_skb);
bool mt76x02_tx_status_data(struct mt76_dev *dev, u8 *update)
{
struct mt76x02_tx_status stat;
if (!mt76x02_mac_load_tx_status(dev, &stat))
return false;
mt76x02_send_tx_status(dev, &stat, update);
return true;
}
EXPORT_SYMBOL_GPL(mt76x02_tx_status_data);
const u16 mt76x02_beacon_offsets[16] = {
/* 1024 byte per beacon */
0xc000,

78
drivers/net/wireless/mediatek/mt76/mt76x02_util.h
View File

@ -1,78 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76X02_UTIL_H
#define __MT76X02_UTIL_H
extern struct ieee80211_rate mt76x02_rates[12];
void mt76x02_configure_filter(struct ieee80211_hw *hw,
unsigned int changed_flags,
unsigned int *total_flags, u64 multicast);
int mt76x02_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
int mt76x02_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
void mt76x02_vif_init(struct mt76_dev *dev, struct ieee80211_vif *vif,
unsigned int idx);
int mt76x02_add_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
void mt76x02_remove_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_ampdu_params *params);
int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
struct ieee80211_key_conf *key);
int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
u16 queue, const struct ieee80211_tx_queue_params *params);
void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
int mt76x02_insert_hdr_pad(struct sk_buff *skb);
void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len);
void mt76x02_tx_complete(struct mt76_dev *dev, struct sk_buff *skb);
void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush);
bool mt76x02_tx_status_data(struct mt76_dev *dev, u8 *update);
extern const u16 mt76x02_beacon_offsets[16];
void mt76x02_set_beacon_offsets(struct mt76_dev *dev);
void mt76x02_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set);
void mt76x02_mac_start(struct mt76_dev *dev);
static inline void mt76x02_irq_enable(struct mt76_dev *dev, u32 mask)
{
mt76x02_set_irq_mask(dev, 0, mask);
}
static inline void mt76x02_irq_disable(struct mt76_dev *dev, u32 mask)
{
mt76x02_set_irq_mask(dev, mask, 0);
}
static inline bool
mt76x02_wait_for_txrx_idle(struct mt76_dev *dev)
{
return __mt76_poll_msec(dev, MT_MAC_STATUS,
MT_MAC_STATUS_TX | MT_MAC_STATUS_RX,
0, 100);
}
#endif

210
drivers/net/wireless/mediatek/mt76/mt76x2.h
View File

@ -1,210 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76x2_H
#define __MT76x2_H
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/spinlock.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
#include <linux/kfifo.h>
#define MT7662_FIRMWARE "mt7662.bin"
#define MT7662_ROM_PATCH "mt7662_rom_patch.bin"
#define MT7662_EEPROM_SIZE 512
#define MT7662U_FIRMWARE "mediatek/mt7662u.bin"
#define MT7662U_ROM_PATCH "mediatek/mt7662u_rom_patch.bin"
#define MT_MAX_CHAINS 2
#define MT_CALIBRATE_INTERVAL HZ
#include "mt76.h"
#include "mt76x02_regs.h"
#include "mt76x2_mac.h"
#include "mt76x2_dfs.h"
struct mt76x2_rx_freq_cal {
s8 high_gain[MT_MAX_CHAINS];
s8 rssi_offset[MT_MAX_CHAINS];
s8 lna_gain;
u32 mcu_gain;
};
struct mt76x2_calibration {
struct mt76x2_rx_freq_cal rx;
u8 agc_gain_init[MT_MAX_CHAINS];
u8 agc_gain_cur[MT_MAX_CHAINS];
u16 false_cca;
s8 avg_rssi_all;
s8 agc_gain_adjust;
s8 low_gain;
u8 temp;
bool init_cal_done;
bool tssi_cal_done;
bool tssi_comp_pending;
bool dpd_cal_done;
bool channel_cal_done;
};
struct mt76x2_dev {
struct mt76_dev mt76; /* must be first */
struct mac_address macaddr_list[8];
struct mutex mutex;
u8 txdone_seq;
DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status);
struct sk_buff *rx_head;
struct tasklet_struct tx_tasklet;
struct tasklet_struct pre_tbtt_tasklet;
struct delayed_work cal_work;
struct delayed_work mac_work;
u32 aggr_stats[32];
struct sk_buff *beacons[8];
u8 beacon_mask;
u8 beacon_data_mask;
u8 tbtt_count;
u16 beacon_int;
struct mt76x2_calibration cal;
s8 target_power;
s8 target_power_delta[2];
bool enable_tpc;
u8 coverage_class;
u8 slottime;
struct mt76x2_dfs_pattern_detector dfs_pd;
};
static inline bool is_mt7612(struct mt76x2_dev *dev)
{
return mt76_chip(&dev->mt76) == 0x7612;
}
static inline bool mt76x2_channel_silent(struct mt76x2_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
return ((chan->flags & IEEE80211_CHAN_RADAR) &&
chan->dfs_state != NL80211_DFS_AVAILABLE);
}
extern const struct ieee80211_ops mt76x2_ops;
struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev);
int mt76x2_register_device(struct mt76x2_dev *dev);
void mt76x2_init_debugfs(struct mt76x2_dev *dev);
void mt76x2_init_device(struct mt76x2_dev *dev);
irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance);
void mt76x2_phy_power_on(struct mt76x2_dev *dev);
int mt76x2_init_hardware(struct mt76x2_dev *dev);
void mt76x2_stop_hardware(struct mt76x2_dev *dev);
int mt76x2_eeprom_init(struct mt76x2_dev *dev);
int mt76x2_apply_calibration_data(struct mt76x2_dev *dev, int channel);
void mt76x2_set_tx_ackto(struct mt76x2_dev *dev);
void mt76x2_phy_set_antenna(struct mt76x2_dev *dev);
int mt76x2_phy_start(struct mt76x2_dev *dev);
int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
struct cfg80211_chan_def *chandef);
int mt76x2_mac_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain);
void mt76x2_phy_calibrate(struct work_struct *work);
void mt76x2_phy_set_txpower(struct mt76x2_dev *dev);
int mt76x2_mcu_init(struct mt76x2_dev *dev);
int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
u8 bw_index, bool scan);
int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
u8 channel);
void mt76x2_tx_tasklet(unsigned long data);
void mt76x2_dma_cleanup(struct mt76x2_dev *dev);
void mt76x2_cleanup(struct mt76x2_dev *dev);
void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb);
int mt76x2_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info);
void mt76x2_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush);
void mt76x2_mac_set_tx_protection(struct mt76x2_dev *dev, u32 val);
void mt76x2_pre_tbtt_tasklet(unsigned long arg);
void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb);
void mt76x2_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);
void mt76x2_update_channel(struct mt76_dev *mdev);
s8 mt76x2_tx_get_max_txpwr_adj(struct mt76_dev *dev,
const struct ieee80211_tx_rate *rate);
s8 mt76x2_tx_get_txpwr_adj(struct mt76x2_dev *dev, s8 txpwr, s8 max_txpwr_adj);
void mt76x2_tx_set_txpwr_auto(struct mt76x2_dev *dev, s8 txpwr);
void mt76x2_reset_wlan(struct mt76x2_dev *dev, bool enable);
void mt76x2_init_txpower(struct mt76x2_dev *dev,
struct ieee80211_supported_band *sband);
void mt76_write_mac_initvals(struct mt76x2_dev *dev);
int mt76x2_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
int mt76x2_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
void mt76x2_remove_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
int mt76x2_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
u16 queue, const struct ieee80211_tx_queue_params *params);
void mt76x2_txq_init(struct mt76x2_dev *dev, struct ieee80211_txq *txq);
void mt76x2_phy_tssi_compensate(struct mt76x2_dev *dev, bool wait);
void mt76x2_phy_set_txpower_regs(struct mt76x2_dev *dev,
enum nl80211_band band);
void mt76x2_configure_tx_delay(struct mt76x2_dev *dev,
enum nl80211_band band, u8 bw);
void mt76x2_phy_set_bw(struct mt76x2_dev *dev, int width, u8 ctrl);
void mt76x2_phy_set_band(struct mt76x2_dev *dev, int band, bool primary_upper);
int mt76x2_phy_get_min_avg_rssi(struct mt76x2_dev *dev);
void mt76x2_apply_gain_adj(struct mt76x2_dev *dev);
#endif

20
drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig Normal file
View File

@ -0,0 +1,20 @@
config MT76x2_COMMON
tristate
select MT76x02_LIB
config MT76x2E
tristate "MediaTek MT76x2E (PCIe) support"
select MT76x2_COMMON
depends on MAC80211
depends on PCI
---help---
This adds support for MT7612/MT7602/MT7662-based wireless PCIe devices.
config MT76x2U
tristate "MediaTek MT76x2U (USB) support"
select MT76x2_COMMON
select MT76x02_USB
depends on MAC80211
depends on USB
help
This adds support for MT7612U-based wireless USB dongles.

16
drivers/net/wireless/mediatek/mt76/mt76x2/Makefile Normal file
View File

@ -0,0 +1,16 @@
obj-$(CONFIG_MT76x2_COMMON) += mt76x2-common.o
obj-$(CONFIG_MT76x2E) += mt76x2e.o
obj-$(CONFIG_MT76x2U) += mt76x2u.o
mt76x2-common-y := \
eeprom.o mac.o init.o phy.o debugfs.o mcu.o
mt76x2e-y := \
pci.o pci_main.o pci_init.o pci_tx.o \
pci_mac.o pci_mcu.o pci_phy.o pci_dfs.o
mt76x2u-y := \
usb.o usb_init.o usb_main.o usb_mac.o usb_mcu.o \
usb_phy.o
CFLAGS_pci_trace.o := -I$(src)

12
drivers/net/wireless/mediatek/mt76/mt76x2_debugfs.c → drivers/net/wireless/mediatek/mt76/mt76x2/debugfs.c
View File

@ -20,7 +20,7 @@
static int
mt76x2_ampdu_stat_read(struct seq_file *file, void *data)
{
struct mt76x2_dev *dev = file->private;
struct mt76x02_dev *dev = file->private;
int i, j;
for (i = 0; i < 4; i++) {
@ -49,7 +49,7 @@ mt76x2_ampdu_stat_open(struct inode *inode, struct file *f)
static int read_txpower(struct seq_file *file, void *data)
{
struct mt76x2_dev *dev = dev_get_drvdata(file->private);
struct mt76x02_dev *dev = dev_get_drvdata(file->private);
seq_printf(file, "Target power: %d\n", dev->target_power);
@ -68,9 +68,9 @@ static const struct file_operations fops_ampdu_stat = {
static int
mt76x2_dfs_stat_read(struct seq_file *file, void *data)
{
struct mt76x02_dev *dev = file->private;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
int i;
struct mt76x2_dev *dev = file->private;
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
seq_printf(file, "allocated sequences:\t%d\n",
dfs_pd->seq_stats.seq_pool_len);
@ -106,7 +106,7 @@ static const struct file_operations fops_dfs_stat = {
static int read_agc(struct seq_file *file, void *data)
{
struct mt76x2_dev *dev = dev_get_drvdata(file->private);
struct mt76x02_dev *dev = dev_get_drvdata(file->private);
seq_printf(file, "avg_rssi: %d\n", dev->cal.avg_rssi_all);
seq_printf(file, "low_gain: %d\n", dev->cal.low_gain);
@ -116,7 +116,7 @@ static int read_agc(struct seq_file *file, void *data)
return 0;
}
void mt76x2_init_debugfs(struct mt76x2_dev *dev)
void mt76x2_init_debugfs(struct mt76x02_dev *dev)
{
struct dentry *dir;

26
drivers/net/wireless/mediatek/mt76/mt76x2/dfs.h Normal file
View File

@ -0,0 +1,26 @@
/*
* Copyright (C) 2016 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __DFS_H
#define __DFS_H
void mt76x2_dfs_init_params(struct mt76x02_dev *dev);
void mt76x2_dfs_init_detector(struct mt76x02_dev *dev);
void mt76x2_dfs_adjust_agc(struct mt76x02_dev *dev);
void mt76x2_dfs_set_domain(struct mt76x02_dev *dev,
enum nl80211_dfs_regions region);
#endif /* __DFS_H */

42
drivers/net/wireless/mediatek/mt76/mt76x2_eeprom.c → drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c
View File

@ -17,12 +17,12 @@
#include <linux/module.h>
#include <asm/unaligned.h>
#include "mt76x2.h"
#include "mt76x2_eeprom.h"
#include "eeprom.h"
#define EE_FIELD(_name, _value) [MT_EE_##_name] = (_value) | 1
static int
mt76x2_eeprom_copy(struct mt76x2_dev *dev, enum mt76x02_eeprom_field field,
mt76x2_eeprom_copy(struct mt76x02_dev *dev, enum mt76x02_eeprom_field field,
void *dest, int len)
{
if (field + len > dev->mt76.eeprom.size)
@ -33,7 +33,7 @@ mt76x2_eeprom_copy(struct mt76x2_dev *dev, enum mt76x02_eeprom_field field,
}
static int
mt76x2_eeprom_get_macaddr(struct mt76x2_dev *dev)
mt76x2_eeprom_get_macaddr(struct mt76x02_dev *dev)
{
void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR;
@ -42,7 +42,7 @@ mt76x2_eeprom_get_macaddr(struct mt76x2_dev *dev)
}
static bool
mt76x2_has_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
mt76x2_has_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
{
u16 *efuse_w = (u16 *) efuse;
@ -68,7 +68,7 @@ mt76x2_has_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
}
static void
mt76x2_apply_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
mt76x2_apply_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
{
#define GROUP_5G(_id) \
MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
@ -137,7 +137,7 @@ mt76x2_apply_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
eeprom[MT_EE_BT_PMUCFG] = val & 0xff;
}
static int mt76x2_check_eeprom(struct mt76x2_dev *dev)
static int mt76x2_check_eeprom(struct mt76x02_dev *dev)
{
u16 val = get_unaligned_le16(dev->mt76.eeprom.data);
@ -155,7 +155,7 @@ static int mt76x2_check_eeprom(struct mt76x2_dev *dev)
}
static int
mt76x2_eeprom_load(struct mt76x2_dev *dev)
mt76x2_eeprom_load(struct mt76x02_dev *dev)
{
void *efuse;
bool found;
@ -197,7 +197,7 @@ out:
}
static void
mt76x2_set_rx_gain_group(struct mt76x2_dev *dev, u8 val)
mt76x2_set_rx_gain_group(struct mt76x02_dev *dev, u8 val)
{
s8 *dest = dev->cal.rx.high_gain;
@ -212,7 +212,7 @@ mt76x2_set_rx_gain_group(struct mt76x2_dev *dev, u8 val)
}
static void
mt76x2_set_rssi_offset(struct mt76x2_dev *dev, int chain, u8 val)
mt76x2_set_rssi_offset(struct mt76x02_dev *dev, int chain, u8 val)
{
s8 *dest = dev->cal.rx.rssi_offset;
@ -241,7 +241,7 @@ mt76x2_get_cal_channel_group(int channel)
}
static u8
mt76x2_get_5g_rx_gain(struct mt76x2_dev *dev, u8 channel)
mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel)
{
enum mt76x2_cal_channel_group group;
@ -268,7 +268,7 @@ mt76x2_get_5g_rx_gain(struct mt76x2_dev *dev, u8 channel)
}
}
void mt76x2_read_rx_gain(struct mt76x2_dev *dev)
void mt76x2_read_rx_gain(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
int channel = chan->hw_value;
@ -298,7 +298,7 @@ void mt76x2_read_rx_gain(struct mt76x2_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x2_read_rx_gain);
void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76_rate_power *t,
struct ieee80211_channel *chan)
{
bool is_5ghz;
@ -366,8 +366,10 @@ void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
static void
mt76x2_get_power_info_2g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan, int chain, int offset)
mt76x2_get_power_info_2g(struct mt76x02_dev *dev,
struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan,
int chain, int offset)
{
int channel = chan->hw_value;
int delta_idx;
@ -393,8 +395,10 @@ mt76x2_get_power_info_2g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
}
static void
mt76x2_get_power_info_5g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan, int chain, int offset)
mt76x2_get_power_info_5g(struct mt76x02_dev *dev,
struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan,
int chain, int offset)
{
int channel = chan->hw_value;
enum mt76x2_cal_channel_group group;
@ -441,7 +445,7 @@ mt76x2_get_power_info_5g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
t->target_power = val & 0xff;
}
void mt76x2_get_power_info(struct mt76x2_dev *dev,
void mt76x2_get_power_info(struct mt76x02_dev *dev,
struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan)
{
@ -474,7 +478,7 @@ void mt76x2_get_power_info(struct mt76x2_dev *dev,
}
EXPORT_SYMBOL_GPL(mt76x2_get_power_info);
int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t)
int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t)
{
enum nl80211_band band = dev->mt76.chandef.chan->band;
u16 val, slope;
@ -511,7 +515,7 @@ int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t)
}
EXPORT_SYMBOL_GPL(mt76x2_get_temp_comp);
int mt76x2_eeprom_init(struct mt76x2_dev *dev)
int mt76x2_eeprom_init(struct mt76x02_dev *dev)
{
int ret;

12
drivers/net/wireless/mediatek/mt76/mt76x2_eeprom.h → drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.h
View File

@ -17,7 +17,7 @@
#ifndef __MT76x2_EEPROM_H
#define __MT76x2_EEPROM_H
#include "mt76x02_eeprom.h"
#include "../mt76x02_eeprom.h"
enum mt76x2_cal_channel_group {
MT_CH_5G_JAPAN,
@ -51,16 +51,16 @@ struct mt76x2_temp_comp {
unsigned int low_slope; /* J / dB */
};
void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76_rate_power *t,
struct ieee80211_channel *chan);
void mt76x2_get_power_info(struct mt76x2_dev *dev,
void mt76x2_get_power_info(struct mt76x02_dev *dev,
struct mt76x2_tx_power_info *t,
struct ieee80211_channel *chan);
int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t);
void mt76x2_read_rx_gain(struct mt76x2_dev *dev);
int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t);
void mt76x2_read_rx_gain(struct mt76x02_dev *dev);
static inline bool
mt76x2_has_ext_lna(struct mt76x2_dev *dev)
mt76x2_has_ext_lna(struct mt76x02_dev *dev)
{
u32 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_1);

14
drivers/net/wireless/mediatek/mt76/mt76x2_init_common.c → drivers/net/wireless/mediatek/mt76/mt76x2/init.c
View File

@ -16,11 +16,11 @@
*/
#include "mt76x2.h"
#include "mt76x2_eeprom.h"
#include "mt76x02_phy.h"
#include "eeprom.h"
#include "../mt76x02_phy.h"
static void
mt76x2_set_wlan_state(struct mt76x2_dev *dev, bool enable)
mt76x2_set_wlan_state(struct mt76x02_dev *dev, bool enable)
{
u32 val = mt76_rr(dev, MT_WLAN_FUN_CTRL);
@ -35,7 +35,7 @@ mt76x2_set_wlan_state(struct mt76x2_dev *dev, bool enable)
udelay(20);
}
void mt76x2_reset_wlan(struct mt76x2_dev *dev, bool enable)
void mt76x2_reset_wlan(struct mt76x02_dev *dev, bool enable)
{
u32 val;
@ -62,7 +62,7 @@ out:
}
EXPORT_SYMBOL_GPL(mt76x2_reset_wlan);
void mt76_write_mac_initvals(struct mt76x2_dev *dev)
void mt76_write_mac_initvals(struct mt76x02_dev *dev)
{
#define DEFAULT_PROT_CFG_CCK \
(FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \
@ -158,7 +158,7 @@ void mt76_write_mac_initvals(struct mt76x2_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76_write_mac_initvals);
void mt76x2_init_device(struct mt76x2_dev *dev)
void mt76x2_init_device(struct mt76x02_dev *dev)
{
struct ieee80211_hw *hw = mt76_hw(dev);
@ -187,7 +187,7 @@ void mt76x2_init_device(struct mt76x2_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x2_init_device);
void mt76x2_init_txpower(struct mt76x2_dev *dev,
void mt76x2_init_txpower(struct mt76x02_dev *dev,
struct ieee80211_supported_band *sband)
{
struct ieee80211_channel *chan;

44
drivers/net/wireless/mediatek/mt76/mt76x2_common.c → drivers/net/wireless/mediatek/mt76/mt76x2/mac.c
View File

@ -16,27 +16,39 @@
*/
#include "mt76x2.h"
#include "mt76x02_mac.h"
void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb)
void mt76x2_mac_stop(struct mt76x02_dev *dev, bool force)
{
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
void *rxwi = skb->data;
bool stopped = false;
u32 rts_cfg;
int i;
if (q == MT_RXQ_MCU) {
/* this is used just by mmio code */
skb_queue_tail(&mdev->mmio.mcu.res_q, skb);
wake_up(&mdev->mmio.mcu.wait);
return;
mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
rts_cfg = mt76_rr(dev, MT_TX_RTS_CFG);
mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg & ~MT_TX_RTS_CFG_RETRY_LIMIT);
/* Wait for MAC to become idle */
for (i = 0; i < 300; i++) {
if ((mt76_rr(dev, MT_MAC_STATUS) &
(MT_MAC_STATUS_RX | MT_MAC_STATUS_TX)) ||
mt76_rr(dev, MT_BBP(IBI, 12))) {
udelay(1);
continue;
}
stopped = true;
break;
}
skb_pull(skb, sizeof(struct mt76x02_rxwi));
if (mt76x2_mac_process_rx(dev, skb, rxwi)) {
dev_kfree_skb(skb);
return;
if (force && !stopped) {
mt76_set(dev, MT_BBP(CORE, 4), BIT(1));
mt76_clear(dev, MT_BBP(CORE, 4), BIT(1));
mt76_set(dev, MT_BBP(CORE, 4), BIT(0));
mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));
}
mt76_rx(&dev->mt76, q, skb);
mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg);
}
EXPORT_SYMBOL_GPL(mt76x2_queue_rx_skb);
EXPORT_SYMBOL_GPL(mt76x2_mac_stop);

32
drivers/net/wireless/mediatek/mt76/mt76x2_dma.c → drivers/net/wireless/mediatek/mt76/mt76x2/mac.h
View File

@ -14,26 +14,24 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76x2_MAC_H
#define __MT76x2_MAC_H
#include "mt76x2.h"
#include "mt76x02_dma.h"
#include "mt76x02_util.h"
void mt76x2_tx_tasklet(unsigned long data)
{
struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
int i;
struct mt76x02_dev;
struct mt76x2_sta;
struct mt76x02_vif;
mt76x2_mac_process_tx_status_fifo(dev);
int mt76x2_mac_start(struct mt76x02_dev *dev);
void mt76x2_mac_stop(struct mt76x02_dev *dev, bool force);
void mt76x2_mac_resume(struct mt76x02_dev *dev);
void mt76x2_mac_set_bssid(struct mt76x02_dev *dev, u8 idx, const u8 *addr);
for (i = MT_TXQ_MCU; i >= 0; i--)
mt76_queue_tx_cleanup(dev, i, false);
int mt76x2_mac_set_beacon(struct mt76x02_dev *dev, u8 vif_idx,
struct sk_buff *skb);
void mt76x2_mac_set_beacon_enable(struct mt76x02_dev *dev, u8 vif_idx, bool val);
mt76x2_mac_poll_tx_status(dev, false);
mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);
}
void mt76x2_mac_work(struct work_struct *work);
void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
{
tasklet_kill(&dev->tx_tasklet);
mt76_dma_cleanup(&dev->mt76);
}
#endif

13
drivers/net/wireless/mediatek/mt76/mt76x2_mcu_common.c → drivers/net/wireless/mediatek/mt76/mt76x2/mcu.c
View File

@ -20,11 +20,10 @@
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_mcu.h"
#include "mt76x2_eeprom.h"
#include "mt76x02_dma.h"
#include "mcu.h"
#include "eeprom.h"
int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw,
u8 bw_index, bool scan)
{
struct sk_buff *skb;
@ -57,7 +56,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
}
EXPORT_SYMBOL_GPL(mt76x2_mcu_set_channel);
int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
int mt76x2_mcu_load_cr(struct mt76x02_dev *dev, u8 type, u8 temp_level,
u8 channel)
{
struct mt76_dev *mdev = &dev->mt76;
@ -87,7 +86,7 @@ int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
}
EXPORT_SYMBOL_GPL(mt76x2_mcu_load_cr);
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
bool force)
{
struct sk_buff *skb;
@ -107,7 +106,7 @@ int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
}
EXPORT_SYMBOL_GPL(mt76x2_mcu_init_gain);
int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev,
int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev,
struct mt76x2_tssi_comp *tssi_data)
{
struct sk_buff *skb;

6
drivers/net/wireless/mediatek/mt76/mt76x2_mcu.h → drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h
View File

@ -17,7 +17,7 @@
#ifndef __MT76x2_MCU_H
#define __MT76x2_MCU_H
#include "mt76x02_mcu.h"
#include "../mt76x02_mcu.h"
/* Register definitions */
#define MT_MCU_CPU_CTL 0x0704
@ -94,8 +94,8 @@ struct mt76x2_tssi_comp {
u8 offset1;
} __packed __aligned(4);
int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev, struct mt76x2_tssi_comp *tssi_data);
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev, struct mt76x2_tssi_comp *tssi_data);
int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
bool force);
#endif

107
drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h Normal file
View File

@ -0,0 +1,107 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76x2_H
#define __MT76x2_H
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/spinlock.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
#define MT7662_FIRMWARE "mt7662.bin"
#define MT7662_ROM_PATCH "mt7662_rom_patch.bin"
#define MT7662_EEPROM_SIZE 512
#define MT7662U_FIRMWARE "mediatek/mt7662u.bin"
#define MT7662U_ROM_PATCH "mediatek/mt7662u_rom_patch.bin"
#define MT_CALIBRATE_INTERVAL HZ
#include "../mt76x02.h"
#include "mac.h"
#include "dfs.h"
static inline bool is_mt7612(struct mt76x02_dev *dev)
{
return mt76_chip(&dev->mt76) == 0x7612;
}
static inline bool mt76x2_channel_silent(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
return ((chan->flags & IEEE80211_CHAN_RADAR) &&
chan->dfs_state != NL80211_DFS_AVAILABLE);
}
extern const struct ieee80211_ops mt76x2_ops;
struct mt76x02_dev *mt76x2_alloc_device(struct device *pdev);
int mt76x2_register_device(struct mt76x02_dev *dev);
void mt76x2_init_debugfs(struct mt76x02_dev *dev);
void mt76x2_init_device(struct mt76x02_dev *dev);
void mt76x2_phy_power_on(struct mt76x02_dev *dev);
int mt76x2_init_hardware(struct mt76x02_dev *dev);
void mt76x2_stop_hardware(struct mt76x02_dev *dev);
int mt76x2_eeprom_init(struct mt76x02_dev *dev);
int mt76x2_apply_calibration_data(struct mt76x02_dev *dev, int channel);
void mt76x2_set_tx_ackto(struct mt76x02_dev *dev);
void mt76x2_phy_set_antenna(struct mt76x02_dev *dev);
int mt76x2_phy_start(struct mt76x02_dev *dev);
int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef);
void mt76x2_phy_calibrate(struct work_struct *work);
void mt76x2_phy_set_txpower(struct mt76x02_dev *dev);
int mt76x2_mcu_init(struct mt76x02_dev *dev);
int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw,
u8 bw_index, bool scan);
int mt76x2_mcu_load_cr(struct mt76x02_dev *dev, u8 type, u8 temp_level,
u8 channel);
void mt76x2_cleanup(struct mt76x02_dev *dev);
void mt76x2_mac_set_tx_protection(struct mt76x02_dev *dev, u32 val);
void mt76x2_pre_tbtt_tasklet(unsigned long arg);
void mt76x2_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);
void mt76x2_update_channel(struct mt76_dev *mdev);
void mt76x2_reset_wlan(struct mt76x02_dev *dev, bool enable);
void mt76x2_init_txpower(struct mt76x02_dev *dev,
struct ieee80211_supported_band *sband);
void mt76_write_mac_initvals(struct mt76x02_dev *dev);
void mt76x2_phy_tssi_compensate(struct mt76x02_dev *dev, bool wait);
void mt76x2_phy_set_txpower_regs(struct mt76x02_dev *dev,
enum nl80211_band band);
void mt76x2_configure_tx_delay(struct mt76x02_dev *dev,
enum nl80211_band band, u8 bw);
void mt76x2_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
void mt76x2_phy_set_band(struct mt76x02_dev *dev, int band, bool primary_upper);
void mt76x2_apply_gain_adj(struct mt76x02_dev *dev);
#endif

41
drivers/net/wireless/mediatek/mt76/mt76x2u.h → drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2u.h
View File

@ -20,8 +20,7 @@
#include <linux/device.h>
#include "mt76x2.h"
#include "mt76x2_mcu.h"
#include "mt76x02_dma.h"
#include "mcu.h"
#define MT7612U_EEPROM_SIZE 512
@ -30,35 +29,31 @@
extern const struct ieee80211_ops mt76x2u_ops;
struct mt76x2_dev *mt76x2u_alloc_device(struct device *pdev);
int mt76x2u_register_device(struct mt76x2_dev *dev);
int mt76x2u_init_hardware(struct mt76x2_dev *dev);
void mt76x2u_cleanup(struct mt76x2_dev *dev);
void mt76x2u_stop_hw(struct mt76x2_dev *dev);
struct mt76x02_dev *mt76x2u_alloc_device(struct device *pdev);
int mt76x2u_register_device(struct mt76x02_dev *dev);
int mt76x2u_init_hardware(struct mt76x02_dev *dev);
void mt76x2u_cleanup(struct mt76x02_dev *dev);
void mt76x2u_stop_hw(struct mt76x02_dev *dev);
int mt76x2u_mac_reset(struct mt76x2_dev *dev);
void mt76x2u_mac_resume(struct mt76x2_dev *dev);
int mt76x2u_mac_start(struct mt76x2_dev *dev);
int mt76x2u_mac_stop(struct mt76x2_dev *dev);
int mt76x2u_mac_reset(struct mt76x02_dev *dev);
void mt76x2u_mac_resume(struct mt76x02_dev *dev);
int mt76x2u_mac_start(struct mt76x02_dev *dev);
int mt76x2u_mac_stop(struct mt76x02_dev *dev);
int mt76x2u_phy_set_channel(struct mt76x2_dev *dev,
int mt76x2u_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef);
void mt76x2u_phy_calibrate(struct work_struct *work);
void mt76x2u_phy_channel_calibrate(struct mt76x2_dev *dev);
void mt76x2u_phy_channel_calibrate(struct mt76x02_dev *dev);
void mt76x2u_mcu_complete_urb(struct urb *urb);
int mt76x2u_mcu_set_dynamic_vga(struct mt76x2_dev *dev, u8 channel, bool ap,
int mt76x2u_mcu_set_dynamic_vga(struct mt76x02_dev *dev, u8 channel, bool ap,
bool ext, int rssi, u32 false_cca);
int mt76x2u_mcu_init(struct mt76x2_dev *dev);
int mt76x2u_mcu_fw_init(struct mt76x2_dev *dev);
int mt76x2u_mcu_init(struct mt76x02_dev *dev);
int mt76x2u_mcu_fw_init(struct mt76x02_dev *dev);
int mt76x2u_alloc_queues(struct mt76x2_dev *dev);
void mt76x2u_queues_deinit(struct mt76x2_dev *dev);
void mt76x2u_stop_queues(struct mt76x2_dev *dev);
int mt76x2u_tx_prepare_skb(struct mt76_dev *mdev, void *data,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info);
int mt76x2u_alloc_queues(struct mt76x02_dev *dev);
void mt76x2u_queues_deinit(struct mt76x02_dev *dev);
void mt76x2u_stop_queues(struct mt76x02_dev *dev);
int mt76x2u_skb_dma_info(struct sk_buff *skb, enum dma_msg_port port,
u32 flags);

7
drivers/net/wireless/mediatek/mt76/mt76x2_pci.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci.c
View File

@ -19,7 +19,6 @@
#include <linux/pci.h>
#include "mt76x2.h"
#include "mt76x2_trace.h"
static const struct pci_device_id mt76pci_device_table[] = {
{ PCI_DEVICE(0x14c3, 0x7662) },
@ -31,7 +30,7 @@ static const struct pci_device_id mt76pci_device_table[] = {
static int
mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
int ret;
ret = pcim_enable_device(pdev);
@ -58,7 +57,7 @@ mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
dev->mt76.rev = mt76_rr(dev, MT_ASIC_VERSION);
dev_info(dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev);
ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt76x2_irq_handler,
ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt76x02_irq_handler,
IRQF_SHARED, KBUILD_MODNAME, dev);
if (ret)
goto error;
@ -89,7 +88,7 @@ static void
mt76pci_remove(struct pci_dev *pdev)
{
struct mt76_dev *mdev = pci_get_drvdata(pdev);
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
mt76_unregister_device(mdev);
mt76x2_cleanup(dev);

146
drivers/net/wireless/mediatek/mt76/mt76x2_dfs.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_dfs.c
View File

@ -15,7 +15,6 @@
*/
#include "mt76x2.h"
#include "mt76x02_util.h"
#define RADAR_SPEC(m, len, el, eh, wl, wh, \
w_tolerance, tl, th, t_tolerance, \
@ -37,7 +36,7 @@
.pwr_jmp = power_jmp \
}
static const struct mt76x2_radar_specs etsi_radar_specs[] = {
static const struct mt76x02_radar_specs etsi_radar_specs[] = {
/* 20MHz */
RADAR_SPEC(0, 8, 2, 15, 106, 150, 10, 4900, 100096, 10, 0,
0x7fffffff, 0x155cc0, 0x19cc),
@ -67,7 +66,7 @@ static const struct mt76x2_radar_specs etsi_radar_specs[] = {
0x7fffffff, 0x2191c0, 0x15cc)
};
static const struct mt76x2_radar_specs fcc_radar_specs[] = {
static const struct mt76x02_radar_specs fcc_radar_specs[] = {
/* 20MHz */
RADAR_SPEC(0, 8, 2, 12, 106, 150, 5, 2900, 80100, 5, 0,
0x7fffffff, 0xfe808, 0x13dc),
@ -97,7 +96,7 @@ static const struct mt76x2_radar_specs fcc_radar_specs[] = {
0x3938700, 0x57bcf00, 0x1289)
};
static const struct mt76x2_radar_specs jp_w56_radar_specs[] = {
static const struct mt76x02_radar_specs jp_w56_radar_specs[] = {
/* 20MHz */
RADAR_SPEC(0, 8, 2, 7, 106, 150, 5, 2900, 80100, 5, 0,
0x7fffffff, 0x14c080, 0x13dc),
@ -127,7 +126,7 @@ static const struct mt76x2_radar_specs jp_w56_radar_specs[] = {
0x3938700, 0X57bcf00, 0x1289)
};
static const struct mt76x2_radar_specs jp_w53_radar_specs[] = {
static const struct mt76x02_radar_specs jp_w53_radar_specs[] = {
/* 20MHz */
RADAR_SPEC(0, 8, 2, 9, 106, 150, 20, 28400, 77000, 20, 0,
0x7fffffff, 0x14c080, 0x16cc),
@ -151,8 +150,9 @@ static const struct mt76x2_radar_specs jp_w53_radar_specs[] = {
{ 0 }
};
static void mt76x2_dfs_set_capture_mode_ctrl(struct mt76x2_dev *dev,
u8 enable)
static void
mt76x2_dfs_set_capture_mode_ctrl(struct mt76x02_dev *dev,
u8 enable)
{
u32 data;
@ -160,10 +160,10 @@ static void mt76x2_dfs_set_capture_mode_ctrl(struct mt76x2_dev *dev,
mt76_wr(dev, MT_BBP(DFS, 36), data);
}
static void mt76x2_dfs_seq_pool_put(struct mt76x2_dev *dev,
struct mt76x2_dfs_sequence *seq)
static void mt76x2_dfs_seq_pool_put(struct mt76x02_dev *dev,
struct mt76x02_dfs_sequence *seq)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
list_add(&seq->head, &dfs_pd->seq_pool);
@ -171,17 +171,17 @@ static void mt76x2_dfs_seq_pool_put(struct mt76x2_dev *dev,
dfs_pd->seq_stats.seq_len--;
}
static
struct mt76x2_dfs_sequence *mt76x2_dfs_seq_pool_get(struct mt76x2_dev *dev)
static struct mt76x02_dfs_sequence *
mt76x2_dfs_seq_pool_get(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_sequence *seq;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_sequence *seq;
if (list_empty(&dfs_pd->seq_pool)) {
seq = devm_kzalloc(dev->mt76.dev, sizeof(*seq), GFP_ATOMIC);
} else {
seq = list_first_entry(&dfs_pd->seq_pool,
struct mt76x2_dfs_sequence,
struct mt76x02_dfs_sequence,
head);
list_del(&seq->head);
dfs_pd->seq_stats.seq_pool_len--;
@ -214,10 +214,10 @@ static int mt76x2_dfs_get_multiple(int val, int frac, int margin)
return factor;
}
static void mt76x2_dfs_detector_reset(struct mt76x2_dev *dev)
static void mt76x2_dfs_detector_reset(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_sequence *seq, *tmp_seq;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_sequence *seq, *tmp_seq;
int i;
/* reset hw detector */
@ -235,11 +235,11 @@ static void mt76x2_dfs_detector_reset(struct mt76x2_dev *dev)
}
}
static bool mt76x2_dfs_check_chirp(struct mt76x2_dev *dev)
static bool mt76x2_dfs_check_chirp(struct mt76x02_dev *dev)
{
bool ret = false;
u32 current_ts, delta_ts;
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
current_ts = mt76_rr(dev, MT_PBF_LIFE_TIMER);
delta_ts = current_ts - dfs_pd->chirp_pulse_ts;
@ -256,8 +256,8 @@ static bool mt76x2_dfs_check_chirp(struct mt76x2_dev *dev)
return ret;
}
static void mt76x2_dfs_get_hw_pulse(struct mt76x2_dev *dev,
struct mt76x2_dfs_hw_pulse *pulse)
static void mt76x2_dfs_get_hw_pulse(struct mt76x02_dev *dev,
struct mt76x02_dfs_hw_pulse *pulse)
{
u32 data;
@ -276,8 +276,8 @@ static void mt76x2_dfs_get_hw_pulse(struct mt76x2_dev *dev,
pulse->burst = mt76_rr(dev, MT_BBP(DFS, 22));
}
static bool mt76x2_dfs_check_hw_pulse(struct mt76x2_dev *dev,
struct mt76x2_dfs_hw_pulse *pulse)
static bool mt76x2_dfs_check_hw_pulse(struct mt76x02_dev *dev,
struct mt76x02_dfs_hw_pulse *pulse)
{
bool ret = false;
@ -371,8 +371,8 @@ static bool mt76x2_dfs_check_hw_pulse(struct mt76x2_dev *dev,
return ret;
}
static bool mt76x2_dfs_fetch_event(struct mt76x2_dev *dev,
struct mt76x2_dfs_event *event)
static bool mt76x2_dfs_fetch_event(struct mt76x02_dev *dev,
struct mt76x02_dfs_event *event)
{
u32 data;
@ -398,12 +398,12 @@ static bool mt76x2_dfs_fetch_event(struct mt76x2_dev *dev,
return true;
}
static bool mt76x2_dfs_check_event(struct mt76x2_dev *dev,
struct mt76x2_dfs_event *event)
static bool mt76x2_dfs_check_event(struct mt76x02_dev *dev,
struct mt76x02_dfs_event *event)
{
if (event->engine == 2) {
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_event_rb *event_buff = &dfs_pd->event_rb[1];
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_event_rb *event_buff = &dfs_pd->event_rb[1];
u16 last_event_idx;
u32 delta_ts;
@ -417,11 +417,11 @@ static bool mt76x2_dfs_check_event(struct mt76x2_dev *dev,
return true;
}
static void mt76x2_dfs_queue_event(struct mt76x2_dev *dev,
struct mt76x2_dfs_event *event)
static void mt76x2_dfs_queue_event(struct mt76x02_dev *dev,
struct mt76x02_dfs_event *event)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_event_rb *event_buff;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_event_rb *event_buff;
/* add radar event to ring buffer */
event_buff = event->engine == 2 ? &dfs_pd->event_rb[1]
@ -435,16 +435,16 @@ static void mt76x2_dfs_queue_event(struct mt76x2_dev *dev,
MT_DFS_EVENT_BUFLEN);
}
static int mt76x2_dfs_create_sequence(struct mt76x2_dev *dev,
struct mt76x2_dfs_event *event,
static int mt76x2_dfs_create_sequence(struct mt76x02_dev *dev,
struct mt76x02_dfs_event *event,
u16 cur_len)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_sw_detector_params *sw_params;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_sw_detector_params *sw_params;
u32 width_delta, with_sum, factor, cur_pri;
struct mt76x2_dfs_sequence seq, *seq_p;
struct mt76x2_dfs_event_rb *event_rb;
struct mt76x2_dfs_event *cur_event;
struct mt76x02_dfs_sequence seq, *seq_p;
struct mt76x02_dfs_event_rb *event_rb;
struct mt76x02_dfs_event *cur_event;
int i, j, end, pri;
event_rb = event->engine == 2 ? &dfs_pd->event_rb[1]
@ -522,12 +522,12 @@ next:
return 0;
}
static u16 mt76x2_dfs_add_event_to_sequence(struct mt76x2_dev *dev,
struct mt76x2_dfs_event *event)
static u16 mt76x2_dfs_add_event_to_sequence(struct mt76x02_dev *dev,
struct mt76x02_dfs_event *event)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_sw_detector_params *sw_params;
struct mt76x2_dfs_sequence *seq, *tmp_seq;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_sw_detector_params *sw_params;
struct mt76x02_dfs_sequence *seq, *tmp_seq;
u16 max_seq_len = 0;
u32 factor, pri;
@ -554,10 +554,10 @@ static u16 mt76x2_dfs_add_event_to_sequence(struct mt76x2_dev *dev,
return max_seq_len;
}
static bool mt76x2_dfs_check_detection(struct mt76x2_dev *dev)
static bool mt76x2_dfs_check_detection(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_sequence *seq;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_sequence *seq;
if (list_empty(&dfs_pd->sequences))
return false;
@ -571,10 +571,10 @@ static bool mt76x2_dfs_check_detection(struct mt76x2_dev *dev)
return false;
}
static void mt76x2_dfs_add_events(struct mt76x2_dev *dev)
static void mt76x2_dfs_add_events(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_event event;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_event event;
int i, seq_len;
/* disable debug mode */
@ -598,11 +598,11 @@ static void mt76x2_dfs_add_events(struct mt76x2_dev *dev)
mt76x2_dfs_set_capture_mode_ctrl(dev, true);
}
static void mt76x2_dfs_check_event_window(struct mt76x2_dev *dev)
static void mt76x2_dfs_check_event_window(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x2_dfs_event_rb *event_buff;
struct mt76x2_dfs_event *event;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_event_rb *event_buff;
struct mt76x02_dfs_event *event;
int i;
for (i = 0; i < ARRAY_SIZE(dfs_pd->event_rb); i++) {
@ -623,8 +623,8 @@ static void mt76x2_dfs_check_event_window(struct mt76x2_dev *dev)
static void mt76x2_dfs_tasklet(unsigned long arg)
{
struct mt76x2_dev *dev = (struct mt76x2_dev *)arg;
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dev *dev = (struct mt76x02_dev *)arg;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
u32 engine_mask;
int i;
@ -654,7 +654,7 @@ static void mt76x2_dfs_tasklet(unsigned long arg)
goto out;
for (i = 0; i < MT_DFS_NUM_ENGINES; i++) {
struct mt76x2_dfs_hw_pulse pulse;
struct mt76x02_dfs_hw_pulse pulse;
if (!(engine_mask & (1 << i)))
continue;
@ -679,12 +679,12 @@ static void mt76x2_dfs_tasklet(unsigned long arg)
mt76_wr(dev, MT_BBP(DFS, 1), 0xf);
out:
mt76x02_irq_enable(&dev->mt76, MT_INT_GPTIMER);
mt76x02_irq_enable(dev, MT_INT_GPTIMER);
}
static void mt76x2_dfs_init_sw_detector(struct mt76x2_dev *dev)
static void mt76x2_dfs_init_sw_detector(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
switch (dev->dfs_pd.region) {
case NL80211_DFS_FCC:
@ -708,11 +708,11 @@ static void mt76x2_dfs_init_sw_detector(struct mt76x2_dev *dev)
}
}
static void mt76x2_dfs_set_bbp_params(struct mt76x2_dev *dev)
static void mt76x2_dfs_set_bbp_params(struct mt76x02_dev *dev)
{
u32 data;
const struct mt76x02_radar_specs *radar_specs;
u8 i, shift;
const struct mt76x2_radar_specs *radar_specs;
u32 data;
switch (dev->mt76.chandef.width) {
case NL80211_CHAN_WIDTH_40:
@ -803,7 +803,7 @@ static void mt76x2_dfs_set_bbp_params(struct mt76x2_dev *dev)
mt76_wr(dev, 0x212c, 0x0c350001);
}
void mt76x2_dfs_adjust_agc(struct mt76x2_dev *dev)
void mt76x2_dfs_adjust_agc(struct mt76x02_dev *dev)
{
u32 agc_r8, agc_r4, val_r8, val_r4, dfs_r31;
@ -824,7 +824,7 @@ void mt76x2_dfs_adjust_agc(struct mt76x2_dev *dev)
mt76_wr(dev, MT_BBP(DFS, 32), 0x00040071);
}
void mt76x2_dfs_init_params(struct mt76x2_dev *dev)
void mt76x2_dfs_init_params(struct mt76x02_dev *dev)
{
struct cfg80211_chan_def *chandef = &dev->mt76.chandef;
@ -835,7 +835,7 @@ void mt76x2_dfs_init_params(struct mt76x2_dev *dev)
/* enable debug mode */
mt76x2_dfs_set_capture_mode_ctrl(dev, true);
mt76x02_irq_enable(&dev->mt76, MT_INT_GPTIMER);
mt76x02_irq_enable(dev, MT_INT_GPTIMER);
mt76_rmw_field(dev, MT_INT_TIMER_EN,
MT_INT_TIMER_EN_GP_TIMER_EN, 1);
} else {
@ -845,15 +845,15 @@ void mt76x2_dfs_init_params(struct mt76x2_dev *dev)
mt76_wr(dev, MT_BBP(DFS, 1), 0xf);
mt76_wr(dev, 0x212c, 0);
mt76x02_irq_disable(&dev->mt76, MT_INT_GPTIMER);
mt76x02_irq_disable(dev, MT_INT_GPTIMER);
mt76_rmw_field(dev, MT_INT_TIMER_EN,
MT_INT_TIMER_EN_GP_TIMER_EN, 0);
}
}
void mt76x2_dfs_init_detector(struct mt76x2_dev *dev)
void mt76x2_dfs_init_detector(struct mt76x02_dev *dev)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
INIT_LIST_HEAD(&dfs_pd->sequences);
INIT_LIST_HEAD(&dfs_pd->seq_pool);
@ -863,10 +863,10 @@ void mt76x2_dfs_init_detector(struct mt76x2_dev *dev)
(unsigned long)dev);
}
void mt76x2_dfs_set_domain(struct mt76x2_dev *dev,
void mt76x2_dfs_set_domain(struct mt76x02_dev *dev,
enum nl80211_dfs_regions region)
{
struct mt76x2_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
if (dfs_pd->region != region) {
tasklet_disable(&dfs_pd->dfs_tasklet);

70
drivers/net/wireless/mediatek/mt76/mt76x2_init.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c
View File

@ -16,13 +16,11 @@
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_eeprom.h"
#include "mt76x2_mcu.h"
#include "mt76x02_util.h"
#include "mt76x02_dma.h"
#include "eeprom.h"
#include "mcu.h"
static void
mt76x2_mac_pbf_init(struct mt76x2_dev *dev)
mt76x2_mac_pbf_init(struct mt76x02_dev *dev)
{
u32 val;
@ -40,7 +38,7 @@ mt76x2_mac_pbf_init(struct mt76x2_dev *dev)
}
static void
mt76x2_fixup_xtal(struct mt76x2_dev *dev)
mt76x2_fixup_xtal(struct mt76x02_dev *dev)
{
u16 eep_val;
s8 offset = 0;
@ -79,7 +77,7 @@ mt76x2_fixup_xtal(struct mt76x2_dev *dev)
}
}
static int mt76x2_mac_reset(struct mt76x2_dev *dev, bool hard)
static int mt76x2_mac_reset(struct mt76x02_dev *dev, bool hard)
{
static const u8 null_addr[ETH_ALEN] = {};
const u8 *macaddr = dev->mt76.macaddr;
@ -177,7 +175,7 @@ static int mt76x2_mac_reset(struct mt76x2_dev *dev, bool hard)
return 0;
}
int mt76x2_mac_start(struct mt76x2_dev *dev)
int mt76x2_mac_start(struct mt76x02_dev *dev)
{
int i;
@ -188,12 +186,12 @@ int mt76x2_mac_start(struct mt76x2_dev *dev)
mt76_rr(dev, MT_TX_STAT_FIFO);
memset(dev->aggr_stats, 0, sizeof(dev->aggr_stats));
mt76x02_mac_start(&dev->mt76);
mt76x02_mac_start(dev);
return 0;
}
void mt76x2_mac_resume(struct mt76x2_dev *dev)
void mt76x2_mac_resume(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_ENABLE_TX |
@ -201,7 +199,7 @@ void mt76x2_mac_resume(struct mt76x2_dev *dev)
}
static void
mt76x2_power_on_rf_patch(struct mt76x2_dev *dev)
mt76x2_power_on_rf_patch(struct mt76x02_dev *dev)
{
mt76_set(dev, 0x10130, BIT(0) | BIT(16));
udelay(1);
@ -222,7 +220,7 @@ mt76x2_power_on_rf_patch(struct mt76x2_dev *dev)
}
static void
mt76x2_power_on_rf(struct mt76x2_dev *dev, int unit)
mt76x2_power_on_rf(struct mt76x02_dev *dev, int unit)
{
int shift = unit ? 8 : 0;
@ -244,7 +242,7 @@ mt76x2_power_on_rf(struct mt76x2_dev *dev, int unit)
}
static void
mt76x2_power_on(struct mt76x2_dev *dev)
mt76x2_power_on(struct mt76x02_dev *dev)
{
u32 val;
@ -279,7 +277,7 @@ mt76x2_power_on(struct mt76x2_dev *dev)
mt76x2_power_on_rf(dev, 1);
}
void mt76x2_set_tx_ackto(struct mt76x2_dev *dev)
void mt76x2_set_tx_ackto(struct mt76x02_dev *dev)
{
u8 ackto, sifs, slottime = dev->slottime;
@ -296,14 +294,14 @@ void mt76x2_set_tx_ackto(struct mt76x2_dev *dev)
MT_TX_TIMEOUT_CFG_ACKTO, ackto);
}
int mt76x2_init_hardware(struct mt76x2_dev *dev)
int mt76x2_init_hardware(struct mt76x02_dev *dev)
{
int ret;
tasklet_init(&dev->pre_tbtt_tasklet, mt76x2_pre_tbtt_tasklet,
(unsigned long) dev);
mt76x02_dma_disable(&dev->mt76);
mt76x02_dma_disable(dev);
mt76x2_reset_wlan(dev, true);
mt76x2_power_on(dev);
@ -317,7 +315,7 @@ int mt76x2_init_hardware(struct mt76x2_dev *dev)
dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG);
ret = mt76x02_dma_init(&dev->mt76);
ret = mt76x02_dma_init(dev);
if (ret)
return ret;
@ -335,7 +333,7 @@ int mt76x2_init_hardware(struct mt76x2_dev *dev)
return 0;
}
void mt76x2_stop_hardware(struct mt76x2_dev *dev)
void mt76x2_stop_hardware(struct mt76x02_dev *dev)
{
cancel_delayed_work_sync(&dev->cal_work);
cancel_delayed_work_sync(&dev->mac_work);
@ -343,35 +341,34 @@ void mt76x2_stop_hardware(struct mt76x2_dev *dev)
mt76x2_mac_stop(dev, false);
}
void mt76x2_cleanup(struct mt76x2_dev *dev)
void mt76x2_cleanup(struct mt76x02_dev *dev)
{
tasklet_disable(&dev->dfs_pd.dfs_tasklet);
tasklet_disable(&dev->pre_tbtt_tasklet);
mt76x2_stop_hardware(dev);
mt76x2_dma_cleanup(dev);
mt76x02_dma_cleanup(dev);
mt76x02_mcu_cleanup(&dev->mt76);
}
struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev)
struct mt76x02_dev *mt76x2_alloc_device(struct device *pdev)
{
static const struct mt76_driver_ops drv_ops = {
.txwi_size = sizeof(struct mt76x02_txwi),
.update_survey = mt76x2_update_channel,
.tx_prepare_skb = mt76x2_tx_prepare_skb,
.tx_complete_skb = mt76x2_tx_complete_skb,
.rx_skb = mt76x2_queue_rx_skb,
.rx_poll_complete = mt76x2_rx_poll_complete,
.tx_prepare_skb = mt76x02_tx_prepare_skb,
.tx_complete_skb = mt76x02_tx_complete_skb,
.rx_skb = mt76x02_queue_rx_skb,
.rx_poll_complete = mt76x02_rx_poll_complete,
.sta_ps = mt76x2_sta_ps,
.get_max_txpwr_adj = mt76x2_tx_get_max_txpwr_adj,
};
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
struct mt76_dev *mdev;
mdev = mt76_alloc_device(sizeof(*dev), &mt76x2_ops);
if (!mdev)
return NULL;
dev = container_of(mdev, struct mt76x2_dev, mt76);
dev = container_of(mdev, struct mt76x02_dev, mt76);
mdev->dev = pdev;
mdev->drv = &drv_ops;
@ -382,7 +379,7 @@ static void mt76x2_regd_notifier(struct wiphy *wiphy,
struct regulatory_request *request)
{
struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mt76x2_dfs_set_domain(dev, request->dfs_region);
}
@ -418,8 +415,8 @@ static const struct ieee80211_iface_combination if_comb[] = {
static void mt76x2_led_set_config(struct mt76_dev *mt76, u8 delay_on,
u8 delay_off)
{
struct mt76x2_dev *dev = container_of(mt76, struct mt76x2_dev,
mt76);
struct mt76x02_dev *dev = container_of(mt76, struct mt76x02_dev,
mt76);
u32 val;
val = MT_LED_STATUS_DURATION(0xff) |
@ -463,21 +460,12 @@ static void mt76x2_led_set_brightness(struct led_classdev *led_cdev,
mt76x2_led_set_config(mt76, 0xff, 0);
}
int mt76x2_register_device(struct mt76x2_dev *dev)
int mt76x2_register_device(struct mt76x02_dev *dev)
{
struct ieee80211_hw *hw = mt76_hw(dev);
struct wiphy *wiphy = hw->wiphy;
void *status_fifo;
int fifo_size;
int i, ret;
fifo_size = roundup_pow_of_two(32 * sizeof(struct mt76x02_tx_status));
status_fifo = devm_kzalloc(dev->mt76.dev, fifo_size, GFP_KERNEL);
if (!status_fifo)
return -ENOMEM;
tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long)dev);
kfifo_init(&dev->txstatus_fifo, status_fifo, fifo_size);
INIT_DELAYED_WORK(&dev->cal_work, mt76x2_phy_calibrate);
INIT_DELAYED_WORK(&dev->mac_work, mt76x2_mac_work);

99
drivers/net/wireless/mediatek/mt76/mt76x2_mac.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_mac.c
View File

@ -16,12 +16,10 @@
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_mcu.h"
#include "mt76x2_eeprom.h"
#include "mt76x2_trace.h"
#include "mt76x02_util.h"
#include "mcu.h"
#include "eeprom.h"
void mt76x2_mac_set_bssid(struct mt76x2_dev *dev, u8 idx, const u8 *addr)
void mt76x2_mac_set_bssid(struct mt76x02_dev *dev, u8 idx, const u8 *addr)
{
idx &= 7;
mt76_wr(dev, MT_MAC_APC_BSSID_L(idx), get_unaligned_le32(addr));
@ -29,76 +27,8 @@ void mt76x2_mac_set_bssid(struct mt76x2_dev *dev, u8 idx, const u8 *addr)
get_unaligned_le16(addr + 4));
}
void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq)
{
struct mt76x02_tx_status stat = {};
unsigned long flags;
u8 update = 1;
bool ret;
if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
return;
trace_mac_txstat_poll(dev);
while (!irq || !kfifo_is_full(&dev->txstatus_fifo)) {
spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags);
ret = mt76x02_mac_load_tx_status(&dev->mt76, &stat);
spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags);
if (!ret)
break;
trace_mac_txstat_fetch(dev, &stat);
if (!irq) {
mt76x02_send_tx_status(&dev->mt76, &stat, &update);
continue;
}
kfifo_put(&dev->txstatus_fifo, stat);
}
}
static void
mt76x2_mac_queue_txdone(struct mt76x2_dev *dev, struct sk_buff *skb,
void *txwi_ptr)
{
struct mt76x2_tx_info *txi = mt76x2_skb_tx_info(skb);
struct mt76x02_txwi *txwi = txwi_ptr;
mt76x2_mac_poll_tx_status(dev, false);
txi->tries = 0;
txi->jiffies = jiffies;
txi->wcid = txwi->wcid;
txi->pktid = txwi->pktid;
trace_mac_txdone_add(dev, txwi->wcid, txwi->pktid);
mt76x02_tx_complete(&dev->mt76, skb);
}
void mt76x2_mac_process_tx_status_fifo(struct mt76x2_dev *dev)
{
struct mt76x02_tx_status stat;
u8 update = 1;
while (kfifo_get(&dev->txstatus_fifo, &stat))
mt76x02_send_tx_status(&dev->mt76, &stat, &update);
}
void mt76x2_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush)
{
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
if (e->txwi)
mt76x2_mac_queue_txdone(dev, e->skb, &e->txwi->txwi);
else
dev_kfree_skb_any(e->skb);
}
static int
mt76_write_beacon(struct mt76x2_dev *dev, int offset, struct sk_buff *skb)
mt76_write_beacon(struct mt76x02_dev *dev, int offset, struct sk_buff *skb)
{
int beacon_len = mt76x02_beacon_offsets[1] - mt76x02_beacon_offsets[0];
struct mt76x02_txwi txwi;
@ -106,7 +36,7 @@ mt76_write_beacon(struct mt76x2_dev *dev, int offset, struct sk_buff *skb)
if (WARN_ON_ONCE(beacon_len < skb->len + sizeof(struct mt76x02_txwi)))
return -ENOSPC;
mt76x2_mac_write_txwi(dev, &txwi, skb, NULL, NULL, skb->len);
mt76x02_mac_write_txwi(&dev->mt76, &txwi, skb, NULL, NULL, skb->len);
mt76_wr_copy(dev, offset, &txwi, sizeof(txwi));
offset += sizeof(txwi);
@ -116,7 +46,7 @@ mt76_write_beacon(struct mt76x2_dev *dev, int offset, struct sk_buff *skb)
}
static int
__mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 bcn_idx, struct sk_buff *skb)
__mt76x2_mac_set_beacon(struct mt76x02_dev *dev, u8 bcn_idx, struct sk_buff *skb)
{
int beacon_len = mt76x02_beacon_offsets[1] - mt76x02_beacon_offsets[0];
int beacon_addr = mt76x02_beacon_offsets[bcn_idx];
@ -141,7 +71,7 @@ __mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 bcn_idx, struct sk_buff *skb)
return ret;
}
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
int mt76x2_mac_set_beacon(struct mt76x02_dev *dev, u8 vif_idx,
struct sk_buff *skb)
{
bool force_update = false;
@ -176,7 +106,8 @@ int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
return 0;
}
void mt76x2_mac_set_beacon_enable(struct mt76x2_dev *dev, u8 vif_idx, bool val)
void mt76x2_mac_set_beacon_enable(struct mt76x02_dev *dev,
u8 vif_idx, bool val)
{
u8 old_mask = dev->beacon_mask;
bool en;
@ -201,14 +132,14 @@ void mt76x2_mac_set_beacon_enable(struct mt76x2_dev *dev, u8 vif_idx, bool val)
mt76_rmw(dev, MT_BEACON_TIME_CFG, reg, reg * en);
if (en)
mt76x02_irq_enable(&dev->mt76, MT_INT_PRE_TBTT | MT_INT_TBTT);
mt76x02_irq_enable(dev, MT_INT_PRE_TBTT | MT_INT_TBTT);
else
mt76x02_irq_disable(&dev->mt76, MT_INT_PRE_TBTT | MT_INT_TBTT);
mt76x02_irq_disable(dev, MT_INT_PRE_TBTT | MT_INT_TBTT);
}
void mt76x2_update_channel(struct mt76_dev *mdev)
{
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
struct mt76_channel_state *state;
u32 active, busy;
@ -225,8 +156,8 @@ void mt76x2_update_channel(struct mt76_dev *mdev)
void mt76x2_mac_work(struct work_struct *work)
{
struct mt76x2_dev *dev = container_of(work, struct mt76x2_dev,
mac_work.work);
struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev,
mac_work.work);
int i, idx;
mt76x2_update_channel(&dev->mt76);
@ -241,7 +172,7 @@ void mt76x2_mac_work(struct work_struct *work)
MT_CALIBRATE_INTERVAL);
}
void mt76x2_mac_set_tx_protection(struct mt76x2_dev *dev, u32 val)
void mt76x2_mac_set_tx_protection(struct mt76x02_dev *dev, u32 val)
{
u32 data = 0;

31
drivers/net/wireless/mediatek/mt76/mt76x2_main.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c
View File

@ -15,12 +15,11 @@
*/
#include "mt76x2.h"
#include "mt76x02_util.h"
static int
mt76x2_start(struct ieee80211_hw *hw)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int ret;
mutex_lock(&dev->mt76.mutex);
@ -46,7 +45,7 @@ out:
static void
mt76x2_stop(struct ieee80211_hw *hw)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
@ -55,7 +54,7 @@ mt76x2_stop(struct ieee80211_hw *hw)
}
static int
mt76x2_set_channel(struct mt76x2_dev *dev, struct cfg80211_chan_def *chandef)
mt76x2_set_channel(struct mt76x02_dev *dev, struct cfg80211_chan_def *chandef)
{
int ret;
@ -91,7 +90,7 @@ mt76x2_set_channel(struct mt76x2_dev *dev, struct cfg80211_chan_def *chandef)
static int
mt76x2_config(struct ieee80211_hw *hw, u32 changed)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int ret = 0;
mutex_lock(&dev->mt76.mutex);
@ -113,7 +112,7 @@ mt76x2_config(struct ieee80211_hw *hw, u32 changed)
if (test_bit(MT76_STATE_RUNNING, &dev->mt76.state)) {
mt76x2_phy_set_txpower(dev);
mt76x2_tx_set_txpwr_auto(dev, dev->mt76.txpower_conf);
mt76x02_tx_set_txpwr_auto(dev, dev->mt76.txpower_conf);
}
}
@ -132,7 +131,7 @@ static void
mt76x2_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *info, u32 changed)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
struct mt76x02_vif *mvif = (struct mt76x02_vif *) vif->drv_priv;
mutex_lock(&dev->mt76.mutex);
@ -169,7 +168,7 @@ void
mt76x2_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
{
struct mt76x02_sta *msta = (struct mt76x02_sta *) sta->drv_priv;
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
int idx = msta->wcid.idx;
mt76_stop_tx_queues(&dev->mt76, sta, true);
@ -180,7 +179,7 @@ static void
mt76x2_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
const u8 *mac)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
tasklet_disable(&dev->pre_tbtt_tasklet);
set_bit(MT76_SCANNING, &dev->mt76.state);
@ -189,7 +188,7 @@ mt76x2_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
static void
mt76x2_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
clear_bit(MT76_SCANNING, &dev->mt76.state);
tasklet_enable(&dev->pre_tbtt_tasklet);
@ -204,7 +203,7 @@ mt76x2_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
static int
mt76x2_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, int *dbm)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
*dbm = dev->mt76.txpower_cur / 2;
@ -217,7 +216,7 @@ mt76x2_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, int *dbm)
static void mt76x2_set_coverage_class(struct ieee80211_hw *hw,
s16 coverage_class)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
dev->coverage_class = coverage_class;
@ -234,7 +233,7 @@ mt76x2_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set)
static int mt76x2_set_antenna(struct ieee80211_hw *hw, u32 tx_ant,
u32 rx_ant)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
if (!tx_ant || tx_ant > 3 || tx_ant != rx_ant)
return -EINVAL;
@ -255,7 +254,7 @@ static int mt76x2_set_antenna(struct ieee80211_hw *hw, u32 tx_ant,
static int mt76x2_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant,
u32 *rx_ant)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
*tx_ant = dev->mt76.antenna_mask;
@ -268,7 +267,7 @@ static int mt76x2_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant,
static int
mt76x2_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
if (val != ~0 && val > 0xffff)
return -EINVAL;
@ -281,7 +280,7 @@ mt76x2_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
}
const struct ieee80211_ops mt76x2_ops = {
.tx = mt76x2_tx,
.tx = mt76x02_tx,
.start = mt76x2_start,
.stop = mt76x2_stop,
.add_interface = mt76x02_add_interface,

11
drivers/net/wireless/mediatek/mt76/mt76x2_mcu.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c
View File

@ -19,12 +19,11 @@
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_mcu.h"
#include "mt76x2_eeprom.h"
#include "mt76x02_dma.h"
#include "mcu.h"
#include "eeprom.h"
static int
mt76pci_load_rom_patch(struct mt76x2_dev *dev)
mt76pci_load_rom_patch(struct mt76x02_dev *dev)
{
const struct firmware *fw = NULL;
struct mt76x02_patch_header *hdr;
@ -90,7 +89,7 @@ out:
}
static int
mt76pci_load_firmware(struct mt76x2_dev *dev)
mt76pci_load_firmware(struct mt76x02_dev *dev)
{
const struct firmware *fw;
const struct mt76x02_fw_header *hdr;
@ -166,7 +165,7 @@ error:
return -ENOENT;
}
int mt76x2_mcu_init(struct mt76x2_dev *dev)
int mt76x2_mcu_init(struct mt76x02_dev *dev)
{
static const struct mt76_mcu_ops mt76x2_mcu_ops = {
.mcu_msg_alloc = mt76x02_mcu_msg_alloc,

35
drivers/net/wireless/mediatek/mt76/mt76x2_phy.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c
View File

@ -16,11 +16,12 @@
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_mcu.h"
#include "mt76x2_eeprom.h"
#include "mcu.h"
#include "eeprom.h"
#include "../mt76x02_phy.h"
static bool
mt76x2_phy_tssi_init_cal(struct mt76x2_dev *dev)
mt76x2_phy_tssi_init_cal(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
u32 flag = 0;
@ -43,7 +44,7 @@ mt76x2_phy_tssi_init_cal(struct mt76x2_dev *dev)
}
static void
mt76x2_phy_channel_calibrate(struct mt76x2_dev *dev, bool mac_stopped)
mt76x2_phy_channel_calibrate(struct mt76x02_dev *dev, bool mac_stopped)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
bool is_5ghz = chan->band == NL80211_BAND_5GHZ;
@ -77,7 +78,7 @@ mt76x2_phy_channel_calibrate(struct mt76x2_dev *dev, bool mac_stopped)
dev->cal.channel_cal_done = true;
}
void mt76x2_phy_set_antenna(struct mt76x2_dev *dev)
void mt76x2_phy_set_antenna(struct mt76x02_dev *dev)
{
u32 val;
@ -124,14 +125,14 @@ void mt76x2_phy_set_antenna(struct mt76x2_dev *dev)
}
static void
mt76x2_get_agc_gain(struct mt76x2_dev *dev, u8 *dest)
mt76x2_get_agc_gain(struct mt76x02_dev *dev, u8 *dest)
{
dest[0] = mt76_get_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN);
dest[1] = mt76_get_field(dev, MT_BBP(AGC, 9), MT_BBP_AGC_GAIN);
}
static int
mt76x2_get_rssi_gain_thresh(struct mt76x2_dev *dev)
mt76x2_get_rssi_gain_thresh(struct mt76x02_dev *dev)
{
switch (dev->mt76.chandef.width) {
case NL80211_CHAN_WIDTH_80:
@ -144,7 +145,7 @@ mt76x2_get_rssi_gain_thresh(struct mt76x2_dev *dev)
}
static int
mt76x2_get_low_rssi_gain_thresh(struct mt76x2_dev *dev)
mt76x2_get_low_rssi_gain_thresh(struct mt76x02_dev *dev)
{
switch (dev->mt76.chandef.width) {
case NL80211_CHAN_WIDTH_80:
@ -157,7 +158,7 @@ mt76x2_get_low_rssi_gain_thresh(struct mt76x2_dev *dev)
}
static void
mt76x2_phy_set_gain_val(struct mt76x2_dev *dev)
mt76x2_phy_set_gain_val(struct mt76x02_dev *dev)
{
u32 val;
u8 gain_val[2];
@ -182,7 +183,7 @@ mt76x2_phy_set_gain_val(struct mt76x2_dev *dev)
}
static void
mt76x2_phy_adjust_vga_gain(struct mt76x2_dev *dev)
mt76x2_phy_adjust_vga_gain(struct mt76x02_dev *dev)
{
u32 false_cca;
u8 limit = dev->cal.low_gain > 0 ? 16 : 4;
@ -201,7 +202,7 @@ mt76x2_phy_adjust_vga_gain(struct mt76x2_dev *dev)
}
static void
mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev)
{
u8 *gain = dev->cal.agc_gain_init;
u8 low_gain_delta, gain_delta;
@ -209,7 +210,7 @@ mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
int low_gain;
u32 val;
dev->cal.avg_rssi_all = mt76x2_phy_get_min_avg_rssi(dev);
dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
low_gain = (dev->cal.avg_rssi_all > mt76x2_get_rssi_gain_thresh(dev)) +
(dev->cal.avg_rssi_all > mt76x2_get_low_rssi_gain_thresh(dev));
@ -264,7 +265,7 @@ mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
mt76_rr(dev, MT_RX_STAT_1);
}
int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef)
{
struct ieee80211_channel *chan = chandef->chan;
@ -404,7 +405,7 @@ int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
}
static void
mt76x2_phy_temp_compensate(struct mt76x2_dev *dev)
mt76x2_phy_temp_compensate(struct mt76x02_dev *dev)
{
struct mt76x2_temp_comp t;
int temp, db_diff;
@ -433,9 +434,9 @@ mt76x2_phy_temp_compensate(struct mt76x2_dev *dev)
void mt76x2_phy_calibrate(struct work_struct *work)
{
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
dev = container_of(work, struct mt76x2_dev, cal_work.work);
dev = container_of(work, struct mt76x02_dev, cal_work.work);
mt76x2_phy_channel_calibrate(dev, false);
mt76x2_phy_tssi_compensate(dev, true);
mt76x2_phy_temp_compensate(dev);
@ -444,7 +445,7 @@ void mt76x2_phy_calibrate(struct work_struct *work)
MT_CALIBRATE_INTERVAL);
}
int mt76x2_phy_start(struct mt76x2_dev *dev)
int mt76x2_phy_start(struct mt76x02_dev *dev)
{
int ret;

43
drivers/net/wireless/mediatek/mt76/mt76x2_tx.c → drivers/net/wireless/mediatek/mt76/mt76x2/pci_tx.c
View File

@ -15,50 +15,17 @@
*/
#include "mt76x2.h"
#include "mt76x02_util.h"
#include "mt76x02_dma.h"
struct beacon_bc_data {
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
struct sk_buff_head q;
struct sk_buff *tail[8];
};
int mt76x2_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info)
{
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
int qsel = MT_QSEL_EDCA;
int ret;
if (q == &dev->mt76.q_tx[MT_TXQ_PSD] && wcid && wcid->idx < 128)
mt76x02_mac_wcid_set_drop(&dev->mt76, wcid->idx, false);
mt76x2_mac_write_txwi(dev, txwi, skb, wcid, sta, skb->len);
ret = mt76x02_insert_hdr_pad(skb);
if (ret < 0)
return ret;
if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
qsel = MT_QSEL_MGMT;
*tx_info = FIELD_PREP(MT_TXD_INFO_QSEL, qsel) |
MT_TXD_INFO_80211;
if (!wcid || wcid->hw_key_idx == 0xff || wcid->sw_iv)
*tx_info |= MT_TXD_INFO_WIV;
return 0;
}
static void
mt76x2_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
{
struct mt76x2_dev *dev = (struct mt76x2_dev *) priv;
struct mt76x02_dev *dev = (struct mt76x02_dev *) priv;
struct mt76x02_vif *mvif = (struct mt76x02_vif *) vif->drv_priv;
struct sk_buff *skb = NULL;
@ -76,7 +43,7 @@ static void
mt76x2_add_buffered_bc(void *priv, u8 *mac, struct ieee80211_vif *vif)
{
struct beacon_bc_data *data = priv;
struct mt76x2_dev *dev = data->dev;
struct mt76x02_dev *dev = data->dev;
struct mt76x02_vif *mvif = (struct mt76x02_vif *) vif->drv_priv;
struct ieee80211_tx_info *info;
struct sk_buff *skb;
@ -97,7 +64,7 @@ mt76x2_add_buffered_bc(void *priv, u8 *mac, struct ieee80211_vif *vif)
}
static void
mt76x2_resync_beacon_timer(struct mt76x2_dev *dev)
mt76x2_resync_beacon_timer(struct mt76x02_dev *dev)
{
u32 timer_val = dev->beacon_int << 4;
@ -129,7 +96,7 @@ mt76x2_resync_beacon_timer(struct mt76x2_dev *dev)
void mt76x2_pre_tbtt_tasklet(unsigned long arg)
{
struct mt76x2_dev *dev = (struct mt76x2_dev *) arg;
struct mt76x02_dev *dev = (struct mt76x02_dev *) arg;
struct mt76_queue *q = &dev->mt76.q_tx[MT_TXQ_PSD];
struct beacon_bc_data data = {};
struct sk_buff *skb;

71
drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c → drivers/net/wireless/mediatek/mt76/mt76x2/phy.c
View File

@ -16,12 +16,12 @@
*/
#include "mt76x2.h"
#include "mt76x2_eeprom.h"
#include "mt76x2_mcu.h"
#include "mt76x02_phy.h"
#include "eeprom.h"
#include "mcu.h"
#include "../mt76x02_phy.h"
static void
mt76x2_adjust_high_lna_gain(struct mt76x2_dev *dev, int reg, s8 offset)
mt76x2_adjust_high_lna_gain(struct mt76x02_dev *dev, int reg, s8 offset)
{
s8 gain;
@ -31,7 +31,7 @@ mt76x2_adjust_high_lna_gain(struct mt76x2_dev *dev, int reg, s8 offset)
}
static void
mt76x2_adjust_agc_gain(struct mt76x2_dev *dev, int reg, s8 offset)
mt76x2_adjust_agc_gain(struct mt76x02_dev *dev, int reg, s8 offset)
{
s8 gain;
@ -40,7 +40,7 @@ mt76x2_adjust_agc_gain(struct mt76x2_dev *dev, int reg, s8 offset)
mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_GAIN, gain);
}
void mt76x2_apply_gain_adj(struct mt76x2_dev *dev)
void mt76x2_apply_gain_adj(struct mt76x02_dev *dev)
{
s8 *gain_adj = dev->cal.rx.high_gain;
@ -52,7 +52,7 @@ void mt76x2_apply_gain_adj(struct mt76x2_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x2_apply_gain_adj);
void mt76x2_phy_set_txpower_regs(struct mt76x2_dev *dev,
void mt76x2_phy_set_txpower_regs(struct mt76x02_dev *dev,
enum nl80211_band band)
{
u32 pa_mode[2];
@ -144,7 +144,7 @@ mt76x2_get_min_rate_power(struct mt76_rate_power *r)
return ret;
}
void mt76x2_phy_set_txpower(struct mt76x2_dev *dev)
void mt76x2_phy_set_txpower(struct mt76x02_dev *dev)
{
enum nl80211_chan_width width = dev->mt76.chandef.width;
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
@ -191,7 +191,7 @@ void mt76x2_phy_set_txpower(struct mt76x2_dev *dev)
}
EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);
void mt76x2_configure_tx_delay(struct mt76x2_dev *dev,
void mt76x2_configure_tx_delay(struct mt76x02_dev *dev,
enum nl80211_band band, u8 bw)
{
u32 cfg0, cfg1;
@ -210,7 +210,7 @@ void mt76x2_configure_tx_delay(struct mt76x2_dev *dev,
}
EXPORT_SYMBOL_GPL(mt76x2_configure_tx_delay);
void mt76x2_phy_set_bw(struct mt76x2_dev *dev, int width, u8 ctrl)
void mt76x2_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl)
{
int core_val, agc_val;
@ -236,7 +236,7 @@ void mt76x2_phy_set_bw(struct mt76x2_dev *dev, int width, u8 ctrl)
}
EXPORT_SYMBOL_GPL(mt76x2_phy_set_bw);
void mt76x2_phy_set_band(struct mt76x2_dev *dev, int band, bool primary_upper)
void mt76x2_phy_set_band(struct mt76x02_dev *dev, int band, bool primary_upper)
{
switch (band) {
case NL80211_BAND_2GHZ:
@ -254,54 +254,7 @@ void mt76x2_phy_set_band(struct mt76x2_dev *dev, int band, bool primary_upper)
}
EXPORT_SYMBOL_GPL(mt76x2_phy_set_band);
int mt76x2_phy_get_min_avg_rssi(struct mt76x2_dev *dev)
{
struct mt76x02_sta *sta;
struct mt76_wcid *wcid;
int i, j, min_rssi = 0;
s8 cur_rssi;
local_bh_disable();
rcu_read_lock();
for (i = 0; i < ARRAY_SIZE(dev->mt76.wcid_mask); i++) {
unsigned long mask = dev->mt76.wcid_mask[i];
if (!mask)
continue;
for (j = i * BITS_PER_LONG; mask; j++, mask >>= 1) {
if (!(mask & 1))
continue;
wcid = rcu_dereference(dev->mt76.wcid[j]);
if (!wcid)
continue;
sta = container_of(wcid, struct mt76x02_sta, wcid);
spin_lock(&dev->mt76.rx_lock);
if (sta->inactive_count++ < 5)
cur_rssi = ewma_signal_read(&sta->rssi);
else
cur_rssi = 0;
spin_unlock(&dev->mt76.rx_lock);
if (cur_rssi < min_rssi)
min_rssi = cur_rssi;
}
}
rcu_read_unlock();
local_bh_enable();
if (!min_rssi)
return -75;
return min_rssi;
}
EXPORT_SYMBOL_GPL(mt76x2_phy_get_min_avg_rssi);
void mt76x2_phy_tssi_compensate(struct mt76x2_dev *dev, bool wait)
void mt76x2_phy_tssi_compensate(struct mt76x02_dev *dev, bool wait)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
struct mt76x2_tx_power_info txp;

10
drivers/net/wireless/mediatek/mt76/mt76x2_usb.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb.c
View File

@ -17,7 +17,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include "mt76x02_usb.h"
#include "../mt76x02_usb.h"
#include "mt76x2u.h"
static const struct usb_device_id mt76x2u_device_table[] = {
@ -37,7 +37,7 @@ static int mt76x2u_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
int err;
dev = mt76x2u_alloc_device(&intf->dev);
@ -72,7 +72,7 @@ err:
static void mt76x2u_disconnect(struct usb_interface *intf)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct mt76x2_dev *dev = usb_get_intfdata(intf);
struct mt76x02_dev *dev = usb_get_intfdata(intf);
struct ieee80211_hw *hw = mt76_hw(dev);
set_bit(MT76_REMOVED, &dev->mt76.state);
@ -87,7 +87,7 @@ static void mt76x2u_disconnect(struct usb_interface *intf)
static int __maybe_unused mt76x2u_suspend(struct usb_interface *intf,
pm_message_t state)
{
struct mt76x2_dev *dev = usb_get_intfdata(intf);
struct mt76x02_dev *dev = usb_get_intfdata(intf);
struct mt76_usb *usb = &dev->mt76.usb;
mt76u_stop_queues(&dev->mt76);
@ -99,7 +99,7 @@ static int __maybe_unused mt76x2u_suspend(struct usb_interface *intf,
static int __maybe_unused mt76x2u_resume(struct usb_interface *intf)
{
struct mt76x2_dev *dev = usb_get_intfdata(intf);
struct mt76x02_dev *dev = usb_get_intfdata(intf);
struct mt76_usb *usb = &dev->mt76.usb;
int err;

40
drivers/net/wireless/mediatek/mt76/mt76x2u_init.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c
View File

@ -17,11 +17,11 @@
#include <linux/delay.h>
#include "mt76x2u.h"
#include "mt76x02_util.h"
#include "mt76x02_phy.h"
#include "mt76x2_eeprom.h"
#include "eeprom.h"
#include "../mt76x02_phy.h"
#include "../mt76x02_usb.h"
static void mt76x2u_init_dma(struct mt76x2_dev *dev)
static void mt76x2u_init_dma(struct mt76x02_dev *dev)
{
u32 val = mt76_rr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG));
@ -36,7 +36,7 @@ static void mt76x2u_init_dma(struct mt76x2_dev *dev)
mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val);
}
static void mt76x2u_power_on_rf_patch(struct mt76x2_dev *dev)
static void mt76x2u_power_on_rf_patch(struct mt76x02_dev *dev)
{
mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) | BIT(16));
udelay(1);
@ -56,7 +56,7 @@ static void mt76x2u_power_on_rf_patch(struct mt76x2_dev *dev)
mt76_set(dev, MT_VEND_ADDR(CFG, 0x14c), BIT(19) | BIT(20));
}
static void mt76x2u_power_on_rf(struct mt76x2_dev *dev, int unit)
static void mt76x2u_power_on_rf(struct mt76x02_dev *dev, int unit)
{
int shift = unit ? 8 : 0;
u32 val = (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift;
@ -78,7 +78,7 @@ static void mt76x2u_power_on_rf(struct mt76x2_dev *dev, int unit)
mt76_set(dev, 0x530, 0xf);
}
static void mt76x2u_power_on(struct mt76x2_dev *dev)
static void mt76x2u_power_on(struct mt76x02_dev *dev)
{
u32 val;
@ -114,7 +114,7 @@ static void mt76x2u_power_on(struct mt76x2_dev *dev)
mt76x2u_power_on_rf(dev, 1);
}
static int mt76x2u_init_eeprom(struct mt76x2_dev *dev)
static int mt76x2u_init_eeprom(struct mt76x02_dev *dev)
{
u32 val, i;
@ -134,29 +134,29 @@ static int mt76x2u_init_eeprom(struct mt76x2_dev *dev)
return 0;
}
struct mt76x2_dev *mt76x2u_alloc_device(struct device *pdev)
struct mt76x02_dev *mt76x2u_alloc_device(struct device *pdev)
{
static const struct mt76_driver_ops drv_ops = {
.tx_prepare_skb = mt76x2u_tx_prepare_skb,
.tx_complete_skb = mt76x02_tx_complete_skb,
.tx_prepare_skb = mt76x02u_tx_prepare_skb,
.tx_complete_skb = mt76x02u_tx_complete_skb,
.tx_status_data = mt76x02_tx_status_data,
.rx_skb = mt76x2_queue_rx_skb,
.rx_skb = mt76x02_queue_rx_skb,
};
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
struct mt76_dev *mdev;
mdev = mt76_alloc_device(sizeof(*dev), &mt76x2u_ops);
if (!mdev)
return NULL;
dev = container_of(mdev, struct mt76x2_dev, mt76);
dev = container_of(mdev, struct mt76x02_dev, mt76);
mdev->dev = pdev;
mdev->drv = &drv_ops;
return dev;
}
static void mt76x2u_init_beacon_offsets(struct mt76x2_dev *dev)
static void mt76x2u_init_beacon_offsets(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_BCN_OFFSET(0), 0x18100800);
mt76_wr(dev, MT_BCN_OFFSET(1), 0x38302820);
@ -164,7 +164,7 @@ static void mt76x2u_init_beacon_offsets(struct mt76x2_dev *dev)
mt76_wr(dev, MT_BCN_OFFSET(3), 0x78706860);
}
int mt76x2u_init_hardware(struct mt76x2_dev *dev)
int mt76x2u_init_hardware(struct mt76x02_dev *dev)
{
const struct mt76_wcid_addr addr = {
.macaddr = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
@ -243,7 +243,7 @@ int mt76x2u_init_hardware(struct mt76x2_dev *dev)
return mt76x2u_mac_stop(dev);
}
int mt76x2u_register_device(struct mt76x2_dev *dev)
int mt76x2u_register_device(struct mt76x02_dev *dev)
{
struct ieee80211_hw *hw = mt76_hw(dev);
struct wiphy *wiphy = hw->wiphy;
@ -262,7 +262,7 @@ int mt76x2u_register_device(struct mt76x2_dev *dev)
err = mt76u_mcu_init_rx(&dev->mt76);
if (err < 0)
return err;
goto fail;
err = mt76x2u_init_hardware(dev);
if (err < 0)
@ -294,14 +294,14 @@ fail:
return err;
}
void mt76x2u_stop_hw(struct mt76x2_dev *dev)
void mt76x2u_stop_hw(struct mt76x02_dev *dev)
{
mt76u_stop_stat_wk(&dev->mt76);
cancel_delayed_work_sync(&dev->cal_work);
mt76x2u_mac_stop(dev);
}
void mt76x2u_cleanup(struct mt76x2_dev *dev)
void mt76x2u_cleanup(struct mt76x02_dev *dev)
{
mt76x02_mcu_set_radio_state(&dev->mt76, false, false);
mt76x2u_stop_hw(dev);

14
drivers/net/wireless/mediatek/mt76/mt76x2u_mac.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c
View File

@ -15,9 +15,9 @@
*/
#include "mt76x2u.h"
#include "mt76x2_eeprom.h"
#include "eeprom.h"
static void mt76x2u_mac_reset_counters(struct mt76x2_dev *dev)
static void mt76x2u_mac_reset_counters(struct mt76x02_dev *dev)
{
mt76_rr(dev, MT_RX_STAT_0);
mt76_rr(dev, MT_RX_STAT_1);
@ -27,7 +27,7 @@ static void mt76x2u_mac_reset_counters(struct mt76x2_dev *dev)
mt76_rr(dev, MT_TX_STA_2);
}
static void mt76x2u_mac_fixup_xtal(struct mt76x2_dev *dev)
static void mt76x2u_mac_fixup_xtal(struct mt76x02_dev *dev)
{
s8 offset = 0;
u16 eep_val;
@ -80,7 +80,7 @@ static void mt76x2u_mac_fixup_xtal(struct mt76x2_dev *dev)
}
}
int mt76x2u_mac_reset(struct mt76x2_dev *dev)
int mt76x2u_mac_reset(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_WPDMA_GLO_CFG, BIT(4) | BIT(5));
@ -114,7 +114,7 @@ int mt76x2u_mac_reset(struct mt76x2_dev *dev)
return 0;
}
int mt76x2u_mac_start(struct mt76x2_dev *dev)
int mt76x2u_mac_start(struct mt76x02_dev *dev)
{
mt76x2u_mac_reset_counters(dev);
@ -131,7 +131,7 @@ int mt76x2u_mac_start(struct mt76x2_dev *dev)
return 0;
}
int mt76x2u_mac_stop(struct mt76x2_dev *dev)
int mt76x2u_mac_stop(struct mt76x02_dev *dev)
{
int i, count = 0, val;
bool stopped = false;
@ -212,7 +212,7 @@ int mt76x2u_mac_stop(struct mt76x2_dev *dev)
return 0;
}
void mt76x2u_mac_resume(struct mt76x2_dev *dev)
void mt76x2u_mac_resume(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_ENABLE_TX |

19
drivers/net/wireless/mediatek/mt76/mt76x2u_main.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c
View File

@ -15,11 +15,10 @@
*/
#include "mt76x2u.h"
#include "mt76x02_util.h"
static int mt76x2u_start(struct ieee80211_hw *hw)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int ret;
mutex_lock(&dev->mt76.mutex);
@ -37,7 +36,7 @@ out:
static void mt76x2u_stop(struct ieee80211_hw *hw)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
@ -48,7 +47,7 @@ static void mt76x2u_stop(struct ieee80211_hw *hw)
static int mt76x2u_add_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
if (!ether_addr_equal(dev->mt76.macaddr, vif->addr))
mt76x02_mac_setaddr(&dev->mt76, vif->addr);
@ -58,7 +57,7 @@ static int mt76x2u_add_interface(struct ieee80211_hw *hw,
}
static int
mt76x2u_set_channel(struct mt76x2_dev *dev,
mt76x2u_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef)
{
int err;
@ -86,7 +85,7 @@ static void
mt76x2u_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *info, u32 changed)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
mutex_lock(&dev->mt76.mutex);
@ -108,7 +107,7 @@ mt76x2u_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
static int
mt76x2u_config(struct ieee80211_hw *hw, u32 changed)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
int err = 0;
mutex_lock(&dev->mt76.mutex);
@ -146,7 +145,7 @@ static void
mt76x2u_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
const u8 *mac)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
set_bit(MT76_SCANNING, &dev->mt76.state);
}
@ -154,13 +153,13 @@ mt76x2u_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
static void
mt76x2u_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
{
struct mt76x2_dev *dev = hw->priv;
struct mt76x02_dev *dev = hw->priv;
clear_bit(MT76_SCANNING, &dev->mt76.state);
}
const struct ieee80211_ops mt76x2u_ops = {
.tx = mt76x2_tx,
.tx = mt76x02_tx,
.start = mt76x2u_start,
.stop = mt76x2u_stop,
.add_interface = mt76x2u_add_interface,

20
drivers/net/wireless/mediatek/mt76/mt76x2u_mcu.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c
View File

@ -17,8 +17,8 @@
#include <linux/firmware.h>
#include "mt76x2u.h"
#include "mt76x2_eeprom.h"
#include "mt76x02_usb.h"
#include "eeprom.h"
#include "../mt76x02_usb.h"
#define MT_CMD_HDR_LEN 4
@ -29,7 +29,7 @@
#define MT76U_MCU_DLM_OFFSET 0x110000
#define MT76U_MCU_ROM_PATCH_OFFSET 0x90000
int mt76x2u_mcu_set_dynamic_vga(struct mt76x2_dev *dev, u8 channel, bool ap,
int mt76x2u_mcu_set_dynamic_vga(struct mt76x02_dev *dev, u8 channel, bool ap,
bool ext, int rssi, u32 false_cca)
{
struct {
@ -53,14 +53,14 @@ int mt76x2u_mcu_set_dynamic_vga(struct mt76x2_dev *dev, u8 channel, bool ap,
return mt76_mcu_send_msg(dev, skb, CMD_DYNC_VGA_OP, true);
}
static void mt76x2u_mcu_load_ivb(struct mt76x2_dev *dev)
static void mt76x2u_mcu_load_ivb(struct mt76x02_dev *dev)
{
mt76u_vendor_request(&dev->mt76, MT_VEND_DEV_MODE,
USB_DIR_OUT | USB_TYPE_VENDOR,
0x12, 0, NULL, 0);
}
static void mt76x2u_mcu_enable_patch(struct mt76x2_dev *dev)
static void mt76x2u_mcu_enable_patch(struct mt76x02_dev *dev)
{
struct mt76_usb *usb = &dev->mt76.usb;
const u8 data[] = {
@ -75,7 +75,7 @@ static void mt76x2u_mcu_enable_patch(struct mt76x2_dev *dev)
0x12, 0, usb->data, sizeof(data));
}
static void mt76x2u_mcu_reset_wmt(struct mt76x2_dev *dev)
static void mt76x2u_mcu_reset_wmt(struct mt76x02_dev *dev)
{
struct mt76_usb *usb = &dev->mt76.usb;
u8 data[] = {
@ -89,7 +89,7 @@ static void mt76x2u_mcu_reset_wmt(struct mt76x2_dev *dev)
0x12, 0, usb->data, sizeof(data));
}
static int mt76x2u_mcu_load_rom_patch(struct mt76x2_dev *dev)
static int mt76x2u_mcu_load_rom_patch(struct mt76x02_dev *dev)
{
bool rom_protect = !is_mt7612(dev);
struct mt76x02_patch_header *hdr;
@ -176,7 +176,7 @@ out:
return err;
}
static int mt76x2u_mcu_load_firmware(struct mt76x2_dev *dev)
static int mt76x2u_mcu_load_firmware(struct mt76x02_dev *dev)
{
u32 val, dlm_offset = MT76U_MCU_DLM_OFFSET;
const struct mt76x02_fw_header *hdr;
@ -268,7 +268,7 @@ out:
return err;
}
int mt76x2u_mcu_fw_init(struct mt76x2_dev *dev)
int mt76x2u_mcu_fw_init(struct mt76x02_dev *dev)
{
int err;
@ -279,7 +279,7 @@ int mt76x2u_mcu_fw_init(struct mt76x2_dev *dev)
return mt76x2u_mcu_load_firmware(dev);
}
int mt76x2u_mcu_init(struct mt76x2_dev *dev)
int mt76x2u_mcu_init(struct mt76x02_dev *dev)
{
int err;

15
drivers/net/wireless/mediatek/mt76/mt76x2u_phy.c → drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c
View File

@ -15,9 +15,10 @@
*/
#include "mt76x2u.h"
#include "mt76x2_eeprom.h"
#include "eeprom.h"
#include "../mt76x02_phy.h"
void mt76x2u_phy_channel_calibrate(struct mt76x2_dev *dev)
void mt76x2u_phy_channel_calibrate(struct mt76x02_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
bool is_5ghz = chan->band == NL80211_BAND_5GHZ;
@ -39,7 +40,7 @@ void mt76x2u_phy_channel_calibrate(struct mt76x2_dev *dev)
}
static void
mt76x2u_phy_update_channel_gain(struct mt76x2_dev *dev)
mt76x2u_phy_update_channel_gain(struct mt76x02_dev *dev)
{
u8 channel = dev->mt76.chandef.chan->hw_value;
int freq, freq1;
@ -68,7 +69,7 @@ mt76x2u_phy_update_channel_gain(struct mt76x2_dev *dev)
break;
}
dev->cal.avg_rssi_all = mt76x2_phy_get_min_avg_rssi(dev);
dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS,
mt76_rr(dev, MT_RX_STAT_1));
@ -78,9 +79,9 @@ mt76x2u_phy_update_channel_gain(struct mt76x2_dev *dev)
void mt76x2u_phy_calibrate(struct work_struct *work)
{
struct mt76x2_dev *dev;
struct mt76x02_dev *dev;
dev = container_of(work, struct mt76x2_dev, cal_work.work);
dev = container_of(work, struct mt76x02_dev, cal_work.work);
mt76x2_phy_tssi_compensate(dev, false);
mt76x2u_phy_update_channel_gain(dev);
@ -88,7 +89,7 @@ void mt76x2u_phy_calibrate(struct work_struct *work)
MT_CALIBRATE_INTERVAL);
}
int mt76x2u_phy_set_channel(struct mt76x2_dev *dev,
int mt76x2u_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef)
{
u32 ext_cca_chan[4] = {

76
drivers/net/wireless/mediatek/mt76/mt76x2_core.c
View File

@ -1,76 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <linux/delay.h>
#include "mt76x2.h"
#include "mt76x2_trace.h"
#include "mt76x02_util.h"
void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
{
mt76x02_irq_enable(mdev, MT_INT_RX_DONE(q));
}
irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance)
{
struct mt76x2_dev *dev = dev_instance;
u32 intr;
intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state))
return IRQ_NONE;
trace_dev_irq(dev, intr, dev->mt76.mmio.irqmask);
intr &= dev->mt76.mmio.irqmask;
if (intr & MT_INT_TX_DONE_ALL) {
mt76x02_irq_disable(&dev->mt76, MT_INT_TX_DONE_ALL);
tasklet_schedule(&dev->tx_tasklet);
}
if (intr & MT_INT_RX_DONE(0)) {
mt76x02_irq_disable(&dev->mt76, MT_INT_RX_DONE(0));
napi_schedule(&dev->mt76.napi[0]);
}
if (intr & MT_INT_RX_DONE(1)) {
mt76x02_irq_disable(&dev->mt76, MT_INT_RX_DONE(1));
napi_schedule(&dev->mt76.napi[1]);
}
if (intr & MT_INT_PRE_TBTT)
tasklet_schedule(&dev->pre_tbtt_tasklet);
/* send buffered multicast frames now */
if (intr & MT_INT_TBTT)
mt76_queue_kick(dev, &dev->mt76.q_tx[MT_TXQ_PSD]);
if (intr & MT_INT_TX_STAT) {
mt76x2_mac_poll_tx_status(dev, true);
tasklet_schedule(&dev->tx_tasklet);
}
if (intr & MT_INT_GPTIMER) {
mt76x02_irq_disable(&dev->mt76, MT_INT_GPTIMER);
tasklet_schedule(&dev->dfs_pd.dfs_tasklet);
}
return IRQ_HANDLED;
}

64
drivers/net/wireless/mediatek/mt76/mt76x2_mac.h
View File

@ -1,64 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __MT76x2_MAC_H
#define __MT76x2_MAC_H
#include "mt76.h"
#include "mt76x02_mac.h"
struct mt76x2_dev;
struct mt76x2_sta;
struct mt76x02_vif;
struct mt76x2_tx_info {
unsigned long jiffies;
u8 tries;
u8 wcid;
u8 pktid;
u8 retry;
};
static inline struct mt76x2_tx_info *
mt76x2_skb_tx_info(struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
return (void *) info->status.status_driver_data;
}
int mt76x2_mac_start(struct mt76x2_dev *dev);
void mt76x2_mac_stop(struct mt76x2_dev *dev, bool force);
void mt76x2_mac_resume(struct mt76x2_dev *dev);
void mt76x2_mac_set_bssid(struct mt76x2_dev *dev, u8 idx, const u8 *addr);
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
void *rxi);
void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x02_txwi *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int len);
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
struct sk_buff *skb);
void mt76x2_mac_set_beacon_enable(struct mt76x2_dev *dev, u8 vif_idx, bool val);
void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq);
void mt76x2_mac_process_tx_status_fifo(struct mt76x2_dev *dev);
void mt76x2_mac_work(struct work_struct *work);
#endif

239
drivers/net/wireless/mediatek/mt76/mt76x2_mac_common.c
View File

@ -1,239 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "mt76x2.h"
#include "mt76x02_util.h"
void mt76x2_mac_stop(struct mt76x2_dev *dev, bool force)
{
bool stopped = false;
u32 rts_cfg;
int i;
mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
rts_cfg = mt76_rr(dev, MT_TX_RTS_CFG);
mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg & ~MT_TX_RTS_CFG_RETRY_LIMIT);
/* Wait for MAC to become idle */
for (i = 0; i < 300; i++) {
if ((mt76_rr(dev, MT_MAC_STATUS) &
(MT_MAC_STATUS_RX | MT_MAC_STATUS_TX)) ||
mt76_rr(dev, MT_BBP(IBI, 12))) {
udelay(1);
continue;
}
stopped = true;
break;
}
if (force && !stopped) {
mt76_set(dev, MT_BBP(CORE, 4), BIT(1));
mt76_clear(dev, MT_BBP(CORE, 4), BIT(1));
mt76_set(dev, MT_BBP(CORE, 4), BIT(0));
mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));
}
mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg);
}
EXPORT_SYMBOL_GPL(mt76x2_mac_stop);
void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x02_txwi *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int len)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_tx_rate *rate = &info->control.rates[0];
struct ieee80211_key_conf *key = info->control.hw_key;
u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
u8 nss;
s8 txpwr_adj, max_txpwr_adj;
u8 ccmp_pn[8];
memset(txwi, 0, sizeof(*txwi));
if (wcid)
txwi->wcid = wcid->idx;
else
txwi->wcid = 0xff;
txwi->pktid = 1;
if (wcid && wcid->sw_iv && key) {
u64 pn = atomic64_inc_return(&key->tx_pn);
ccmp_pn[0] = pn;
ccmp_pn[1] = pn >> 8;
ccmp_pn[2] = 0;
ccmp_pn[3] = 0x20 | (key->keyidx << 6);
ccmp_pn[4] = pn >> 16;
ccmp_pn[5] = pn >> 24;
ccmp_pn[6] = pn >> 32;
ccmp_pn[7] = pn >> 40;
txwi->iv = *((__le32 *)&ccmp_pn[0]);
txwi->eiv = *((__le32 *)&ccmp_pn[1]);
}
spin_lock_bh(&dev->mt76.lock);
if (wcid && (rate->idx < 0 || !rate->count)) {
txwi->rate = wcid->tx_rate;
max_txpwr_adj = wcid->max_txpwr_adj;
nss = wcid->tx_rate_nss;
} else {
txwi->rate = mt76x02_mac_tx_rate_val(&dev->mt76, rate, &nss);
max_txpwr_adj = mt76x2_tx_get_max_txpwr_adj(&dev->mt76, rate);
}
spin_unlock_bh(&dev->mt76.lock);
txpwr_adj = mt76x2_tx_get_txpwr_adj(dev, dev->mt76.txpower_conf,
max_txpwr_adj);
txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
if (mt76xx_rev(dev) >= MT76XX_REV_E4)
txwi->txstream = 0x13;
else if (mt76xx_rev(dev) >= MT76XX_REV_E3 &&
!(txwi->rate & cpu_to_le16(rate_ht_mask)))
txwi->txstream = 0x93;
mt76x02_mac_fill_txwi(txwi, skb, sta, len, nss);
}
EXPORT_SYMBOL_GPL(mt76x2_mac_write_txwi);
int mt76x2_mac_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain)
{
struct mt76x2_rx_freq_cal *cal = &dev->cal.rx;
rssi += cal->rssi_offset[chain];
rssi -= cal->lna_gain;
return rssi;
}
static struct mt76x02_sta *
mt76x2_rx_get_sta(struct mt76x2_dev *dev, u8 idx)
{
struct mt76_wcid *wcid;
if (idx >= ARRAY_SIZE(dev->mt76.wcid))
return NULL;
wcid = rcu_dereference(dev->mt76.wcid[idx]);
if (!wcid)
return NULL;
return container_of(wcid, struct mt76x02_sta, wcid);
}
static struct mt76_wcid *
mt76x2_rx_get_sta_wcid(struct mt76x2_dev *dev, struct mt76x02_sta *sta,
bool unicast)
{
if (!sta)
return NULL;
if (unicast)
return &sta->wcid;
else
return &sta->vif->group_wcid;
}
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
void *rxi)
{
struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
struct mt76x02_rxwi *rxwi = rxi;
struct mt76x02_sta *sta;
u32 rxinfo = le32_to_cpu(rxwi->rxinfo);
u32 ctl = le32_to_cpu(rxwi->ctl);
u16 rate = le16_to_cpu(rxwi->rate);
u16 tid_sn = le16_to_cpu(rxwi->tid_sn);
bool unicast = rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST);
int pad_len = 0;
u8 pn_len;
u8 wcid;
int len;
if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
return -EINVAL;
if (rxinfo & MT_RXINFO_L2PAD)
pad_len += 2;
if (rxinfo & MT_RXINFO_DECRYPT) {
status->flag |= RX_FLAG_DECRYPTED;
status->flag |= RX_FLAG_MMIC_STRIPPED;
status->flag |= RX_FLAG_MIC_STRIPPED;
status->flag |= RX_FLAG_IV_STRIPPED;
}
wcid = FIELD_GET(MT_RXWI_CTL_WCID, ctl);
sta = mt76x2_rx_get_sta(dev, wcid);
status->wcid = mt76x2_rx_get_sta_wcid(dev, sta, unicast);
len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
pn_len = FIELD_GET(MT_RXINFO_PN_LEN, rxinfo);
if (pn_len) {
int offset = ieee80211_get_hdrlen_from_skb(skb) + pad_len;
u8 *data = skb->data + offset;
status->iv[0] = data[7];
status->iv[1] = data[6];
status->iv[2] = data[5];
status->iv[3] = data[4];
status->iv[4] = data[1];
status->iv[5] = data[0];
/*
* Driver CCMP validation can't deal with fragments.
* Let mac80211 take care of it.
*/
if (rxinfo & MT_RXINFO_FRAG) {
status->flag &= ~RX_FLAG_IV_STRIPPED;
} else {
pad_len += pn_len << 2;
len -= pn_len << 2;
}
}
mt76x02_remove_hdr_pad(skb, pad_len);
if ((rxinfo & MT_RXINFO_BA) && !(rxinfo & MT_RXINFO_NULL))
status->aggr = true;
if (WARN_ON_ONCE(len > skb->len))
return -EINVAL;
pskb_trim(skb, len);
status->chains = BIT(0) | BIT(1);
status->chain_signal[0] = mt76x2_mac_get_rssi(dev, rxwi->rssi[0], 0);
status->chain_signal[1] = mt76x2_mac_get_rssi(dev, rxwi->rssi[1], 1);
status->signal = max(status->chain_signal[0], status->chain_signal[1]);
status->freq = dev->mt76.chandef.chan->center_freq;
status->band = dev->mt76.chandef.chan->band;
status->tid = FIELD_GET(MT_RXWI_TID, tid_sn);
status->seqno = FIELD_GET(MT_RXWI_SN, tid_sn);
if (sta) {
ewma_signal_add(&sta->rssi, status->signal);
sta->inactive_count = 0;
}
return mt76x02_mac_process_rate(status, rate);
}
EXPORT_SYMBOL_GPL(mt76x2_mac_process_rx);

118
drivers/net/wireless/mediatek/mt76/mt76x2_tx_common.c
View File

@ -1,118 +0,0 @@
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "mt76x2.h"
#include "dma.h"
void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
struct sk_buff *skb)
{
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct mt76x2_dev *dev = hw->priv;
struct ieee80211_vif *vif = info->control.vif;
struct mt76_wcid *wcid = &dev->mt76.global_wcid;
if (control->sta) {
struct mt76x02_sta *msta;
msta = (struct mt76x02_sta *)control->sta->drv_priv;
wcid = &msta->wcid;
/* sw encrypted frames */
if (!info->control.hw_key && wcid->hw_key_idx != 0xff)
control->sta = NULL;
}
if (vif && !control->sta) {
struct mt76x02_vif *mvif;
mvif = (struct mt76x02_vif *)vif->drv_priv;
wcid = &mvif->group_wcid;
}
mt76_tx(&dev->mt76, control->sta, wcid, skb);
}
EXPORT_SYMBOL_GPL(mt76x2_tx);
s8 mt76x2_tx_get_max_txpwr_adj(struct mt76_dev *mdev,
const struct ieee80211_tx_rate *rate)
{
struct mt76x2_dev *dev = (struct mt76x2_dev *) mdev;
s8 max_txpwr;
if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
u8 mcs = ieee80211_rate_get_vht_mcs(rate);
if (mcs == 8 || mcs == 9) {
max_txpwr = mdev->rate_power.vht[8];
} else {
u8 nss, idx;
nss = ieee80211_rate_get_vht_nss(rate);
idx = ((nss - 1) << 3) + mcs;
max_txpwr = mdev->rate_power.ht[idx & 0xf];
}
} else if (rate->flags & IEEE80211_TX_RC_MCS) {
max_txpwr = mdev->rate_power.ht[rate->idx & 0xf];
} else {
enum nl80211_band band = dev->mt76.chandef.chan->band;
if (band == NL80211_BAND_2GHZ) {
const struct ieee80211_rate *r;
struct wiphy *wiphy = mt76_hw(dev)->wiphy;
struct mt76_rate_power *rp = &mdev->rate_power;
r = &wiphy->bands[band]->bitrates[rate->idx];
if (r->flags & IEEE80211_RATE_SHORT_PREAMBLE)
max_txpwr = rp->cck[r->hw_value & 0x3];
else
max_txpwr = rp->ofdm[r->hw_value & 0x7];
} else {
max_txpwr = mdev->rate_power.ofdm[rate->idx & 0x7];
}
}
return max_txpwr;
}
EXPORT_SYMBOL_GPL(mt76x2_tx_get_max_txpwr_adj);
s8 mt76x2_tx_get_txpwr_adj(struct mt76x2_dev *dev, s8 txpwr, s8 max_txpwr_adj)
{
txpwr = min_t(s8, txpwr, dev->mt76.txpower_conf);
txpwr -= (dev->target_power + dev->target_power_delta[0]);
txpwr = min_t(s8, txpwr, max_txpwr_adj);
if (!dev->enable_tpc)
return 0;
else if (txpwr >= 0)
return min_t(s8, txpwr, 7);
else
return (txpwr < -16) ? 8 : (txpwr + 32) / 2;
}
EXPORT_SYMBOL_GPL(mt76x2_tx_get_txpwr_adj);
void mt76x2_tx_set_txpwr_auto(struct mt76x2_dev *dev, s8 txpwr)
{
s8 txpwr_adj;
txpwr_adj = mt76x2_tx_get_txpwr_adj(dev, txpwr,
dev->mt76.rate_power.ofdm[4]);
mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
MT_PROT_AUTO_TX_CFG_PROT_PADJ, txpwr_adj);
mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
MT_PROT_AUTO_TX_CFG_AUTO_PADJ, txpwr_adj);
}
EXPORT_SYMBOL_GPL(mt76x2_tx_set_txpwr_auto);

53
drivers/net/wireless/mediatek/mt76/mt76x2u_core.c
View File

@ -1,53 +0,0 @@
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "mt76x2u.h"
#include "dma.h"
#include "mt76x02_util.h"
#include "mt76x02_usb.h"
static int
mt76x2u_check_skb_rooms(struct sk_buff *skb)
{
int hdr_len = ieee80211_get_hdrlen_from_skb(skb);
u32 need_head;
need_head = sizeof(struct mt76x02_txwi) + MT_DMA_HDR_LEN;
if (hdr_len % 4)
need_head += 2;
return skb_cow(skb, need_head);
}
int mt76x2u_tx_prepare_skb(struct mt76_dev *mdev, void *data,
struct sk_buff *skb, struct mt76_queue *q,
struct mt76_wcid *wcid, struct ieee80211_sta *sta,
u32 *tx_info)
{
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
struct mt76x02_txwi *txwi;
int err, len = skb->len;
err = mt76x2u_check_skb_rooms(skb);
if (err < 0)
return -ENOMEM;
mt76x02_insert_hdr_pad(skb);
txwi = skb_push(skb, sizeof(struct mt76x02_txwi));
mt76x2_mac_write_txwi(dev, txwi, skb, wcid, sta, len);
return mt76x02u_set_txinfo(skb, wcid, q2ep(q->hw_idx));
}

2
drivers/net/wireless/mediatek/mt76/usb.c
View File

@ -286,7 +286,7 @@ mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76u_buf *buf,
void *data;
int offset;
data = page_frag_alloc(&q->rx_page, q->buf_size, GFP_ATOMIC);
data = page_frag_alloc(&q->rx_page, len, GFP_ATOMIC);
if (!data)
break;