leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arm64: dts: zynqmp: Wire up the DisplayPort subsystem

Browse Source 
Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to
the DisplayPort connector.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
This commit is contained in:
Laurent Pinchart 2021-01-21 13:36:07 +01:00 committed by Michal Simek
parent b0f89cf5b6
commit 55563399bb
6 changed files with 85 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
View File

@ -15,6 +15,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU100 RevC";
@ -108,6 +109,18 @@
compatible = "iio-hwmon";
io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
};
si5335a_0: clk26 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
si5335a_1: clk27 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
&dcc {
@ -224,6 +237,13 @@
};
};
&psgtr {
status = "okay";
/* usb3, dps */
clocks = <&si5335a_0>, <&si5335a_1>;
clock-names = "ref0", "ref1";
};
&rtc {
status = "okay";
};
@ -295,3 +315,14 @@
&watchdog0 {
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
<&psgtr 0 PHY_TYPE_DP 1 1>;
};

10
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
View File

@ -714,3 +714,13 @@
&watchdog0 {
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0";
phys = <&psgtr 1 PHY_TYPE_DP 0 3>;
};

11
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
View File

@ -224,3 +224,14 @@
&watchdog0 {
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
<&psgtr 0 PHY_TYPE_DP 1 3>;
};

11
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
View File

@ -280,3 +280,14 @@
&watchdog0 {
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
<&psgtr 0 PHY_TYPE_DP 1 3>;
};

11
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
View File

@ -156,6 +156,17 @@
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
<&psgtr 0 PHY_TYPE_DP 1 3>;
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";

11
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
View File

@ -584,3 +584,14 @@
status = "okay";
dr_mode = "host";
};
&zynqmp_dpdma {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
<&psgtr 0 PHY_TYPE_DP 1 1>;
};