forked from Minki/linux
regulator: ab8500: add support for ab8505
To obtain full AB8505 regulator support, the AB8500 regulator driver first needs to know its register layout and their initialisation values for each. That information is provided via a couple of large data structures which we provide here. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
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547f384f33
@ -5,6 +5,7 @@
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*
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* Authors: Sundar Iyer <sundar.iyer@stericsson.com>
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* Bengt Jonsson <bengt.g.jonsson@stericsson.com>
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* Daniel Willerud <daniel.willerud@stericsson.com>
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*
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* MOP500 board specific initialization for regulators
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*/
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@ -99,6 +100,27 @@ static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
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REGULATOR_SUPPLY("vmmc", "sdi0"),
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};
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static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
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};
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static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
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};
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static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
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};
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static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
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/* AB8500 audio codec device */
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REGULATOR_SUPPLY("v-aux8", NULL),
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};
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static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
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/* Internal general-purpose ADC */
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REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
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/* ADC for charger */
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REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
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};
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static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
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/* TV-out DENC supply */
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REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
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@ -133,6 +155,11 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
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REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
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};
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static struct regulator_consumer_supply ab8505_usb_consumers[] = {
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/* HS USB OTG physical interface */
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REGULATOR_SUPPLY("v-ape", NULL),
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};
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static struct regulator_consumer_supply ab8500_vana_consumers[] = {
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/* External displays, connector on board, 1v8 power supply */
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REGULATOR_SUPPLY("vsmps2", "mcde.0"),
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@ -469,6 +496,450 @@ static struct regulator_init_data ab8500_ext_regulators[] = {
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},
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};
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/* ab8505 regulator register initialization */
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static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
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/*
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* VarmRequestCtrl
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* VsmpsCRequestCtrl
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* VsmpsARequestCtrl
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* VsmpsBRequestCtrl
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00),
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/*
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* VsafeRequestCtrl
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* VpllRequestCtrl
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* VanaRequestCtrl = HP/LP depending on VxRequest
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00),
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/*
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* Vaux1RequestCtrl = HP/LP depending on VxRequest
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* Vaux2RequestCtrl = HP/LP depending on VxRequest
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00),
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/*
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* Vaux3RequestCtrl = HP/LP depending on VxRequest
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* SwHPReq = Control through SWValid disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00),
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/*
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* VsmpsASysClkReq1HPValid
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* VsmpsBSysClkReq1HPValid
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* VsafeSysClkReq1HPValid
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* VanaSysClkReq1HPValid = disabled
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* VpllSysClkReq1HPValid
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* Vaux1SysClkReq1HPValid = disabled
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* Vaux2SysClkReq1HPValid = disabled
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* Vaux3SysClkReq1HPValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
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/*
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* VsmpsCSysClkReq1HPValid
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* VarmSysClkReq1HPValid
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* VbbSysClkReq1HPValid
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* VsmpsMSysClkReq1HPValid
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
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/*
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* VsmpsAHwHPReq1Valid
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* VsmpsBHwHPReq1Valid
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* VsafeHwHPReq1Valid
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* VanaHwHPReq1Valid = disabled
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* VpllHwHPReq1Valid
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* Vaux1HwHPreq1Valid = disabled
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* Vaux2HwHPReq1Valid = disabled
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* Vaux3HwHPReqValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00),
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/*
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* VsmpsMHwHPReq1Valid
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00),
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/*
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* VsmpsAHwHPReq2Valid
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* VsmpsBHwHPReq2Valid
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* VsafeHwHPReq2Valid
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* VanaHwHPReq2Valid = disabled
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* VpllHwHPReq2Valid
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* Vaux1HwHPReq2Valid = disabled
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* Vaux2HwHPReq2Valid = disabled
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* Vaux3HwHPReq2Valid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00),
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/*
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* VsmpsMHwHPReq2Valid
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00),
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/**
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* VsmpsCSwHPReqValid
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* VarmSwHPReqValid
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* VsmpsASwHPReqValid
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* VsmpsBSwHPReqValid
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* VsafeSwHPReqValid
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* VanaSwHPReqValid
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* VanaSwHPReqValid = disabled
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* VpllSwHPReqValid
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* Vaux1SwHPReqValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00),
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/*
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* Vaux2SwHPReqValid = disabled
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* Vaux3SwHPReqValid = disabled
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* VsmpsMSwHPReqValid
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00),
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/*
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* SysClkReq2Valid1 = SysClkReq2 controlled
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* SysClkReq3Valid1 = disabled
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* SysClkReq4Valid1 = SysClkReq4 controlled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a),
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/*
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* SysClkReq2Valid2 = disabled
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* SysClkReq3Valid2 = disabled
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* SysClkReq4Valid2 = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00),
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/*
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* Vaux4SwHPReqValid
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* Vaux4HwHPReq2Valid
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* Vaux4HwHPReq1Valid
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* Vaux4SysClkReq1HPValid
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00),
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/*
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* VadcEna = disabled
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* VintCore12Ena = disabled
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* VintCore12Sel = 1.25 V
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* VintCore12LP = inactive (HP)
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* VadcLP = inactive (HP)
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10),
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/*
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* VaudioEna = disabled
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* Vaux8Ena = disabled
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* Vamic1Ena = disabled
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* Vamic2Ena = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00),
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/*
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* Vamic1_dzout = high-Z when Vamic1 is disabled
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* Vamic2_dzout = high-Z when Vamic2 is disabled
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00),
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/*
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* VsmpsARegu
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* VsmpsASelCtrl
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* VsmpsAAutoMode
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* VsmpsAPWMMode
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00),
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/*
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* VsmpsBRegu
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* VsmpsBSelCtrl
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* VsmpsBAutoMode
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* VsmpsBPWMMode
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00),
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/*
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* VsafeRegu
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* VsafeSelCtrl
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* VsafeAutoMode
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* VsafePWMMode
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00),
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/*
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* VPll = Hw controlled (NOTE! PRCMU bits)
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* VanaRegu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02),
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/*
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* VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
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* VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
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* VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0)
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* ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
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* ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
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*/
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INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30),
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/*
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* Vaux1Regu = force HP
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* Vaux2Regu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01),
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/*
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* Vaux3Regu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00),
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/*
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* VsmpsASel1
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00),
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/*
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* VsmpsASel2
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00),
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/*
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* VsmpsASel3
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00),
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/*
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* VsmpsBSel1
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00),
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/*
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* VsmpsBSel2
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00),
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/*
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* VsmpsBSel3
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00),
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/*
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* VsafeSel1
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00),
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/*
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* VsafeSel2
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00),
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/*
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* VsafeSel3
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*/
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INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00),
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/*
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* Vaux1Sel = 2.8 V
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C),
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/*
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* Vaux2Sel = 2.9 V
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d),
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/*
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* Vaux3Sel = 2.91 V
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*/
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INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07),
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/*
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* Vaux4RequestCtrl
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00),
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/*
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* Vaux4Regu
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00),
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/*
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* Vaux4Sel
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*/
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INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00),
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/*
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* Vaux1Disch = short discharge time
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* Vaux2Disch = short discharge time
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* Vaux3Disch = short discharge time
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* Vintcore12Disch = short discharge time
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* VTVoutDisch = short discharge time
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* VaudioDisch = short discharge time
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00),
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/*
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* VanaDisch = short discharge time
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* Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled
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* Vaux8Disch = short discharge time
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00),
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/*
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* Vaux4Disch = short discharge time
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*/
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INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00),
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/*
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* Vaux5Sel
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* Vaux5LP
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* Vaux5Ena
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* Vaux5Disch
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* Vaux5DisSfst
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* Vaux5DisPulld
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*/
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INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00),
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/*
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* Vaux6Sel
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* Vaux6LP
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* Vaux6Ena
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* Vaux6DisPulld
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*/
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INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00),
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};
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struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
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/* supplies to the display/camera */
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[AB8505_LDO_AUX1] = {
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.constraints = {
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.name = "V-DISPLAY",
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.min_uV = 2800000,
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.max_uV = 3300000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS,
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.boot_on = 1, /* display is on at boot */
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
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.consumer_supplies = ab8500_vaux1_consumers,
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},
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/* supplies to the on-board eMMC */
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[AB8505_LDO_AUX2] = {
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.constraints = {
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.name = "V-eMMC1",
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.min_uV = 1100000,
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.max_uV = 3300000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS |
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REGULATOR_CHANGE_MODE,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_IDLE,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
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.consumer_supplies = ab8500_vaux2_consumers,
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},
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/* supply for VAUX3, supplies to SDcard slots */
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[AB8505_LDO_AUX3] = {
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.constraints = {
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.name = "V-MMC-SD",
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.min_uV = 1100000,
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.max_uV = 3300000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS |
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REGULATOR_CHANGE_MODE,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_IDLE,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
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.consumer_supplies = ab8500_vaux3_consumers,
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},
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/* supply for VAUX4, supplies to NFC and standalone secure element */
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[AB8505_LDO_AUX4] = {
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.constraints = {
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.name = "V-NFC-SE",
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.min_uV = 1100000,
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.max_uV = 3300000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS |
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REGULATOR_CHANGE_MODE,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_IDLE,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
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.consumer_supplies = ab8505_vaux4_consumers,
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},
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/* supply for VAUX5, supplies to TBD */
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[AB8505_LDO_AUX5] = {
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.constraints = {
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.name = "V-AUX5",
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.min_uV = 1050000,
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.max_uV = 2790000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS |
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REGULATOR_CHANGE_MODE,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_IDLE,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
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.consumer_supplies = ab8505_vaux5_consumers,
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},
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/* supply for VAUX6, supplies to TBD */
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[AB8505_LDO_AUX6] = {
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.constraints = {
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.name = "V-AUX6",
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.min_uV = 1050000,
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.max_uV = 2790000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS |
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REGULATOR_CHANGE_MODE,
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.valid_modes_mask = REGULATOR_MODE_NORMAL |
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REGULATOR_MODE_IDLE,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
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.consumer_supplies = ab8505_vaux6_consumers,
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},
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/* supply for gpadc, ADC LDO */
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[AB8505_LDO_ADC] = {
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.constraints = {
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.name = "V-ADC",
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.valid_ops_mask = REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
|
||||
.consumer_supplies = ab8505_vadc_consumers,
|
||||
},
|
||||
/* supply for ab8500-vaudio, VAUDIO LDO */
|
||||
[AB8505_LDO_AUDIO] = {
|
||||
.constraints = {
|
||||
.name = "V-AUD",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
|
||||
.consumer_supplies = ab8500_vaud_consumers,
|
||||
},
|
||||
/* supply for v-anamic1 VAMic1-LDO */
|
||||
[AB8505_LDO_ANAMIC1] = {
|
||||
.constraints = {
|
||||
.name = "V-AMIC1",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
|
||||
.consumer_supplies = ab8500_vamic1_consumers,
|
||||
},
|
||||
/* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
|
||||
[AB8505_LDO_ANAMIC2] = {
|
||||
.constraints = {
|
||||
.name = "V-AMIC2",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
|
||||
.consumer_supplies = ab8500_vamic2_consumers,
|
||||
},
|
||||
/* supply for v-aux8, VAUX8 LDO */
|
||||
[AB8505_LDO_AUX8] = {
|
||||
.constraints = {
|
||||
.name = "V-AUX8",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
|
||||
.consumer_supplies = ab8505_vaux8_consumers,
|
||||
},
|
||||
/* supply for v-intcore12, VINTCORE12 LDO */
|
||||
[AB8505_LDO_INTCORE] = {
|
||||
.constraints = {
|
||||
.name = "V-INTCORE",
|
||||
.min_uV = 1250000,
|
||||
.max_uV = 1350000,
|
||||
.input_uV = 1800000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
||||
REGULATOR_CHANGE_STATUS |
|
||||
REGULATOR_CHANGE_MODE |
|
||||
REGULATOR_CHANGE_DRMS,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL |
|
||||
REGULATOR_MODE_IDLE,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
|
||||
.consumer_supplies = ab8500_vintcore_consumers,
|
||||
},
|
||||
/* supply for LDO USB */
|
||||
[AB8505_LDO_USB] = {
|
||||
.constraints = {
|
||||
.name = "V-USB",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS |
|
||||
REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL |
|
||||
REGULATOR_MODE_IDLE,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
|
||||
.consumer_supplies = ab8505_usb_consumers,
|
||||
},
|
||||
/* supply for U8500 CSI-DSI, VANA LDO */
|
||||
[AB8505_LDO_ANA] = {
|
||||
.constraints = {
|
||||
.name = "V-CSI-DSI",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
|
||||
.consumer_supplies = ab8500_vana_consumers,
|
||||
},
|
||||
};
|
||||
|
||||
struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
|
||||
.reg_init = ab8500_reg_init,
|
||||
.num_reg_init = ARRAY_SIZE(ab8500_reg_init),
|
||||
@ -478,18 +949,39 @@ struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
|
||||
.num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
|
||||
};
|
||||
|
||||
/* Use the AB8500 init settings for AB8505 as they are the same right now */
|
||||
struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
|
||||
.reg_init = ab8505_reg_init,
|
||||
.num_reg_init = ARRAY_SIZE(ab8505_reg_init),
|
||||
.regulator = ab8505_regulators,
|
||||
.num_regulator = ARRAY_SIZE(ab8505_regulators),
|
||||
};
|
||||
|
||||
static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
|
||||
if (ab8500_reg_init[i].id == id) {
|
||||
u8 initval = ab8500_reg_init[i].value;
|
||||
initval = (initval & ~mask) | (value & mask);
|
||||
ab8500_reg_init[i].value = initval;
|
||||
if (cpu_is_u8520()) {
|
||||
for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
|
||||
if (ab8505_reg_init[i].id == id) {
|
||||
u8 initval = ab8505_reg_init[i].value;
|
||||
initval = (initval & ~mask) | (value & mask);
|
||||
ab8505_reg_init[i].value = initval;
|
||||
|
||||
BUG_ON(mask & ~ab8500_reg_init[i].mask);
|
||||
return;
|
||||
BUG_ON(mask & ~ab8505_reg_init[i].mask);
|
||||
return;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
|
||||
if (ab8500_reg_init[i].id == id) {
|
||||
u8 initval = ab8500_reg_init[i].value;
|
||||
initval = (initval & ~mask) | (value & mask);
|
||||
ab8500_reg_init[i].value = initval;
|
||||
|
||||
BUG_ON(mask & ~ab8500_reg_init[i].mask);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -511,6 +1003,11 @@ void mop500_regulator_init(void)
|
||||
regulator->constraints.state_standby.disabled = 1;
|
||||
}
|
||||
|
||||
if (cpu_is_u8520()) {
|
||||
/* Vaux2 initialized to be on */
|
||||
ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
|
||||
}
|
||||
|
||||
/*
|
||||
* Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
|
||||
* all HREFP_V20 boards)
|
||||
|
@ -15,6 +15,7 @@
|
||||
#include <linux/regulator/ab8500.h>
|
||||
|
||||
extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
|
||||
extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
|
||||
extern struct regulator_init_data tps61052_regulator;
|
||||
extern struct regulator_init_data gpio_en_3v3_regulator;
|
||||
|
||||
|
@ -5,11 +5,15 @@
|
||||
*
|
||||
* Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
|
||||
* Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
|
||||
* Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
|
||||
*
|
||||
* AB8500 peripheral regulators
|
||||
*
|
||||
* AB8500 supports the following regulators:
|
||||
* VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
|
||||
*
|
||||
* AB8505 supports the following regulators:
|
||||
* VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
@ -92,6 +96,17 @@ static const unsigned int ldo_vaux3_voltages[] = {
|
||||
2910000,
|
||||
};
|
||||
|
||||
static const int ldo_vaux56_voltages[] = {
|
||||
1800000,
|
||||
1050000,
|
||||
1100000,
|
||||
1200000,
|
||||
1500000,
|
||||
2200000,
|
||||
2500000,
|
||||
2790000,
|
||||
};
|
||||
|
||||
static const unsigned int ldo_vintcore_voltages[] = {
|
||||
1200000,
|
||||
1225000,
|
||||
@ -589,6 +604,313 @@ static struct ab8500_regulator_info
|
||||
},
|
||||
};
|
||||
|
||||
/* AB8505 regulator information */
|
||||
static struct ab8500_regulator_info
|
||||
ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
|
||||
/*
|
||||
* Variable Voltage Regulators
|
||||
* name, min mV, max mV,
|
||||
* update bank, reg, mask, enable val
|
||||
* volt bank, reg, mask, table, table length
|
||||
*/
|
||||
[AB8505_LDO_AUX1] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX1",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_AUX1,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
.min_uV = 1100000,
|
||||
.max_uV = 3300000,
|
||||
.load_lp_uA = 5000,
|
||||
.update_bank = 0x04,
|
||||
.update_reg = 0x09,
|
||||
.update_mask = 0x03,
|
||||
.update_val = 0x01,
|
||||
.update_val_idle = 0x03,
|
||||
.update_val_normal = 0x01,
|
||||
.voltage_bank = 0x04,
|
||||
.voltage_reg = 0x1f,
|
||||
.voltage_mask = 0x0f,
|
||||
.voltages = ldo_vauxn_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
[AB8505_LDO_AUX2] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX2",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_AUX2,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
.min_uV = 1100000,
|
||||
.max_uV = 3300000,
|
||||
.load_lp_uA = 5000,
|
||||
.update_bank = 0x04,
|
||||
.update_reg = 0x09,
|
||||
.update_mask = 0x0c,
|
||||
.update_val = 0x04,
|
||||
.update_val_idle = 0x0c,
|
||||
.update_val_normal = 0x04,
|
||||
.voltage_bank = 0x04,
|
||||
.voltage_reg = 0x20,
|
||||
.voltage_mask = 0x0f,
|
||||
.voltages = ldo_vauxn_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
[AB8505_LDO_AUX3] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX3",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_AUX3,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
|
||||
},
|
||||
.min_uV = 1100000,
|
||||
.max_uV = 3300000,
|
||||
.load_lp_uA = 5000,
|
||||
.update_bank = 0x04,
|
||||
.update_reg = 0x0a,
|
||||
.update_mask = 0x03,
|
||||
.update_val = 0x01,
|
||||
.update_val_idle = 0x03,
|
||||
.update_val_normal = 0x01,
|
||||
.voltage_bank = 0x04,
|
||||
.voltage_reg = 0x21,
|
||||
.voltage_mask = 0x07,
|
||||
.voltages = ldo_vaux3_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
|
||||
},
|
||||
[AB8505_LDO_AUX4] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX4",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB9540_LDO_AUX4,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
.min_uV = 1100000,
|
||||
.max_uV = 3300000,
|
||||
.load_lp_uA = 5000,
|
||||
/* values for Vaux4Regu register */
|
||||
.update_bank = 0x04,
|
||||
.update_reg = 0x2e,
|
||||
.update_mask = 0x03,
|
||||
.update_val = 0x01,
|
||||
.update_val_idle = 0x03,
|
||||
.update_val_normal = 0x01,
|
||||
/* values for Vaux4SEL register */
|
||||
.voltage_bank = 0x04,
|
||||
.voltage_reg = 0x2f,
|
||||
.voltage_mask = 0x0f,
|
||||
.voltages = ldo_vauxn_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
|
||||
},
|
||||
[AB8505_LDO_AUX5] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX5",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8505_LDO_AUX5,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
|
||||
},
|
||||
.min_uV = 1050000,
|
||||
.max_uV = 2790000,
|
||||
.load_lp_uA = 2000,
|
||||
/* values for CtrlVaux5 register */
|
||||
.update_bank = 0x01,
|
||||
.update_reg = 0x55,
|
||||
.update_mask = 0x08,
|
||||
.update_val = 0x00,
|
||||
.update_val_idle = 0x01,
|
||||
.update_val_normal = 0x00,
|
||||
.voltage_bank = 0x01,
|
||||
.voltage_reg = 0x55,
|
||||
.voltage_mask = 0x07,
|
||||
.voltages = ldo_vaux56_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
|
||||
},
|
||||
[AB8505_LDO_AUX6] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX6",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8505_LDO_AUX6,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
|
||||
},
|
||||
.min_uV = 1050000,
|
||||
.max_uV = 2790000,
|
||||
.load_lp_uA = 2000,
|
||||
/* values for CtrlVaux6 register */
|
||||
.update_bank = 0x01,
|
||||
.update_reg = 0x56,
|
||||
.update_mask = 0x08,
|
||||
.update_val = 0x00,
|
||||
.update_val_idle = 0x01,
|
||||
.update_val_normal = 0x00,
|
||||
.voltage_bank = 0x01,
|
||||
.voltage_reg = 0x56,
|
||||
.voltage_mask = 0x07,
|
||||
.voltages = ldo_vaux56_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
|
||||
},
|
||||
[AB8505_LDO_INTCORE] = {
|
||||
.desc = {
|
||||
.name = "LDO-INTCORE",
|
||||
.ops = &ab8500_regulator_volt_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_INTCORE,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
|
||||
},
|
||||
.min_uV = 1100000,
|
||||
.max_uV = 3300000,
|
||||
.load_lp_uA = 5000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x80,
|
||||
.update_mask = 0x44,
|
||||
.update_val = 0x04,
|
||||
.update_val_idle = 0x44,
|
||||
.update_val_normal = 0x04,
|
||||
.voltage_bank = 0x03,
|
||||
.voltage_reg = 0x80,
|
||||
.voltage_mask = 0x38,
|
||||
.voltages = ldo_vintcore_voltages,
|
||||
.voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
|
||||
.voltage_shift = 3,
|
||||
},
|
||||
|
||||
/*
|
||||
* Fixed Voltage Regulators
|
||||
* name, fixed mV,
|
||||
* update bank, reg, mask, enable val
|
||||
*/
|
||||
[AB8505_LDO_ADC] = {
|
||||
.desc = {
|
||||
.name = "LDO-ADC",
|
||||
.ops = &ab8500_regulator_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8505_LDO_ADC,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.delay = 10000,
|
||||
.fixed_uV = 2000000,
|
||||
.load_lp_uA = 1000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x80,
|
||||
.update_mask = 0x82,
|
||||
.update_val = 0x02,
|
||||
.update_val_idle = 0x82,
|
||||
.update_val_normal = 0x02,
|
||||
},
|
||||
[AB8505_LDO_USB] = {
|
||||
.desc = {
|
||||
.name = "LDO-USB",
|
||||
.ops = &ab8500_regulator_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB9540_LDO_USB,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 3300000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x82,
|
||||
.update_mask = 0x03,
|
||||
.update_val = 0x01,
|
||||
.update_val_idle = 0x03,
|
||||
.update_val_normal = 0x01,
|
||||
},
|
||||
[AB8505_LDO_AUDIO] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUDIO",
|
||||
.ops = &ab8500_regulator_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_AUDIO,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 2000000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x83,
|
||||
.update_mask = 0x02,
|
||||
.update_val = 0x02,
|
||||
},
|
||||
[AB8505_LDO_ANAMIC1] = {
|
||||
.desc = {
|
||||
.name = "LDO-ANAMIC1",
|
||||
.ops = &ab8500_regulator_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_ANAMIC1,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 2050000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x83,
|
||||
.update_mask = 0x08,
|
||||
.update_val = 0x08,
|
||||
},
|
||||
[AB8505_LDO_ANAMIC2] = {
|
||||
.desc = {
|
||||
.name = "LDO-ANAMIC2",
|
||||
.ops = &ab8500_regulator_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_ANAMIC2,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 2050000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x83,
|
||||
.update_mask = 0x10,
|
||||
.update_val = 0x10,
|
||||
},
|
||||
[AB8505_LDO_AUX8] = {
|
||||
.desc = {
|
||||
.name = "LDO-AUX8",
|
||||
.ops = &ab8500_regulator_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8505_LDO_AUX8,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 1800000,
|
||||
.update_bank = 0x03,
|
||||
.update_reg = 0x83,
|
||||
.update_mask = 0x04,
|
||||
.update_val = 0x04,
|
||||
},
|
||||
/*
|
||||
* Regulators with fixed voltage and normal/idle modes
|
||||
*/
|
||||
[AB8505_LDO_ANA] = {
|
||||
.desc = {
|
||||
.name = "LDO-ANA",
|
||||
.ops = &ab8500_regulator_mode_ops,
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.id = AB8500_LDO_ANA,
|
||||
.owner = THIS_MODULE,
|
||||
.n_voltages = 1,
|
||||
},
|
||||
.fixed_uV = 1200000,
|
||||
.load_lp_uA = 1000,
|
||||
.update_bank = 0x04,
|
||||
.update_reg = 0x06,
|
||||
.update_mask = 0x0c,
|
||||
.update_val = 0x04,
|
||||
.update_val_idle = 0x0c,
|
||||
.update_val_normal = 0x04,
|
||||
},
|
||||
};
|
||||
|
||||
/* AB9540 regulator information */
|
||||
static struct ab8500_regulator_info
|
||||
ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
|
||||
@ -1031,6 +1353,276 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
|
||||
REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
|
||||
};
|
||||
|
||||
/* AB8505 register init */
|
||||
static struct ab8500_reg_init ab8505_reg_init[] = {
|
||||
/*
|
||||
* 0x03, VarmRequestCtrl
|
||||
* 0x0c, VsmpsCRequestCtrl
|
||||
* 0x30, VsmpsARequestCtrl
|
||||
* 0xc0, VsmpsBRequestCtrl
|
||||
*/
|
||||
REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
|
||||
/*
|
||||
* 0x03, VsafeRequestCtrl
|
||||
* 0x0c, VpllRequestCtrl
|
||||
* 0x30, VanaRequestCtrl
|
||||
*/
|
||||
REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f),
|
||||
/*
|
||||
* 0x30, Vaux1RequestCtrl
|
||||
* 0xc0, Vaux2RequestCtrl
|
||||
*/
|
||||
REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0),
|
||||
/*
|
||||
* 0x03, Vaux3RequestCtrl
|
||||
* 0x04, SwHPReq
|
||||
*/
|
||||
REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
|
||||
/*
|
||||
* 0x01, VsmpsASysClkReq1HPValid
|
||||
* 0x02, VsmpsBSysClkReq1HPValid
|
||||
* 0x04, VsafeSysClkReq1HPValid
|
||||
* 0x08, VanaSysClkReq1HPValid
|
||||
* 0x10, VpllSysClkReq1HPValid
|
||||
* 0x20, Vaux1SysClkReq1HPValid
|
||||
* 0x40, Vaux2SysClkReq1HPValid
|
||||
* 0x80, Vaux3SysClkReq1HPValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
|
||||
/*
|
||||
* 0x01, VsmpsCSysClkReq1HPValid
|
||||
* 0x02, VarmSysClkReq1HPValid
|
||||
* 0x04, VbbSysClkReq1HPValid
|
||||
* 0x08, VsmpsMSysClkReq1HPValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
|
||||
/*
|
||||
* 0x01, VsmpsAHwHPReq1Valid
|
||||
* 0x02, VsmpsBHwHPReq1Valid
|
||||
* 0x04, VsafeHwHPReq1Valid
|
||||
* 0x08, VanaHwHPReq1Valid
|
||||
* 0x10, VpllHwHPReq1Valid
|
||||
* 0x20, Vaux1HwHPReq1Valid
|
||||
* 0x40, Vaux2HwHPReq1Valid
|
||||
* 0x80, Vaux3HwHPReq1Valid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
|
||||
/*
|
||||
* 0x08, VsmpsMHwHPReq1Valid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
|
||||
/*
|
||||
* 0x01, VsmpsAHwHPReq2Valid
|
||||
* 0x02, VsmpsBHwHPReq2Valid
|
||||
* 0x04, VsafeHwHPReq2Valid
|
||||
* 0x08, VanaHwHPReq2Valid
|
||||
* 0x10, VpllHwHPReq2Valid
|
||||
* 0x20, Vaux1HwHPReq2Valid
|
||||
* 0x40, Vaux2HwHPReq2Valid
|
||||
* 0x80, Vaux3HwHPReq2Valid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
|
||||
/*
|
||||
* 0x08, VsmpsMHwHPReq2Valid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
|
||||
/*
|
||||
* 0x01, VsmpsCSwHPReqValid
|
||||
* 0x02, VarmSwHPReqValid
|
||||
* 0x04, VsmpsASwHPReqValid
|
||||
* 0x08, VsmpsBSwHPReqValid
|
||||
* 0x10, VsafeSwHPReqValid
|
||||
* 0x20, VanaSwHPReqValid
|
||||
* 0x40, VpllSwHPReqValid
|
||||
* 0x80, Vaux1SwHPReqValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
|
||||
/*
|
||||
* 0x01, Vaux2SwHPReqValid
|
||||
* 0x02, Vaux3SwHPReqValid
|
||||
* 0x20, VsmpsMSwHPReqValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23),
|
||||
/*
|
||||
* 0x02, SysClkReq2Valid1
|
||||
* 0x04, SysClkReq3Valid1
|
||||
* 0x08, SysClkReq4Valid1
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e),
|
||||
/*
|
||||
* 0x02, SysClkReq2Valid2
|
||||
* 0x04, SysClkReq3Valid2
|
||||
* 0x08, SysClkReq4Valid2
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e),
|
||||
/*
|
||||
* 0x01, Vaux4SwHPReqValid
|
||||
* 0x02, Vaux4HwHPReq2Valid
|
||||
* 0x04, Vaux4HwHPReq1Valid
|
||||
* 0x08, Vaux4SysClkReq1HPValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
|
||||
/*
|
||||
* 0x02, VadcEna
|
||||
* 0x04, VintCore12Ena
|
||||
* 0x38, VintCore12Sel
|
||||
* 0x40, VintCore12LP
|
||||
* 0x80, VadcLP
|
||||
*/
|
||||
REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe),
|
||||
/*
|
||||
* 0x02, VaudioEna
|
||||
* 0x04, VdmicEna
|
||||
* 0x08, Vamic1Ena
|
||||
* 0x10, Vamic2Ena
|
||||
*/
|
||||
REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
|
||||
/*
|
||||
* 0x01, Vamic1_dzout
|
||||
* 0x02, Vamic2_dzout
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
|
||||
/*
|
||||
* 0x03, VsmpsARegu
|
||||
* 0x0c, VsmpsASelCtrl
|
||||
* 0x10, VsmpsAAutoMode
|
||||
* 0x20, VsmpsAPWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f),
|
||||
/*
|
||||
* 0x03, VsmpsBRegu
|
||||
* 0x0c, VsmpsBSelCtrl
|
||||
* 0x10, VsmpsBAutoMode
|
||||
* 0x20, VsmpsBPWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f),
|
||||
/*
|
||||
* 0x03, VsafeRegu
|
||||
* 0x0c, VsafeSelCtrl
|
||||
* 0x10, VsafeAutoMode
|
||||
* 0x20, VsafePWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f),
|
||||
/*
|
||||
* 0x03, VpllRegu (NOTE! PRCMU register bits)
|
||||
* 0x0c, VanaRegu
|
||||
*/
|
||||
REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f),
|
||||
/*
|
||||
* 0x03, VextSupply1Regu
|
||||
* 0x0c, VextSupply2Regu
|
||||
* 0x30, VextSupply3Regu
|
||||
* 0x40, ExtSupply2Bypass
|
||||
* 0x80, ExtSupply3Bypass
|
||||
*/
|
||||
REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
|
||||
/*
|
||||
* 0x03, Vaux1Regu
|
||||
* 0x0c, Vaux2Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f),
|
||||
/*
|
||||
* 0x0f, Vaux3Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f),
|
||||
/*
|
||||
* 0x7f, VsafeSel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f),
|
||||
/*
|
||||
* 0x3f, VsafeSel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f),
|
||||
/*
|
||||
* 0x3f, VsafeSel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f),
|
||||
/*
|
||||
* 0x0f, Vaux1Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f),
|
||||
/*
|
||||
* 0x0f, Vaux2Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f),
|
||||
/*
|
||||
* 0x07, Vaux3Sel
|
||||
* 0x30, VRF1Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
|
||||
/*
|
||||
* 0x03, Vaux4RequestCtrl
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
|
||||
/*
|
||||
* 0x03, Vaux4Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03),
|
||||
/*
|
||||
* 0x0f, Vaux4Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f),
|
||||
/*
|
||||
* 0x04, Vaux1Disch
|
||||
* 0x08, Vaux2Disch
|
||||
* 0x10, Vaux3Disch
|
||||
* 0x20, Vintcore12Disch
|
||||
* 0x40, VTVoutDisch
|
||||
* 0x80, VaudioDisch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
|
||||
/*
|
||||
* 0x02, VanaDisch
|
||||
* 0x04, VdmicPullDownEna
|
||||
* 0x10, VdmicDisch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
|
||||
/*
|
||||
* 0x01, Vaux4Disch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
|
||||
/*
|
||||
* 0x07, Vaux5Sel
|
||||
* 0x08, Vaux5LP
|
||||
* 0x10, Vaux5Ena
|
||||
* 0x20, Vaux5Disch
|
||||
* 0x40, Vaux5DisSfst
|
||||
* 0x80, Vaux5DisPulld
|
||||
*/
|
||||
REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff),
|
||||
/*
|
||||
* 0x07, Vaux6Sel
|
||||
* 0x08, Vaux6LP
|
||||
* 0x10, Vaux6Ena
|
||||
* 0x80, Vaux6DisPulld
|
||||
*/
|
||||
REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f),
|
||||
};
|
||||
|
||||
/* AB9540 register init */
|
||||
static struct ab8500_reg_init ab9540_reg_init[] = {
|
||||
/*
|
||||
@ -1396,6 +1988,22 @@ static struct of_regulator_match ab8500_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
|
||||
};
|
||||
|
||||
static struct of_regulator_match ab8505_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, },
|
||||
{ .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, },
|
||||
{ .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, },
|
||||
{ .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, },
|
||||
{ .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, },
|
||||
{ .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, },
|
||||
{ .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
|
||||
{ .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
|
||||
{ .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, },
|
||||
{ .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
|
||||
{ .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
|
||||
{ .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, },
|
||||
{ .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, },
|
||||
};
|
||||
|
||||
static struct of_regulator_match ab9540_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
|
||||
{ .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
|
||||
@ -1450,6 +2058,11 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
|
||||
reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
|
||||
match = ab9540_regulator_match;
|
||||
match_size = ARRAY_SIZE(ab9540_regulator_match)
|
||||
} else if (is_ab8505(ab8500)) {
|
||||
regulator_info = ab8505_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
|
||||
reg_init = ab8505_reg_init;
|
||||
reg_init_size = AB8505_NUM_REGULATOR_REGISTERS;
|
||||
} else {
|
||||
regulator_info = ab8500_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
|
||||
@ -1543,6 +2156,9 @@ static int ab8500_regulator_remove(struct platform_device *pdev)
|
||||
if (is_ab9540(ab8500)) {
|
||||
regulator_info = ab9540_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
|
||||
} else if (is_ab8505(ab8500)) {
|
||||
regulator_info = ab8505_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
|
||||
} else {
|
||||
regulator_info = ab8500_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
|
||||
@ -1601,5 +2217,6 @@ module_exit(ab8500_regulator_exit);
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
|
||||
MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
|
||||
MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
|
||||
MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
|
||||
MODULE_ALIAS("platform:ab8500-regulator");
|
||||
|
@ -5,6 +5,7 @@
|
||||
*
|
||||
* Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
|
||||
* Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
|
||||
* Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_AB8500_REGULATOR_H
|
||||
@ -27,7 +28,28 @@ enum ab8500_regulator_id {
|
||||
AB8500_NUM_REGULATORS,
|
||||
};
|
||||
|
||||
/* AB9450 regulators */
|
||||
/* AB8505 regulators */
|
||||
enum ab8505_regulator_id {
|
||||
AB8505_LDO_AUX1,
|
||||
AB8505_LDO_AUX2,
|
||||
AB8505_LDO_AUX3,
|
||||
AB8505_LDO_AUX4,
|
||||
AB8505_LDO_AUX5,
|
||||
AB8505_LDO_AUX6,
|
||||
AB8505_LDO_INTCORE,
|
||||
AB8505_LDO_ADC,
|
||||
AB8505_LDO_USB,
|
||||
AB8505_LDO_AUDIO,
|
||||
AB8505_LDO_ANAMIC1,
|
||||
AB8505_LDO_ANAMIC2,
|
||||
AB8505_LDO_AUX8,
|
||||
AB8505_LDO_ANA,
|
||||
AB8505_SYSCLKREQ_2,
|
||||
AB8505_SYSCLKREQ_4,
|
||||
AB8505_NUM_REGULATORS,
|
||||
};
|
||||
|
||||
/* AB9540 regulators */
|
||||
enum ab9540_regulator_id {
|
||||
AB9540_LDO_AUX1,
|
||||
AB9540_LDO_AUX2,
|
||||
@ -46,7 +68,7 @@ enum ab9540_regulator_id {
|
||||
AB9540_NUM_REGULATORS,
|
||||
};
|
||||
|
||||
/* AB8500 and AB9540 register initialization */
|
||||
/* AB8500, AB8505, and AB9540 register initialization */
|
||||
struct ab8500_regulator_reg_init {
|
||||
int id;
|
||||
u8 mask;
|
||||
@ -92,6 +114,55 @@ enum ab8500_regulator_reg {
|
||||
AB8500_NUM_REGULATOR_REGISTERS,
|
||||
};
|
||||
|
||||
/* AB8505 registers */
|
||||
enum ab8505_regulator_reg {
|
||||
AB8505_REGUREQUESTCTRL1,
|
||||
AB8505_REGUREQUESTCTRL2,
|
||||
AB8505_REGUREQUESTCTRL3,
|
||||
AB8505_REGUREQUESTCTRL4,
|
||||
AB8505_REGUSYSCLKREQ1HPVALID1,
|
||||
AB8505_REGUSYSCLKREQ1HPVALID2,
|
||||
AB8505_REGUHWHPREQ1VALID1,
|
||||
AB8505_REGUHWHPREQ1VALID2,
|
||||
AB8505_REGUHWHPREQ2VALID1,
|
||||
AB8505_REGUHWHPREQ2VALID2,
|
||||
AB8505_REGUSWHPREQVALID1,
|
||||
AB8505_REGUSWHPREQVALID2,
|
||||
AB8505_REGUSYSCLKREQVALID1,
|
||||
AB8505_REGUSYSCLKREQVALID2,
|
||||
AB8505_REGUVAUX4REQVALID,
|
||||
AB8505_REGUMISC1,
|
||||
AB8505_VAUDIOSUPPLY,
|
||||
AB8505_REGUCTRL1VAMIC,
|
||||
AB8505_VSMPSAREGU,
|
||||
AB8505_VSMPSBREGU,
|
||||
AB8505_VSAFEREGU, /* NOTE! PRCMU register */
|
||||
AB8505_VPLLVANAREGU,
|
||||
AB8505_EXTSUPPLYREGU,
|
||||
AB8505_VAUX12REGU,
|
||||
AB8505_VRF1VAUX3REGU,
|
||||
AB8505_VSMPSASEL1,
|
||||
AB8505_VSMPSASEL2,
|
||||
AB8505_VSMPSASEL3,
|
||||
AB8505_VSMPSBSEL1,
|
||||
AB8505_VSMPSBSEL2,
|
||||
AB8505_VSMPSBSEL3,
|
||||
AB8505_VSAFESEL1, /* NOTE! PRCMU register */
|
||||
AB8505_VSAFESEL2, /* NOTE! PRCMU register */
|
||||
AB8505_VSAFESEL3, /* NOTE! PRCMU register */
|
||||
AB8505_VAUX1SEL,
|
||||
AB8505_VAUX2SEL,
|
||||
AB8505_VRF1VAUX3SEL,
|
||||
AB8505_VAUX4REQCTRL,
|
||||
AB8505_VAUX4REGU,
|
||||
AB8505_VAUX4SEL,
|
||||
AB8505_REGUCTRLDISCH,
|
||||
AB8505_REGUCTRLDISCH2,
|
||||
AB8505_REGUCTRLDISCH3,
|
||||
AB8505_CTRLVAUX5,
|
||||
AB8505_CTRLVAUX6,
|
||||
AB8505_NUM_REGULATOR_REGISTERS,
|
||||
};
|
||||
|
||||
/* AB9540 registers */
|
||||
enum ab9540_regulator_reg {
|
||||
|
Loading…
Reference in New Issue
Block a user