forked from Minki/linux
[SCSI] ufs: add operation for the uic power mode change
Setting PA_PWRMode using DME_SET triggers the power mode change. And then the result will be given by the HCS.UPMCRS. This operation should be done atomically. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Tested-by: Yaniv Gardi <ygardi@codeaurora.org> Signed-off-by: Santosh Y <santoshsy@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Seungwon Jeon
James Bottomley
parent
12b4fdb4f6
commit
53b3d9c3fd
@ -36,9 +36,11 @@
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#include <linux/async.h>
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#include "ufshcd.h"
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#include "unipro.h"
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#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
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UTP_TASK_REQ_COMPL |\
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UIC_POWER_MODE |\
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UFSHCD_ERROR_MASK)
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/* UIC command timeout, unit: ms */
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#define UIC_CMD_TIMEOUT 500
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@ -469,6 +471,18 @@ static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
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return false;
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}
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/**
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* ufshcd_get_upmcrs - Get the power mode change request status
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* @hba: Pointer to adapter instance
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*
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* This function gets the UPMCRS field of HCS register
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* Returns value of UPMCRS field
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*/
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static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
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{
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return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
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}
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/**
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* ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
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* @hba: per adapter instance
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@ -1459,6 +1473,64 @@ out:
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}
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EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
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/**
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* ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
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* using DME_SET primitives.
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* @hba: per adapter instance
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* @mode: powr mode value
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*
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* Returns 0 on success, non-zero value on failure
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*/
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int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
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{
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struct uic_command uic_cmd = {0};
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struct completion pwr_done;
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unsigned long flags;
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u8 status;
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int ret;
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uic_cmd.command = UIC_CMD_DME_SET;
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uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
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uic_cmd.argument3 = mode;
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init_completion(&pwr_done);
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mutex_lock(&hba->uic_cmd_mutex);
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spin_lock_irqsave(hba->host->host_lock, flags);
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hba->pwr_done = &pwr_done;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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ret = __ufshcd_send_uic_cmd(hba, &uic_cmd);
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if (ret) {
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dev_err(hba->dev,
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"pwr mode change with mode 0x%x uic error %d\n",
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mode, ret);
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goto out;
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}
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if (!wait_for_completion_timeout(hba->pwr_done,
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msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
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dev_err(hba->dev,
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"pwr mode change with mode 0x%x completion timeout\n",
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mode);
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ret = -ETIMEDOUT;
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goto out;
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}
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status = ufshcd_get_upmcrs(hba);
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if (status != PWR_LOCAL) {
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dev_err(hba->dev,
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"pwr mode change failed, host umpcrs:0x%x\n",
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status);
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ret = (status != PWR_OK) ? status : -1;
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}
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out:
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spin_lock_irqsave(hba->host->host_lock, flags);
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hba->pwr_done = NULL;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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mutex_unlock(&hba->uic_cmd_mutex);
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return ret;
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}
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/**
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* ufshcd_complete_dev_init() - checks device readiness
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* hba: per-adapter instance
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@ -1988,16 +2060,20 @@ ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
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/**
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* ufshcd_uic_cmd_compl - handle completion of uic command
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* @hba: per adapter instance
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* @intr_status: interrupt status generated by the controller
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*/
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static void ufshcd_uic_cmd_compl(struct ufs_hba *hba)
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static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
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{
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if (hba->active_uic_cmd) {
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if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
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hba->active_uic_cmd->argument2 |=
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ufshcd_get_uic_cmd_result(hba);
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hba->active_uic_cmd->argument3 =
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ufshcd_get_dme_attr_val(hba);
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complete(&hba->active_uic_cmd->done);
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}
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if ((intr_status & UIC_POWER_MODE) && hba->pwr_done)
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complete(hba->pwr_done);
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}
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/**
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@ -2343,8 +2419,8 @@ static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
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if (hba->errors)
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ufshcd_err_handler(hba);
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if (intr_status & UIC_COMMAND_COMPL)
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ufshcd_uic_cmd_compl(hba);
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if (intr_status & UFSHCD_UIC_MASK)
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ufshcd_uic_cmd_compl(hba, intr_status);
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if (intr_status & UTP_TASK_REQ_COMPL)
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ufshcd_tmc_handler(hba);
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@ -175,6 +175,7 @@ struct ufs_dev_cmd {
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* @active_uic_cmd: handle of active UIC command
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* @uic_cmd_mutex: mutex for uic command
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* @ufshcd_tm_wait_queue: wait queue for task management
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* @pwr_done: completion for power mode change
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* @tm_condition: condition variable for task management
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* @ufshcd_state: UFSHCD states
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* @intr_mask: Interrupt Mask Bits
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@ -219,6 +220,8 @@ struct ufs_hba {
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wait_queue_head_t ufshcd_tm_wait_queue;
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unsigned long tm_condition;
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struct completion *pwr_done;
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u32 ufshcd_state;
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u32 intr_mask;
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u16 ee_ctrl_mask;
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@ -124,6 +124,9 @@ enum {
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#define CONTROLLER_FATAL_ERROR UFS_BIT(16)
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#define SYSTEM_BUS_FATAL_ERROR UFS_BIT(17)
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#define UFSHCD_UIC_MASK (UIC_COMMAND_COMPL |\
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UIC_POWER_MODE)
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#define UFSHCD_ERROR_MASK (UIC_ERROR |\
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DEVICE_FATAL_ERROR |\
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CONTROLLER_FATAL_ERROR |\
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@ -142,6 +145,15 @@ enum {
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#define DEVICE_ERROR_INDICATOR UFS_BIT(5)
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#define UIC_POWER_MODE_CHANGE_REQ_STATUS_MASK UFS_MASK(0x7, 8)
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enum {
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PWR_OK = 0x0,
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PWR_LOCAL = 0x01,
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PWR_REMOTE = 0x02,
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PWR_BUSY = 0x03,
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PWR_ERROR_CAP = 0x04,
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PWR_FATAL_ERROR = 0x05,
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};
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/* HCE - Host Controller Enable 34h */
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#define CONTROLLER_ENABLE UFS_BIT(0)
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#define CONTROLLER_DISABLE 0x0
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130
drivers/scsi/ufs/unipro.h
Normal file
130
drivers/scsi/ufs/unipro.h
Normal file
@ -0,0 +1,130 @@
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/*
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* drivers/scsi/ufs/unipro.h
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*
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _UNIPRO_H_
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#define _UNIPRO_H_
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/*
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* PHY Adpater attributes
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*/
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#define PA_ACTIVETXDATALANES 0x1560
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#define PA_ACTIVERXDATALANES 0x1580
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#define PA_TXTRAILINGCLOCKS 0x1564
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#define PA_PHY_TYPE 0x1500
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#define PA_AVAILTXDATALANES 0x1520
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#define PA_AVAILRXDATALANES 0x1540
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#define PA_MINRXTRAILINGCLOCKS 0x1543
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#define PA_TXPWRSTATUS 0x1567
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#define PA_RXPWRSTATUS 0x1582
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#define PA_TXFORCECLOCK 0x1562
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#define PA_TXPWRMODE 0x1563
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#define PA_LEGACYDPHYESCDL 0x1570
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#define PA_MAXTXSPEEDFAST 0x1521
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#define PA_MAXTXSPEEDSLOW 0x1522
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#define PA_MAXRXSPEEDFAST 0x1541
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#define PA_MAXRXSPEEDSLOW 0x1542
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#define PA_TXLINKSTARTUPHS 0x1544
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#define PA_TXSPEEDFAST 0x1565
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#define PA_TXSPEEDSLOW 0x1566
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#define PA_REMOTEVERINFO 0x15A0
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#define PA_TXGEAR 0x1568
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#define PA_TXTERMINATION 0x1569
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#define PA_HSSERIES 0x156A
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#define PA_PWRMODE 0x1571
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#define PA_RXGEAR 0x1583
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#define PA_RXTERMINATION 0x1584
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#define PA_MAXRXPWMGEAR 0x1586
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#define PA_MAXRXHSGEAR 0x1587
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#define PA_RXHSUNTERMCAP 0x15A5
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#define PA_RXLSTERMCAP 0x15A6
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#define PA_PACPREQTIMEOUT 0x1590
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#define PA_PACPREQEOBTIMEOUT 0x1591
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#define PA_HIBERN8TIME 0x15A7
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#define PA_LOCALVERINFO 0x15A9
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#define PA_TACTIVATE 0x15A8
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#define PA_PACPFRAMECOUNT 0x15C0
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#define PA_PACPERRORCOUNT 0x15C1
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#define PA_PHYTESTCONTROL 0x15C2
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#define PA_PWRMODEUSERDATA0 0x15B0
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#define PA_PWRMODEUSERDATA1 0x15B1
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#define PA_PWRMODEUSERDATA2 0x15B2
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#define PA_PWRMODEUSERDATA3 0x15B3
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#define PA_PWRMODEUSERDATA4 0x15B4
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#define PA_PWRMODEUSERDATA5 0x15B5
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#define PA_PWRMODEUSERDATA6 0x15B6
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#define PA_PWRMODEUSERDATA7 0x15B7
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#define PA_PWRMODEUSERDATA8 0x15B8
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#define PA_PWRMODEUSERDATA9 0x15B9
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#define PA_PWRMODEUSERDATA10 0x15BA
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#define PA_PWRMODEUSERDATA11 0x15BB
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#define PA_CONNECTEDTXDATALANES 0x1561
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#define PA_CONNECTEDRXDATALANES 0x1581
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#define PA_LOGICALLANEMAP 0x15A1
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#define PA_SLEEPNOCONFIGTIME 0x15A2
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#define PA_STALLNOCONFIGTIME 0x15A3
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#define PA_SAVECONFIGTIME 0x15A4
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/*
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* Data Link Layer Attributes
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*/
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#define DL_TC0TXFCTHRESHOLD 0x2040
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#define DL_FC0PROTTIMEOUTVAL 0x2041
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#define DL_TC0REPLAYTIMEOUTVAL 0x2042
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#define DL_AFC0REQTIMEOUTVAL 0x2043
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#define DL_AFC0CREDITTHRESHOLD 0x2044
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#define DL_TC0OUTACKTHRESHOLD 0x2045
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#define DL_TC1TXFCTHRESHOLD 0x2060
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#define DL_FC1PROTTIMEOUTVAL 0x2061
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#define DL_TC1REPLAYTIMEOUTVAL 0x2062
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#define DL_AFC1REQTIMEOUTVAL 0x2063
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#define DL_AFC1CREDITTHRESHOLD 0x2064
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#define DL_TC1OUTACKTHRESHOLD 0x2065
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#define DL_TXPREEMPTIONCAP 0x2000
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#define DL_TC0TXMAXSDUSIZE 0x2001
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#define DL_TC0RXINITCREDITVAL 0x2002
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#define DL_TC0TXBUFFERSIZE 0x2005
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#define DL_PEERTC0PRESENT 0x2046
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#define DL_PEERTC0RXINITCREVAL 0x2047
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#define DL_TC1TXMAXSDUSIZE 0x2003
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#define DL_TC1RXINITCREDITVAL 0x2004
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#define DL_TC1TXBUFFERSIZE 0x2006
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#define DL_PEERTC1PRESENT 0x2066
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#define DL_PEERTC1RXINITCREVAL 0x2067
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/*
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* Network Layer Attributes
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*/
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#define N_DEVICEID 0x3000
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#define N_DEVICEID_VALID 0x3001
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#define N_TC0TXMAXSDUSIZE 0x3020
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#define N_TC1TXMAXSDUSIZE 0x3021
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/*
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* Transport Layer Attributes
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*/
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#define T_NUMCPORTS 0x4000
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#define T_NUMTESTFEATURES 0x4001
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#define T_CONNECTIONSTATE 0x4020
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#define T_PEERDEVICEID 0x4021
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#define T_PEERCPORTID 0x4022
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#define T_TRAFFICCLASS 0x4023
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#define T_PROTOCOLID 0x4024
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#define T_CPORTFLAGS 0x4025
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#define T_TXTOKENVALUE 0x4026
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#define T_RXTOKENVALUE 0x4027
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#define T_LOCALBUFFERSPACE 0x4028
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#define T_PEERBUFFERSPACE 0x4029
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#define T_CREDITSTOSEND 0x402A
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#define T_CPORTMODE 0x402B
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#define T_TC0TXMAXSDUSIZE 0x4060
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#define T_TC1TXMAXSDUSIZE 0x4061
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#endif /* _UNIPRO_H_ */
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