spi: aspeed: Add support for the AST2400 SPI controller
Extend the driver for the AST2400 SPI Flash Controller (SPI). This controller has a slightly different interface which requires adaptation of the 4B handling. Summary of features : . host Firmware . 1 chip select pin (CE0) . slightly different register set, between AST2500 and the legacy controller . no segment registers . single, dual mode. Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <rentao.bupt@gmail.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-8-clg@kaod.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -30,6 +30,7 @@
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#define CTRL_IO_DUAL_DATA BIT(29)
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#define CTRL_IO_QUAD_DATA BIT(30)
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#define CTRL_COMMAND_SHIFT 16
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#define CTRL_IO_ADDRESS_4B BIT(13) /* AST2400 SPI only */
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#define CTRL_IO_DUMMY_SET(dummy) \
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(((((dummy) >> 2) & 0x1) << 14) | (((dummy) & 0x3) << 6))
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#define CTRL_CE_STOP_ACTIVE BIT(2)
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@ -280,6 +281,8 @@ static bool aspeed_spi_supports_op(struct spi_mem *mem, const struct spi_mem_op
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return spi_mem_default_supports_op(mem, op);
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}
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static const struct aspeed_spi_data ast2400_spi_data;
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static int do_aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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{
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struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->master);
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@ -309,6 +312,9 @@ static int do_aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *o
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addr_mode |= (0x11 << chip->cs);
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else
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addr_mode &= ~(0x11 << chip->cs);
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if (op->addr.nbytes == 4 && chip->aspi->data == &ast2400_spi_data)
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ctl_val |= CTRL_IO_ADDRESS_4B;
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}
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if (op->dummy.nbytes)
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@ -398,7 +404,13 @@ static int aspeed_spi_chip_set_default_window(struct aspeed_spi_chip *chip)
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struct aspeed_spi_window windows[ASPEED_SPI_MAX_NUM_CS] = { 0 };
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struct aspeed_spi_window *win = &windows[chip->cs];
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aspeed_spi_get_windows(aspi, windows);
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/* No segment registers for the AST2400 SPI controller */
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if (aspi->data == &ast2400_spi_data) {
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win->offset = 0;
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win->size = aspi->ahb_window_size;
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} else {
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aspeed_spi_get_windows(aspi, windows);
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}
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chip->ahb_base = aspi->ahb_base + win->offset;
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chip->ahb_window_size = win->size;
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@ -461,6 +473,10 @@ static int aspeed_spi_chip_adjust_window(struct aspeed_spi_chip *chip,
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struct aspeed_spi_window *win = &windows[chip->cs];
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int ret;
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/* No segment registers for the AST2400 SPI controller */
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if (aspi->data == &ast2400_spi_data)
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return 0;
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/*
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* Due to an HW issue on the AST2500 SPI controller, the CE0
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* window size should be smaller than the maximum 128MB.
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@ -545,6 +561,12 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
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else
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addr_mode &= ~(0x11 << chip->cs);
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writel(addr_mode, aspi->regs + CE_CTRL_REG);
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/* AST2400 SPI controller sets 4BYTE address mode in
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* CE0 Control Register
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*/
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if (op->addr.nbytes == 4 && chip->aspi->data == &ast2400_spi_data)
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ctl_val |= CTRL_IO_ADDRESS_4B;
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}
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/* READ mode is the controller default setting */
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@ -816,6 +838,14 @@ static const struct aspeed_spi_data ast2400_fmc_data = {
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.segment_reg = aspeed_spi_segment_reg,
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};
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static const struct aspeed_spi_data ast2400_spi_data = {
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.max_cs = 1,
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.hastype = false,
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.we0 = 0,
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.ctl0 = 0x04,
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/* No segment registers */
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};
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static const struct aspeed_spi_data ast2500_fmc_data = {
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.max_cs = 3,
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.hastype = true,
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@ -860,6 +890,7 @@ static const struct aspeed_spi_data ast2600_spi_data = {
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static const struct of_device_id aspeed_spi_matches[] = {
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{ .compatible = "aspeed,ast2400-fmc", .data = &ast2400_fmc_data },
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{ .compatible = "aspeed,ast2400-spi", .data = &ast2400_spi_data },
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{ .compatible = "aspeed,ast2500-fmc", .data = &ast2500_fmc_data },
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{ .compatible = "aspeed,ast2500-spi", .data = &ast2500_spi_data },
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{ .compatible = "aspeed,ast2600-fmc", .data = &ast2600_fmc_data },
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