Staging: gma500: fix up trailing whitespace errors

Lots of little ones all through the driver, mostly
all in a cut-and-paste header comment.

Cc: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman 2011-02-23 13:50:42 -08:00
parent 8997fd21bb
commit 5352161fc4
17 changed files with 52 additions and 52 deletions

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@ -12,7 +12,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
@ -232,7 +232,7 @@ enum {
#define MDFLD_DSR_MIPI_CONTROL BIT6
#define MDFLD_DSR_2D_3D (MDFLD_DSR_2D_3D_0 | MDFLD_DSR_2D_3D_2)
#define MDFLD_DSR_RR 45
#define MDFLD_DSR_RR 45
#define MDFLD_DPU_ENABLE BIT31
#define MDFLD_DSR_FULLSCREEN BIT30
#define MDFLD_DSR_DELAY (DRM_HZ / MDFLD_DSR_RR)
@ -344,9 +344,9 @@ struct psb_video_ctx {
struct drm_psb_private {
/*
* DSI info.
* DSI info.
*/
void * dbi_dsr_info;
void * dbi_dsr_info;
void * dsi_configs[2];
/*
@ -387,7 +387,7 @@ struct drm_psb_private {
uint8_t *sgx_reg;
uint8_t *vdc_reg;
uint32_t gatt_free_offset;
/* IMG video context */
struct list_head video_ctx;

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@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors:

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@ -12,7 +12,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/

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@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors:

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@ -1,5 +1,5 @@
/* copyright (c) 2008, Intel Corporation
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
@ -10,7 +10,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors:

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@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
*/

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@ -1,6 +1,6 @@
/*
* Copyright (c) 2009, Intel Corporation.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef __PSB_INTEL_REG_H__
@ -589,7 +589,7 @@ struct dpst_guardband {
/*
* Some BIOS scratch area registers. The 845 (and 830?) store the amount
* of video memory available to the BIOS in SWF1.
*/
*/
#define SWF0 0x71410
#define SWF1 0x71414
#define SWF2 0x71418
@ -695,12 +695,12 @@ struct dpst_guardband {
*/
#define MRST_DPLL_A 0x0f014
#define MDFLD_DPLL_B 0x0f018
#define MDFLD_INPUT_REF_SEL (1 << 14)
#define MDFLD_VCO_SEL (1 << 16)
#define MDFLD_INPUT_REF_SEL (1 << 14)
#define MDFLD_VCO_SEL (1 << 16)
#define DPLLA_MODE_LVDS (2 << 26) /* mrst */
#define MDFLD_PLL_LATCHEN (1 << 28)
#define MDFLD_PWR_GATE_EN (1 << 30)
#define MDFLD_P1_MASK (0x1FF << 17)
#define MDFLD_PLL_LATCHEN (1 << 28)
#define MDFLD_PWR_GATE_EN (1 << 30)
#define MDFLD_P1_MASK (0x1FF << 17)
#define MRST_FPA0 0x0f040
#define MRST_FPA1 0x0f044
#define MDFLD_DPLL_DIV0 0x0f048
@ -1094,8 +1094,8 @@ Bits D7 and D3 are not used.
#define DCS_PIXEL_FORMAT_3bbp 0x1
#define DCS_PIXEL_FORMAT_8bbp 0x2
#define DCS_PIXEL_FORMAT_12bbp 0x3
#define DCS_PIXEL_FORMAT_16bbp 0x5
#define DCS_PIXEL_FORMAT_18bbp 0x6
#define DCS_PIXEL_FORMAT_16bbp 0x5
#define DCS_PIXEL_FORMAT_18bbp 0x6
#define DCS_PIXEL_FORMAT_24bbp 0x7
#define write_mem_cont 0x3c
/* ************************************************************************* *\
@ -1190,7 +1190,7 @@ gamma settings.
* byte alignment
*/
#define DBI_CB_TIME_OUT 0xFFFF
#define GEN_FB_TIME_OUT 2000
#define GEN_FB_TIME_OUT 2000
#define ALIGNMENT_32BYTE_MASK (~(BIT0|BIT1|BIT2|BIT3|BIT4))
#define SKU_83 0x01
#define SKU_100 0x02

View File

@ -1,6 +1,6 @@
/*
* SDVO command definitions and structures.
*
*
* Copyright (c) 2008, Intel Corporation
*
* This program is free software; you can redistribute it and/or modify it
@ -13,7 +13,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors:

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@ -119,7 +119,7 @@ static int save_display_registers(struct drm_device *dev)
crtc->funcs->save(crtc);
}
}
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
connector->funcs->save(connector);
}
@ -194,7 +194,7 @@ void ospm_suspend_display(struct drm_device *dev)
return;
save_display_registers(dev);
if (dev_priv->iLVDS_enable) {
/*shutdown the panel*/
PSB_WVDC32(0, PP_CONTROL);
@ -243,7 +243,7 @@ void ospm_resume_display(struct pci_dev *pdev)
struct psb_gtt *pg = dev_priv->pg;
printk(KERN_ALERT "%s \n", __func__);
#ifdef OSPM_GFX_DPK
printk(KERN_ALERT "%s \n", __func__);
#endif
@ -263,7 +263,7 @@ void ospm_resume_display(struct pci_dev *pdev)
* above.
*/
/*psb_gtt_init(dev_priv->pg, 1);*/
restore_display_registers(dev);
}
@ -356,7 +356,7 @@ int ospm_power_suspend(struct pci_dev *pdev, pm_message_t state)
int videoenc_access_count;
int videodec_access_count;
int display_access_count;
bool suspend_pci = true;
bool suspend_pci = true;
if(gbSuspendInProgress || gbResumeInProgress)
{
@ -518,7 +518,7 @@ void ospm_power_island_down(int islands)
if (islands & OSPM_DISPLAY_ISLAND) {
pwr_mask = PSB_PWRGT_DISPLAY_MASK;
outl(pwr_mask, (dev_priv->ospm_base + PSB_PM_SSC));
while (true) {
@ -529,7 +529,7 @@ void ospm_power_island_down(int islands)
udelay(10);
}
}
#endif
#endif
}
@ -553,9 +553,9 @@ bool ospm_power_is_hw_on(int hw_islands)
* specified island's hw so don't power it off. If force_on is true,
* this will power on the specified island if it is off.
* Otherwise, this will return false and the caller is expected to not
* access the hw.
*
* NOTE *** If this is called from and interrupt handler or other atomic
* access the hw.
*
* NOTE *** If this is called from and interrupt handler or other atomic
* context, then it will return false if we are in the middle of a
* power state transition and the caller will be expected to handle that
* even if force_on is set to true.
@ -563,7 +563,7 @@ bool ospm_power_is_hw_on(int hw_islands)
bool ospm_power_using_hw_begin(int hw_island, UHBUsage usage)
{
return 1; /*FIXMEAC */
#if 0
#if 0
bool ret = true;
bool island_is_off = false;
bool b_atomic = (in_interrupt() || in_atomic());
@ -702,7 +702,7 @@ increase_count:
mutex_unlock(&power_mutex);
return ret;
#endif
#endif
}
@ -739,7 +739,7 @@ void ospm_power_using_hw_end(int hw_island)
WARN_ON(atomic_read(&g_videoenc_access_count) < 0);
WARN_ON(atomic_read(&g_videodec_access_count) < 0);
WARN_ON(atomic_read(&g_display_access_count) < 0);
#endif
#endif
}
int ospm_runtime_pm_allow(struct drm_device * dev)
@ -750,9 +750,9 @@ int ospm_runtime_pm_allow(struct drm_device * dev)
void ospm_runtime_pm_forbid(struct drm_device * dev)
{
struct drm_psb_private * dev_priv = dev->dev_private;
DRM_INFO("%s\n", __FUNCTION__);
pm_runtime_forbid(&dev->pdev->dev);
dev_priv->rpm_enabled = 0;
}

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@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
*/

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@ -14,7 +14,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA..
*
**************************************************************************/
@ -568,10 +568,10 @@
#define PSB_PM_SSC 0x20
#define PSB_PM_SSS 0x30
#define PSB_PWRGT_DISPLAY_MASK 0xc /*on a different BA than video/gfx*/
#define MDFLD_PWRGT_DISPLAY_A_CNTR 0x0000000c
#define MDFLD_PWRGT_DISPLAY_B_CNTR 0x0000c000
#define MDFLD_PWRGT_DISPLAY_C_CNTR 0x00030000
#define MDFLD_PWRGT_DISP_MIPI_CNTR 0x000c0000
#define MDFLD_PWRGT_DISPLAY_A_CNTR 0x0000000c
#define MDFLD_PWRGT_DISPLAY_B_CNTR 0x0000c000
#define MDFLD_PWRGT_DISPLAY_C_CNTR 0x00030000
#define MDFLD_PWRGT_DISP_MIPI_CNTR 0x000c0000
#define MDFLD_PWRGT_DISPLAY_CNTR (MDFLD_PWRGT_DISPLAY_A_CNTR | MDFLD_PWRGT_DISPLAY_B_CNTR | MDFLD_PWRGT_DISPLAY_C_CNTR | MDFLD_PWRGT_DISP_MIPI_CNTR)// 0x000fc00c
// Display SSS register bits are different in A0 vs. B0
#define PSB_PWRGT_GFX_MASK 0x3
@ -582,7 +582,7 @@
#define MDFLD_PWRGT_DISPLAY_A_STS_B0 0x0000000c
#define MDFLD_PWRGT_DISPLAY_B_STS_B0 0x0000c000
#define MDFLD_PWRGT_DISPLAY_C_STS_B0 0x00030000
#define MDFLD_PWRGT_DISP_MIPI_STS 0x000c0000
#define MDFLD_PWRGT_DISP_MIPI_STS 0x000c0000
#define MDFLD_PWRGT_DISPLAY_STS_A0 (MDFLD_PWRGT_DISPLAY_A_STS | MDFLD_PWRGT_DISPLAY_B_STS | MDFLD_PWRGT_DISPLAY_C_STS | MDFLD_PWRGT_DISP_MIPI_STS)// 0x000fc00c
#define MDFLD_PWRGT_DISPLAY_STS_B0 (MDFLD_PWRGT_DISPLAY_A_STS_B0 | MDFLD_PWRGT_DISPLAY_B_STS_B0 | MDFLD_PWRGT_DISPLAY_C_STS_B0 | MDFLD_PWRGT_DISP_MIPI_STS)// 0x000fc00c
#endif

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@ -11,7 +11,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors:

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@ -15,7 +15,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/

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@ -15,7 +15,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/

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@ -15,7 +15,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/

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@ -15,7 +15,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/

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@ -15,7 +15,7 @@
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/