forked from Minki/linux
KVM: MMU: Introduce kvm_init_shadow_mmu helper function
Some logic of the init_kvm_softmmu function is required to build the Nested Nested Paging context. So factor the required logic into a seperate function and export it. Also make the whole init path suitable for more than one mmu context. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -2532,10 +2532,9 @@ static void nonpaging_free(struct kvm_vcpu *vcpu)
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mmu_free_roots(vcpu);
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}
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static int nonpaging_init_context(struct kvm_vcpu *vcpu)
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static int nonpaging_init_context(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context)
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{
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struct kvm_mmu *context = &vcpu->arch.mmu;
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context->new_cr3 = nonpaging_new_cr3;
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context->page_fault = nonpaging_page_fault;
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context->gva_to_gpa = nonpaging_gva_to_gpa;
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@ -2595,9 +2594,10 @@ static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
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#include "paging_tmpl.h"
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#undef PTTYPE
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static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
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static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context,
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int level)
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{
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struct kvm_mmu *context = &vcpu->arch.mmu;
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int maxphyaddr = cpuid_maxphyaddr(vcpu);
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u64 exb_bit_rsvd = 0;
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@ -2656,9 +2656,11 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
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}
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}
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static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
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static int paging64_init_context_common(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context,
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int level)
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{
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struct kvm_mmu *context = &vcpu->arch.mmu;
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reset_rsvds_bits_mask(vcpu, context, level);
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ASSERT(is_pae(vcpu));
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context->new_cr3 = paging_new_cr3;
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@ -2675,17 +2677,17 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
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return 0;
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}
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static int paging64_init_context(struct kvm_vcpu *vcpu)
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static int paging64_init_context(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context)
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{
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reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
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return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
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return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
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}
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static int paging32_init_context(struct kvm_vcpu *vcpu)
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static int paging32_init_context(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context)
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{
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struct kvm_mmu *context = &vcpu->arch.mmu;
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reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
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reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
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context->new_cr3 = paging_new_cr3;
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context->page_fault = paging32_page_fault;
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context->gva_to_gpa = paging32_gva_to_gpa;
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@ -2700,10 +2702,10 @@ static int paging32_init_context(struct kvm_vcpu *vcpu)
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return 0;
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}
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static int paging32E_init_context(struct kvm_vcpu *vcpu)
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static int paging32E_init_context(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context)
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{
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reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
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return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
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return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
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}
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static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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@ -2727,15 +2729,15 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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context->gva_to_gpa = nonpaging_gva_to_gpa;
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context->root_level = 0;
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} else if (is_long_mode(vcpu)) {
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reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
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reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
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context->gva_to_gpa = paging64_gva_to_gpa;
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context->root_level = PT64_ROOT_LEVEL;
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} else if (is_pae(vcpu)) {
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reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
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reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
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context->gva_to_gpa = paging64_gva_to_gpa;
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context->root_level = PT32E_ROOT_LEVEL;
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} else {
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reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
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reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
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context->gva_to_gpa = paging32_gva_to_gpa;
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context->root_level = PT32_ROOT_LEVEL;
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}
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@ -2743,24 +2745,32 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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return 0;
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}
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static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
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int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
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{
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int r;
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ASSERT(vcpu);
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ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
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if (!is_paging(vcpu))
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r = nonpaging_init_context(vcpu);
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r = nonpaging_init_context(vcpu, context);
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else if (is_long_mode(vcpu))
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r = paging64_init_context(vcpu);
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r = paging64_init_context(vcpu, context);
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else if (is_pae(vcpu))
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r = paging32E_init_context(vcpu);
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r = paging32E_init_context(vcpu, context);
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else
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r = paging32_init_context(vcpu);
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r = paging32_init_context(vcpu, context);
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vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
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vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
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return r;
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}
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EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
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static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
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{
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int r = kvm_init_shadow_mmu(vcpu, &vcpu->arch.mmu);
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vcpu->arch.mmu.set_cr3 = kvm_x86_ops->set_cr3;
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vcpu->arch.mmu.get_cr3 = get_cr3;
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vcpu->arch.mmu.inject_page_fault = kvm_inject_page_fault;
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@ -49,6 +49,7 @@
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#define PFERR_FETCH_MASK (1U << 4)
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int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
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int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);
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static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm)
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{
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