ASPEED device tree updates for 5.12

- New machines
 
   * Ampere Mt. Jade, an AST2500 BMC for an x86 server
   * IBM Everest, an AST2600 BMC for a Power10 server
   * Supermicro x11spi, an AST2500 BMC for an ARM server
 
  - AST2600 eMMC clock phase configuration
 
  - Proper clock support for LPC snoop
 
  - Misc updates to ethanolx, mowgli, ast2600evb, g220a, and rainier
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Merge tag 'aspeed-5.12-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.12

 - New machines

  * Ampere Mt. Jade, an AST2500 BMC for an x86 server
  * IBM Everest, an AST2600 BMC for a Power10 server
  * Supermicro x11spi, an AST2500 BMC for an ARM server

 - AST2600 eMMC clock phase configuration

 - Proper clock support for LPC snoop

 - Misc updates to ethanolx, mowgli, ast2600evb, g220a, and rainier

* tag 'aspeed-5.12-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci
  ARM: dts: aspeed: mowgli: Add i2c rtc device
  ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
  ARM: dts: aspeed: Add Everest BMC machine
  ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver
  ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names
  ARM: dts: aspeed: Add Supermicro x11spi BMC machine
  ARM: dts: aspeed: g220a: Fix some gpio
  ARM: dts: aspeed: g220a: Enable ipmb
  ARM: dts: aspeed: rainier: Add eMMC clock phase compensation
  ARM: dts: aspeed: Add LCLK to lpc-snoop
  ARM: dts: aspeed: Add device tree for Ampere's Mt. Jade BMC

Link: https://lore.kernel.org/r/CACPK8XfQgGch5bK3YD0La+CE2L5DxVa1MNw6m1fc40j0w7e9Tw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-02-11 12:15:19 +01:00
commit 52ded9eaa2
13 changed files with 1534 additions and 7 deletions

View File

@ -1418,6 +1418,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-bytedance-g220a.dtb \
@ -1430,6 +1431,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-facebook-wedge400.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-facebook-yosemitev2.dtb \
aspeed-bmc-ibm-everest.dtb \
aspeed-bmc-ibm-rainier.dtb \
aspeed-bmc-ibm-rainier-4u.dtb \
aspeed-bmc-intel-s2600wf.dtb \
@ -1449,4 +1451,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
aspeed-bmc-quanta-q71l.dtb
aspeed-bmc-quanta-q71l.dtb \
aspeed-bmc-supermicro-x11spi.dtb

View File

@ -237,3 +237,11 @@
&fsim0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};

View File

@ -218,7 +218,7 @@
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
snoop-ports = <0x80>, <0x81>;
};
&lpc_ctrl {

View File

@ -0,0 +1,558 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Ampere Mt. Jade BMC";
compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
fault {
gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
};
identify {
gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
shutdown_ack {
label = "SHUTDOWN_ACK";
gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 2)>;
};
reboot_ack {
label = "REBOOT_ACK";
gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 3)>;
};
S0_overtemp {
label = "S0_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 3)>;
};
S0_hightemp {
label = "S0_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 0)>;
};
S0_cpu_fault {
label = "S0_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(J, 1)>;
};
S1_overtemp {
label = "S1_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 6)>;
};
S1_hightemp {
label = "S1_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(AB, 0)>;
};
S1_cpu_fault {
label = "S1_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(Z, 1)>;
};
id_button {
label = "ID_BUTTON";
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Q, 5)>;
};
};
gpioA0mux: mux-controller {
compatible = "gpio-mux";
#mux-control-cells = <0>;
mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
};
adc0mux: adc0mux {
compatible = "io-channel-mux";
io-channels = <&adc 0>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc1mux: adc1mux {
compatible = "io-channel-mux";
io-channels = <&adc 1>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc2mux: adc2mux {
compatible = "io-channel-mux";
io-channels = <&adc 2>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc3mux: adc3mux {
compatible = "io-channel-mux";
io-channels = <&adc 3>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc4mux: adc4mux {
compatible = "io-channel-mux";
io-channels = <&adc 4>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc5mux: adc5mux {
compatible = "io-channel-mux";
io-channels = <&adc 5>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc6mux: adc6mux {
compatible = "io-channel-mux";
io-channels = <&adc 6>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc7mux: adc7mux {
compatible = "io-channel-mux";
io-channels = <&adc 7>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc8mux: adc8mux {
compatible = "io-channel-mux";
io-channels = <&adc 8>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc9mux: adc9mux {
compatible = "io-channel-mux";
io-channels = <&adc 9>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc10mux: adc10mux {
compatible = "io-channel-mux";
io-channels = <&adc 10>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc11mux: adc11mux {
compatible = "io-channel-mux";
io-channels = <&adc 11>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc12mux: adc12mux {
compatible = "io-channel-mux";
io-channels = <&adc 12>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
adc13mux: adc13mux {
compatible = "io-channel-mux";
io-channels = <&adc 13>;
#io-channel-cells = <1>;
io-channel-names = "parent";
mux-controls = <&gpioA0mux>;
channels = "s0", "s1";
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0mux 0>, <&adc0mux 1>,
<&adc1mux 0>, <&adc1mux 1>,
<&adc2mux 0>, <&adc2mux 1>,
<&adc3mux 0>, <&adc3mux 1>,
<&adc4mux 0>, <&adc4mux 1>,
<&adc5mux 0>, <&adc5mux 1>,
<&adc6mux 0>, <&adc6mux 1>,
<&adc7mux 0>, <&adc7mux 1>,
<&adc8mux 0>, <&adc8mux 1>,
<&adc9mux 0>, <&adc9mux 1>,
<&adc10mux 0>, <&adc10mux 1>,
<&adc11mux 0>, <&adc11mux 1>,
<&adc12mux 0>, <&adc12mux 1>,
<&adc13mux 0>, <&adc13mux 1>;
};
iio-hwmon-adc14 {
compatible = "iio-hwmon";
io-channels = <&adc 14>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
/* spi-max-frequency = <50000000>; */
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
/* spi-max-frequency = <100000000>; */
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_ncts1_default
&pinctrl_nrts1_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
};
/* The BMC's uart */
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
eeprom@50 {
compatible = "microchip,24c64", "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
inlet_mem2: tmp175@28 {
compatible = "ti,tmp175";
reg = <0x28>;
};
inlet_cpu: tmp175@29 {
compatible = "ti,tmp175";
reg = <0x29>;
};
inlet_mem1: tmp175@2a {
compatible = "ti,tmp175";
reg = <0x2a>;
};
outlet_cpu: tmp175@2b {
compatible = "ti,tmp175";
reg = <0x2b>;
};
outlet1: tmp175@2c {
compatible = "ti,tmp175";
reg = <0x2c>;
};
outlet2: tmp175@2d {
compatible = "ti,tmp175";
reg = <0x2d>;
};
};
&i2c4 {
status = "okay";
rtc@51 {
compatible = "nxp,pcf85063a";
reg = <0x51>;
};
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
psu@58 {
compatible = "pmbus";
reg = <0x58>;
};
psu@59 {
compatible = "pmbus";
reg = <0x59>;
};
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
fan@0 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@1 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@2 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@5 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
fan@6 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
};
fan@7 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
};
fan@8 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
};
fan@9 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
};
fan@10 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
};
fan@11 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
};
};
&vhub {
status = "okay";
};
&adc {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&gpio {
gpio-line-names =
/*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
/*B0-B7*/ "BMC_SELECT_EEPROM","","","",
"POWER_BUTTON","","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
/*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
"S1_DDR_SAVE","","",
/*G0-G7*/ "S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","",
"","",
/*H0-H7*/ "","","","","","","","",
/*I0-I7*/ "","","S1_BMC_SPECIAL_BOOT","","","","","",
/*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
"","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","UID_BUTTON","","",
/*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","","","RESET_BUTTON","","",
/*S0-S7*/ "","","","","","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
"S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
"S1_BMC_DDR_ADR","","","","",
/*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
"BMC_OCP_PG";
};

View File

@ -446,7 +446,11 @@
&i2c4 {
status = "okay";
ipmb0@10 {
compatible = "ipmb-dev";
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
};
&i2c5 {
@ -901,14 +905,14 @@
&gpio {
pin_gpio_i3 {
gpio-hog;
gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "NCSI_BMC_R_SEL";
};
pin_gpio_b6 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_LOW>;
gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "EN_NCSI_SWITCH_N";
};

View File

@ -0,0 +1,775 @@
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2020 IBM Corp.
/dts-v1/;
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Everest";
compatible = "ibm,everest-bmc", "aspeed,ast2600";
aliases {
i2c100 = &cfam0_i2c0;
i2c101 = &cfam0_i2c1;
i2c110 = &cfam0_i2c10;
i2c111 = &cfam0_i2c11;
i2c112 = &cfam0_i2c12;
i2c113 = &cfam0_i2c13;
i2c114 = &cfam0_i2c14;
i2c115 = &cfam0_i2c15;
i2c202 = &cfam1_i2c2;
i2c203 = &cfam1_i2c3;
i2c210 = &cfam1_i2c10;
i2c211 = &cfam1_i2c11;
i2c214 = &cfam1_i2c14;
i2c215 = &cfam1_i2c15;
i2c216 = &cfam1_i2c16;
i2c217 = &cfam1_i2c17;
i2c300 = &cfam2_i2c0;
i2c301 = &cfam2_i2c1;
i2c310 = &cfam2_i2c10;
i2c311 = &cfam2_i2c11;
i2c312 = &cfam2_i2c12;
i2c313 = &cfam2_i2c13;
i2c314 = &cfam2_i2c14;
i2c315 = &cfam2_i2c15;
i2c402 = &cfam3_i2c2;
i2c403 = &cfam3_i2c3;
i2c410 = &cfam3_i2c10;
i2c411 = &cfam3_i2c11;
i2c414 = &cfam3_i2c14;
i2c415 = &cfam3_i2c15;
i2c416 = &cfam3_i2c16;
i2c417 = &cfam3_i2c17;
serial4 = &uart5;
spi10 = &cfam0_spi0;
spi11 = &cfam0_spi1;
spi12 = &cfam0_spi2;
spi13 = &cfam0_spi3;
spi20 = &cfam1_spi0;
spi21 = &cfam1_spi1;
spi22 = &cfam1_spi2;
spi23 = &cfam1_spi3;
spi30 = &cfam2_spi0;
spi31 = &cfam2_spi1;
spi32 = &cfam2_spi2;
spi33 = &cfam2_spi3;
spi40 = &cfam3_spi0;
spi41 = &cfam3_spi1;
spi42 = &cfam3_spi2;
spi43 = &cfam3_spi3;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b8000000 {
no-map;
reg = <0xb8000000 0x04000000>; /* 64M */
};
/* 48MB region from the end of flash to start of vga memory */
ramoops@bc000000 {
compatible = "ramoops";
reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
record-size = <0x8000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
max-reason = <3>; /* KMSG_DUMP_EMERG */
};
/* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
reg = <0xbf000000 0x01000000>; /* 16M */
};
};
};
&ehci1 {
status = "okay";
};
&emmc_controller {
status = "okay";
};
&pinctrl_emmc_default {
bias-disable;
};
&emmc {
status = "okay";
};
&fsim0 {
status = "okay";
#address-cells = <2>;
#size-cells = <0>;
/*
* CFAM Reset is supposed to be active low but pass1 hardware is wired
* active high.
*/
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam0_i2c0: i2c-bus@0 {
reg = <0>; /* OMI01 */
};
cfam0_i2c1: i2c-bus@1 {
reg = <1>; /* OMI23 */
};
cfam0_i2c10: i2c-bus@a {
reg = <10>; /* OP3A */
};
cfam0_i2c11: i2c-bus@b {
reg = <11>; /* OP3B */
};
cfam0_i2c12: i2c-bus@c {
reg = <12>; /* OP4A */
};
cfam0_i2c13: i2c-bus@d {
reg = <13>; /* OP4B */
};
cfam0_i2c14: i2c-bus@e {
reg = <14>; /* OP5A */
};
cfam0_i2c15: i2c-bus@f {
reg = <15>; /* OP5B */
};
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam0_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi2: spi@40 {
reg = <0x40>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi3: spi@60 {
reg = <0x60>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ0: occ {
compatible = "ibm,p10-occ";
};
};
fsi_hub0: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
};
};
};
&fsi_hub0 {
cfam@1,0 {
reg = <1 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <1>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam1_i2c2: i2c-bus@2 {
reg = <2>; /* OMI45 */
};
cfam1_i2c3: i2c-bus@3 {
reg = <3>; /* OMI67 */
};
cfam1_i2c10: i2c-bus@a {
reg = <10>; /* OP3A */
};
cfam1_i2c11: i2c-bus@b {
reg = <11>; /* OP3B */
};
cfam1_i2c14: i2c-bus@e {
reg = <14>; /* OP5A */
};
cfam1_i2c15: i2c-bus@f {
reg = <15>; /* OP5B */
};
cfam1_i2c16: i2c-bus@10 {
reg = <16>; /* OP6A */
};
cfam1_i2c17: i2c-bus@11 {
reg = <17>; /* OP6B */
};
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam1_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi2: spi@40 {
reg = <0x40>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi3: spi@60 {
reg = <0x60>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ1: occ {
compatible = "ibm,p10-occ";
};
};
fsi_hub1: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
cfam@2,0 {
reg = <2 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <2>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam2_i2c0: i2c-bus@0 {
reg = <0>; /* OM01 */
};
cfam2_i2c1: i2c-bus@1 {
reg = <1>; /* OM23 */
};
cfam2_i2c10: i2c-bus@a {
reg = <10>; /* OP3A */
};
cfam2_i2c11: i2c-bus@b {
reg = <11>; /* OP3B */
};
cfam2_i2c12: i2c-bus@c {
reg = <12>; /* OP4A */
};
cfam2_i2c13: i2c-bus@d {
reg = <13>; /* OP4B */
};
cfam2_i2c14: i2c-bus@e {
reg = <14>; /* OP5A */
};
cfam2_i2c15: i2c-bus@f {
reg = <15>; /* OP5B */
};
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam2_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi2: spi@40 {
reg = <0x40>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi3: spi@60 {
reg = <0x60>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ2: occ {
compatible = "ibm,p10-occ";
};
};
fsi_hub2: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
cfam@3,0 {
reg = <3 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <3>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam3_i2c2: i2c-bus@2 {
reg = <2>; /* OM45 */
};
cfam3_i2c3: i2c-bus@3 {
reg = <3>; /* OM67 */
};
cfam3_i2c10: i2c-bus@a {
reg = <10>; /* OP3A */
};
cfam3_i2c11: i2c-bus@b {
reg = <11>; /* OP3B */
};
cfam3_i2c14: i2c-bus@e {
reg = <14>; /* OP5A */
};
cfam3_i2c15: i2c-bus@f {
reg = <15>; /* OP5B */
};
cfam3_i2c16: i2c-bus@10 {
reg = <16>; /* OP6A */
};
cfam3_i2c17: i2c-bus@11 {
reg = <17>; /* OP6B */
};
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam3_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam3_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam3_spi2: spi@40 {
reg = <0x40>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam3_spi3: spi@60 {
reg = <0x60>;
compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ3: occ {
compatible = "ibm,p10-occ";
};
};
fsi_hub3: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
/* Legacy OCC numbering (to get rid of when userspace is fixed) */
&fsi_occ0 {
reg = <1>;
};
&fsi_occ1 {
reg = <2>;
};
&fsi_occ2 {
reg = <3>;
};
&fsi_occ3 {
reg = <4>;
};
&ibt {
status = "okay";
};
&vuart1 {
status = "okay";
};
&vuart2 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
};
&kcs4 {
compatible = "openbmc,mctp-lpc";
status = "okay";
};
&mac2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii3_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
<&syscon ASPEED_CLK_MAC3RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&mac3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii4_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
<&syscon ASPEED_CLK_MAC4RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&xdma {
status = "okay";
memory-region = <&vga_memory>;
};

View File

@ -195,6 +195,7 @@
&emmc {
status = "okay";
clk-phase-mmc-hs200 = <180>, <180>;
};
&fsim0 {

View File

@ -204,6 +204,39 @@
};
&gpio {
gpio-line-names =
/*A0-A7*/ "","","","","","","","",
/*B0-B7*/ "","","front-psu","checkstop","cfam-reset","","","init-ok",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
/*F0-F7*/ "ps0-presence","ps1-presence","","","front-memory","","","",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/ "","","","","front-fan","","","",
/*I0-I7*/ "front-syshealth","front-syshot","mux-gpios","enable-gpios","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "","power","trans-gpios","","","","","",
/*S0-S7*/ "","","","","","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","identify",
/*AA0-AA7*/ "clock-gpios","","data-gpios","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&fmc {
status = "okay";
@ -756,12 +789,12 @@
status = "okay";
power-supply@58 {
compatible = "pmbus";
compatible = "inspur,ipsps1";
reg = <0x58>;
};
power-supply@59 {
compatible = "pmbus";
compatible = "inspur,ipsps1";
reg = <0x59>;
};
};

View File

@ -582,6 +582,11 @@
/* TMP275A */
/* TMP275A */
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;

View File

@ -0,0 +1,137 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 Super Micro Computer, Inc
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "X11SPI BMC";
compatible = "supermicro,x11spi-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@7f000000 {
no-map;
reg = <0x7f000000 0x01000000>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
};
&gpio {
status = "okay";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
};

View File

@ -375,6 +375,7 @@
compatible = "aspeed,ast2400-lpc-snoop";
reg = <0x10 0x8>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};

View File

@ -497,6 +497,7 @@
compatible = "aspeed,ast2500-lpc-snoop";
reg = <0x10 0x8>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};

View File

@ -524,6 +524,7 @@
compatible = "aspeed,ast2600-lpc-snoop";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};