mtd: spi-nor: Rename SR_TB to indicate the bit used

Each vendor uses different bits for SR_TB of flash.
To avoid ambiguity, rename SR_TB to indicate the bit used.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This commit is contained in:
Jungseung Lee 2019-12-02 15:35:05 +09:00 committed by Tudor Ambarus
parent 01916e0443
commit 52487e2168
No known key found for this signature in database
GPG Key ID: 4B554F47A58D14E9
2 changed files with 7 additions and 6 deletions

View File

@ -1771,7 +1771,7 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
} else {
pow = ((sr & mask) ^ mask) >> shift;
*len = mtd->size >> pow;
if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB)
if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB_BIT5)
*ofs = 0;
else
*ofs = mtd->size - *len;
@ -1903,13 +1903,13 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
if (!(val & mask))
return -EINVAL;
status_new = (status_old & ~mask & ~SR_TB) | val;
status_new = (status_old & ~mask & ~SR_TB_BIT5) | val;
/* Disallow further writes if WP pin is asserted */
status_new |= SR_SRWD;
if (!use_top)
status_new |= SR_TB;
status_new |= SR_TB_BIT5;
/* Don't bother if they're the same */
if (status_new == status_old)
@ -1987,14 +1987,14 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
return -EINVAL;
}
status_new = (status_old & ~mask & ~SR_TB) | val;
status_new = (status_old & ~mask & ~SR_TB_BIT5) | val;
/* Don't protect status register if we're fully unlocked */
if (lock_len == 0)
status_new &= ~SR_SRWD;
if (!use_top)
status_new |= SR_TB;
status_new |= SR_TB_BIT5;
/* Don't bother if they're the same */
if (status_new == status_old)

View File

@ -128,7 +128,8 @@
#define SR_BP0 BIT(2) /* Block protect 0 */
#define SR_BP1 BIT(3) /* Block protect 1 */
#define SR_BP2 BIT(4) /* Block protect 2 */
#define SR_TB BIT(5) /* Top/Bottom protect */
#define SR_TB_BIT5 BIT(5) /* Top/Bottom protect */
#define SR_TB_BIT6 BIT(6) /* Top/Bottom protect */
#define SR_SRWD BIT(7) /* SR write protect */
/* Spansion/Cypress specific status bits */
#define SR_E_ERR BIT(5)