forked from Minki/linux
net/mlx5: PPTB and PBMC register firmware command support
Add firmware command interface to read and write PPTB and PBMC registers. PPTB register enables mappings priority to a specific receive buffer. PBMC registers enables changing the receive buffer's configuration such as buffer size, xon/xoff thresholds, buffer's lossy property and buffer's shared property. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Reviewed-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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50b4a3c236
@ -127,3 +127,111 @@ u32 mlx5e_port_speed2linkmodes(u32 speed)
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return link_modes;
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}
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int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out)
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{
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int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
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void *in;
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int err;
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in = kzalloc(sz, GFP_KERNEL);
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if (!in)
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return -ENOMEM;
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MLX5_SET(pbmc_reg, in, local_port, 1);
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err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 0);
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kfree(in);
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return err;
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}
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int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in)
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{
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int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
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void *out;
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int err;
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out = kzalloc(sz, GFP_KERNEL);
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if (!out)
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return -ENOMEM;
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MLX5_SET(pbmc_reg, in, local_port, 1);
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err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 1);
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kfree(out);
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return err;
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}
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/* buffer[i]: buffer that priority i mapped to */
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int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer)
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{
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int sz = MLX5_ST_SZ_BYTES(pptb_reg);
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u32 prio_x_buff;
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void *out;
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void *in;
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int prio;
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int err;
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in = kzalloc(sz, GFP_KERNEL);
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out = kzalloc(sz, GFP_KERNEL);
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if (!in || !out) {
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err = -ENOMEM;
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goto out;
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}
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MLX5_SET(pptb_reg, in, local_port, 1);
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err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0);
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if (err)
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goto out;
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prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff);
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for (prio = 0; prio < 8; prio++) {
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buffer[prio] = (u8)(prio_x_buff >> (4 * prio)) & 0xF;
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mlx5_core_dbg(mdev, "prio %d, buffer %d\n", prio, buffer[prio]);
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}
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out:
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kfree(in);
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kfree(out);
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return err;
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}
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int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer)
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{
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int sz = MLX5_ST_SZ_BYTES(pptb_reg);
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u32 prio_x_buff;
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void *out;
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void *in;
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int prio;
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int err;
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in = kzalloc(sz, GFP_KERNEL);
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out = kzalloc(sz, GFP_KERNEL);
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if (!in || !out) {
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err = -ENOMEM;
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goto out;
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}
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/* First query the pptb register */
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MLX5_SET(pptb_reg, in, local_port, 1);
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err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0);
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if (err)
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goto out;
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memcpy(in, out, sz);
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MLX5_SET(pptb_reg, in, local_port, 1);
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/* Update the pm and prio_x_buff */
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MLX5_SET(pptb_reg, in, pm, 0xFF);
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prio_x_buff = 0;
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for (prio = 0; prio < 8; prio++)
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prio_x_buff |= (buffer[prio] << (4 * prio));
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MLX5_SET(pptb_reg, in, prio_x_buff, prio_x_buff);
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err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 1);
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out:
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kfree(in);
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kfree(out);
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return err;
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}
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@ -40,4 +40,9 @@ u32 mlx5e_port_ptys2speed(u32 eth_proto_oper);
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int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
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int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
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u32 mlx5e_port_speed2linkmodes(u32 speed);
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int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out);
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int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in);
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int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);
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int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);
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#endif
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@ -124,6 +124,8 @@ enum {
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MLX5_REG_PAOS = 0x5006,
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MLX5_REG_PFCC = 0x5007,
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MLX5_REG_PPCNT = 0x5008,
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MLX5_REG_PPTB = 0x500b,
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MLX5_REG_PBMC = 0x500c,
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MLX5_REG_PMAOS = 0x5012,
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MLX5_REG_PUDE = 0x5009,
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MLX5_REG_PMPE = 0x5010,
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@ -8788,6 +8788,41 @@ struct mlx5_ifc_qpts_reg_bits {
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u8 trust_state[0x3];
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};
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struct mlx5_ifc_pptb_reg_bits {
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u8 reserved_at_0[0x2];
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u8 mm[0x2];
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u8 reserved_at_4[0x4];
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u8 local_port[0x8];
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u8 reserved_at_10[0x6];
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u8 cm[0x1];
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u8 um[0x1];
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u8 pm[0x8];
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u8 prio_x_buff[0x20];
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u8 pm_msb[0x8];
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u8 reserved_at_48[0x10];
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u8 ctrl_buff[0x4];
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u8 untagged_buff[0x4];
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};
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struct mlx5_ifc_pbmc_reg_bits {
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u8 reserved_at_0[0x8];
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u8 local_port[0x8];
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u8 reserved_at_10[0x10];
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u8 xoff_timer_value[0x10];
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u8 xoff_refresh[0x10];
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u8 reserved_at_40[0x9];
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u8 fullness_threshold[0x7];
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u8 port_buffer_size[0x10];
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struct mlx5_ifc_bufferx_reg_bits buffer[10];
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u8 reserved_at_2e0[0x40];
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};
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struct mlx5_ifc_qtct_reg_bits {
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u8 reserved_at_0[0x8];
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u8 port_number[0x8];
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