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ARM: AM43xx: hwmod: add DSS hwmod data

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Add DSS hwmod data for AM43xx.

Signed-off-by: Sathya Prakash M R <sathyap@ti.com>
[tomi.valkeinen@ti.com: added missing dispc flags]
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Felipe Balbi <balbi@ti.com> # on linux-next 5f295cdf5c5d
[paul@pwsan.com: fixed build break on AM43xx-only config]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Sathya Prakash M R
2014-07-05 17:44:57 -06:00
committed by Paul Walmsley
parent a497c3ba1d
commit 509efaf3d1
5 changed files with 157 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

100
arch/arm/mach-omap2/omap_hwmod_43xx_data.c
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@@ -19,6 +19,8 @@
#include "omap_hwmod.h"
#include "omap_hwmod_33xx_43xx_common_data.h"
#include "prcm43xx.h"
#include "omap_hwmod_common_data.h"
/* IP blocks */
static struct omap_hwmod am43xx_l4_hs_hwmod = {
@@ -415,6 +417,72 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
},
};
/* dss */
static struct omap_hwmod am43xx_dss_core_hwmod = {
.name = "dss_core",
.class = &omap2_dss_hwmod_class,
.clkdm_name = "dss_clkdm",
.main_clk = "disp_clk",
.prcm = {
.omap4 = {
.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
.modulemode = MODULEMODE_SWCTRL,
},
},
};
/* dispc */
struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
.manager_count = 1,
.has_framedonetv_irq = 0
};
static struct omap_hwmod_class_sysconfig am43xx_dispc_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SOFTRESET |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_MIDLEMODE),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
.sysc_fields = &omap_hwmod_sysc_type1,
};
static struct omap_hwmod_class am43xx_dispc_hwmod_class = {
.name = "dispc",
.sysc = &am43xx_dispc_sysc,
};
static struct omap_hwmod am43xx_dss_dispc_hwmod = {
.name = "dss_dispc",
.class = &am43xx_dispc_hwmod_class,
.clkdm_name = "dss_clkdm",
.main_clk = "disp_clk",
.prcm = {
.omap4 = {
.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
},
},
.dev_attr = &am43xx_dss_dispc_dev_attr,
};
/* rfbi */
static struct omap_hwmod am43xx_dss_rfbi_hwmod = {
.name = "dss_rfbi",
.class = &omap2_rfbi_hwmod_class,
.clkdm_name = "dss_clkdm",
.main_clk = "disp_clk",
.prcm = {
.omap4 = {
.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
},
},
};
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = &am33xx_l3_main_hwmod,
@@ -654,6 +722,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
.master = &am43xx_dss_core_hwmod,
.slave = &am33xx_l3_main_hwmod,
.clk = "l3_gclk",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_dss_core_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_dss_dispc_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_dss_rfbi_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_wkup__synctimer,
&am43xx_l4_ls__timer8,
@@ -748,6 +844,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am43xx_l4_ls__ocp2scp1,
&am43xx_l3_s__usbotgss0,
&am43xx_l3_s__usbotgss1,
&am43xx_dss__l3_main,
&am43xx_l4_ls__dss,
&am43xx_l4_ls__dss_dispc,
&am43xx_l4_ls__dss_rfbi,
NULL,
};