forked from Minki/linux
scsi: qla2xxx: Utilize pci_alloc_irq_vectors/pci_free_irq_vectors calls.
Replaces the old pci_enable_msi[x]* and pci_disable_msi[x] calls. Signed-off-by: Michael Hernandez <michael.hernandez@cavium.com> Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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77ddb94a48
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4fa1834559
@ -2747,7 +2747,7 @@ struct qla_msix_entry {
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int have_irq;
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uint32_t vector;
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uint16_t entry;
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struct rsp_que *rsp;
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void *handle;
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struct irq_affinity_notify irq_notify;
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int cpuid;
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};
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@ -3025,52 +3025,17 @@ static struct qla_init_msix_entry qla83xx_msix_entries[3] = {
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{ "qla2xxx (atio_q)", qla83xx_msix_atio_q },
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};
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static void
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qla24xx_disable_msix(struct qla_hw_data *ha)
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{
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int i;
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struct qla_msix_entry *qentry;
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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for (i = 0; i < ha->msix_count; i++) {
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qentry = &ha->msix_entries[i];
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if (qentry->have_irq) {
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/* un-register irq cpu affinity notification */
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irq_set_affinity_notifier(qentry->vector, NULL);
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free_irq(qentry->vector, qentry->rsp);
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}
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}
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pci_disable_msix(ha->pdev);
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kfree(ha->msix_entries);
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ha->msix_entries = NULL;
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ha->flags.msix_enabled = 0;
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ql_dbg(ql_dbg_init, vha, 0x0042,
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"Disabled the MSI.\n");
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}
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static int
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qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
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{
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#define MIN_MSIX_COUNT 2
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#define ATIO_VECTOR 2
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int i, ret;
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struct msix_entry *entries;
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struct qla_msix_entry *qentry;
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
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GFP_KERNEL);
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if (!entries) {
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ql_log(ql_log_warn, vha, 0x00bc,
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"Failed to allocate memory for msix_entry.\n");
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return -ENOMEM;
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}
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for (i = 0; i < ha->msix_count; i++)
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entries[i].entry = i;
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ret = pci_enable_msix_range(ha->pdev,
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entries, MIN_MSIX_COUNT, ha->msix_count);
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ret = pci_alloc_irq_vectors(ha->pdev, MIN_MSIX_COUNT, ha->msix_count,
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PCI_IRQ_MSIX);
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if (ret < 0) {
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ql_log(ql_log_fatal, vha, 0x00c7,
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"MSI-X: Failed to enable support, "
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@ -3097,10 +3062,10 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
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for (i = 0; i < ha->msix_count; i++) {
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qentry = &ha->msix_entries[i];
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qentry->vector = entries[i].vector;
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qentry->entry = entries[i].entry;
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qentry->vector = pci_irq_vector(ha->pdev, i);
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qentry->entry = i;
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qentry->have_irq = 0;
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qentry->rsp = NULL;
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qentry->handle = NULL;
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qentry->irq_notify.notify = qla_irq_affinity_notify;
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qentry->irq_notify.release = qla_irq_affinity_release;
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qentry->cpuid = -1;
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@ -3109,7 +3074,7 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
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/* Enable MSI-X vectors for the base queue */
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for (i = 0; i < 2; i++) {
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qentry = &ha->msix_entries[i];
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qentry->rsp = rsp;
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qentry->handle = rsp;
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rsp->msix = qentry;
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if (IS_P3P_TYPE(ha))
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ret = request_irq(qentry->vector,
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@ -3142,7 +3107,7 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
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*/
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if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) {
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qentry = &ha->msix_entries[ATIO_VECTOR];
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qentry->rsp = rsp;
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qentry->handle = rsp;
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rsp->msix = qentry;
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ret = request_irq(qentry->vector,
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qla83xx_msix_entries[ATIO_VECTOR].handler,
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@ -3155,7 +3120,7 @@ msix_register_fail:
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ql_log(ql_log_fatal, vha, 0x00cb,
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"MSI-X: unable to register handler -- %x/%d.\n",
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qentry->vector, ret);
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qla24xx_disable_msix(ha);
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qla2x00_free_irqs(vha);
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ha->mqenable = 0;
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goto msix_out;
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}
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@ -3177,7 +3142,6 @@ msix_register_fail:
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ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
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msix_out:
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kfree(entries);
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return ret;
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}
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@ -3230,7 +3194,7 @@ skip_msix:
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!IS_QLA27XX(ha))
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goto skip_msi;
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ret = pci_enable_msi(ha->pdev);
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ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
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if (!ret) {
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ql_dbg(ql_dbg_init, vha, 0x0038,
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"MSI: Enabled.\n");
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@ -3275,6 +3239,8 @@ qla2x00_free_irqs(scsi_qla_host_t *vha)
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{
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struct qla_hw_data *ha = vha->hw;
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struct rsp_que *rsp;
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struct qla_msix_entry *qentry;
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int i;
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/*
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* We need to check that ha->rsp_q_map is valid in case we are called
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@ -3284,13 +3250,24 @@ qla2x00_free_irqs(scsi_qla_host_t *vha)
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return;
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rsp = ha->rsp_q_map[0];
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if (ha->flags.msix_enabled)
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qla24xx_disable_msix(ha);
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else if (ha->flags.msi_enabled) {
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free_irq(ha->pdev->irq, rsp);
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pci_disable_msi(ha->pdev);
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} else
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free_irq(ha->pdev->irq, rsp);
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if (ha->flags.msix_enabled) {
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for (i = 0; i < ha->msix_count; i++) {
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qentry = &ha->msix_entries[i];
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if (qentry->have_irq) {
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irq_set_affinity_notifier(qentry->vector, NULL);
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free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
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}
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}
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kfree(ha->msix_entries);
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ha->msix_entries = NULL;
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ha->flags.msix_enabled = 0;
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ql_dbg(ql_dbg_init, vha, 0x0042,
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"Disabled MSI-X.\n");
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} else {
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free_irq(pci_irq_vector(ha->pdev, 0), rsp);
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}
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pci_free_irq_vectors(ha->pdev);
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}
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@ -3310,7 +3287,7 @@ int qla25xx_request_irq(struct rsp_que *rsp)
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return ret;
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}
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msix->have_irq = 1;
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msix->rsp = rsp;
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msix->handle = rsp;
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return ret;
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}
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@ -3323,11 +3300,12 @@ static void qla_irq_affinity_notify(struct irq_affinity_notify *notify,
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container_of(notify, struct qla_msix_entry, irq_notify);
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struct qla_hw_data *ha;
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struct scsi_qla_host *base_vha;
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struct rsp_que *rsp = e->handle;
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/* user is recommended to set mask to just 1 cpu */
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e->cpuid = cpumask_first(mask);
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ha = e->rsp->hw;
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ha = rsp->hw;
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base_vha = pci_get_drvdata(ha->pdev);
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ql_dbg(ql_dbg_init, base_vha, 0xffff,
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@ -3351,7 +3329,8 @@ static void qla_irq_affinity_release(struct kref *ref)
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container_of(ref, struct irq_affinity_notify, kref);
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struct qla_msix_entry *e =
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container_of(notify, struct qla_msix_entry, irq_notify);
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struct scsi_qla_host *base_vha = pci_get_drvdata(e->rsp->hw->pdev);
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struct rsp_que *rsp = e->handle;
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struct scsi_qla_host *base_vha = pci_get_drvdata(rsp->hw->pdev);
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ql_dbg(ql_dbg_init, base_vha, 0xffff,
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"%s: host%ld: vector %d cpu %d \n", __func__,
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@ -542,7 +542,7 @@ qla25xx_free_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
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if (rsp->msix && rsp->msix->have_irq) {
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free_irq(rsp->msix->vector, rsp);
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rsp->msix->have_irq = 0;
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rsp->msix->rsp = NULL;
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rsp->msix->handle = NULL;
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}
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dma_free_coherent(&ha->pdev->dev, (rsp->length + 1) *
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sizeof(response_t), rsp->ring, rsp->dma);
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