From 4f6926e9fdf94208dc37da0cd17835328fa4dbba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Petr=20=C5=A0tetiar?= Date: Fri, 1 Apr 2016 14:41:47 +0200 Subject: [PATCH] ARM: dts: imx6: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adding reset-gpio-active-high boolean DT binding property, which we need to make PCIe working on Apalis SoMs and not break old DTBs. While at it, I've fixed comment and GPIO polarity. On Apalis SoMs the GPIO1_IO28 used to PCIe reset is not connected directly to PERST# PCIe signal, but it's ORed with RESETBMCU coming off the PMIC, and thus is inverted, active-high. Signed-off-by: Petr Štetiar Signed-off-by: Bjorn Helgaas --- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 2cba82d0d859..4b533cb5c82e 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -174,8 +174,9 @@ }; &pcie { - /* active-low meaning opposite of regular PERST# active-low polarity */ - reset-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>; + /* active-high meaning opposite of regular PERST# active-low polarity */ + reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; + reset-gpio-active-high; status = "okay"; };