forked from Minki/linux
Merge branch 'async-tx-fixes-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop
* 'async-tx-fixes-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop: raid5: fix 2 bugs in ops_complete_biofill async_tx: fix dma_wait_for_async_tx async_tx: usage documentation and developer notes (v2)
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Linus Torvalds
commit
4f33e21c92
219
Documentation/crypto/async-tx-api.txt
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219
Documentation/crypto/async-tx-api.txt
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Asynchronous Transfers/Transforms API
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1 INTRODUCTION
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2 GENEALOGY
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3 USAGE
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3.1 General format of the API
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3.2 Supported operations
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3.3 Descriptor management
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3.4 When does the operation execute?
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3.5 When does the operation complete?
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3.6 Constraints
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3.7 Example
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4 DRIVER DEVELOPER NOTES
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4.1 Conformance points
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4.2 "My application needs finer control of hardware channels"
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5 SOURCE
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---
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1 INTRODUCTION
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The async_tx API provides methods for describing a chain of asynchronous
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bulk memory transfers/transforms with support for inter-transactional
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dependencies. It is implemented as a dmaengine client that smooths over
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the details of different hardware offload engine implementations. Code
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that is written to the API can optimize for asynchronous operation and
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the API will fit the chain of operations to the available offload
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resources.
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2 GENEALOGY
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The API was initially designed to offload the memory copy and
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xor-parity-calculations of the md-raid5 driver using the offload engines
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present in the Intel(R) Xscale series of I/O processors. It also built
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on the 'dmaengine' layer developed for offloading memory copies in the
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network stack using Intel(R) I/OAT engines. The following design
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features surfaced as a result:
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1/ implicit synchronous path: users of the API do not need to know if
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the platform they are running on has offload capabilities. The
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operation will be offloaded when an engine is available and carried out
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in software otherwise.
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2/ cross channel dependency chains: the API allows a chain of dependent
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operations to be submitted, like xor->copy->xor in the raid5 case. The
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API automatically handles cases where the transition from one operation
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to another implies a hardware channel switch.
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3/ dmaengine extensions to support multiple clients and operation types
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beyond 'memcpy'
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3 USAGE
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3.1 General format of the API:
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struct dma_async_tx_descriptor *
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async_<operation>(<op specific parameters>,
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enum async_tx_flags flags,
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struct dma_async_tx_descriptor *dependency,
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dma_async_tx_callback callback_routine,
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void *callback_parameter);
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3.2 Supported operations:
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memcpy - memory copy between a source and a destination buffer
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memset - fill a destination buffer with a byte value
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xor - xor a series of source buffers and write the result to a
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destination buffer
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xor_zero_sum - xor a series of source buffers and set a flag if the
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result is zero. The implementation attempts to prevent
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writes to memory
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3.3 Descriptor management:
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The return value is non-NULL and points to a 'descriptor' when the operation
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has been queued to execute asynchronously. Descriptors are recycled
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resources, under control of the offload engine driver, to be reused as
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operations complete. When an application needs to submit a chain of
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operations it must guarantee that the descriptor is not automatically recycled
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before the dependency is submitted. This requires that all descriptors be
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acknowledged by the application before the offload engine driver is allowed to
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recycle (or free) the descriptor. A descriptor can be acked by one of the
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following methods:
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1/ setting the ASYNC_TX_ACK flag if no child operations are to be submitted
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2/ setting the ASYNC_TX_DEP_ACK flag to acknowledge the parent
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descriptor of a new operation.
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3/ calling async_tx_ack() on the descriptor.
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3.4 When does the operation execute?
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Operations do not immediately issue after return from the
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async_<operation> call. Offload engine drivers batch operations to
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improve performance by reducing the number of mmio cycles needed to
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manage the channel. Once a driver-specific threshold is met the driver
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automatically issues pending operations. An application can force this
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event by calling async_tx_issue_pending_all(). This operates on all
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channels since the application has no knowledge of channel to operation
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mapping.
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3.5 When does the operation complete?
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There are two methods for an application to learn about the completion
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of an operation.
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1/ Call dma_wait_for_async_tx(). This call causes the CPU to spin while
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it polls for the completion of the operation. It handles dependency
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chains and issuing pending operations.
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2/ Specify a completion callback. The callback routine runs in tasklet
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context if the offload engine driver supports interrupts, or it is
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called in application context if the operation is carried out
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synchronously in software. The callback can be set in the call to
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async_<operation>, or when the application needs to submit a chain of
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unknown length it can use the async_trigger_callback() routine to set a
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completion interrupt/callback at the end of the chain.
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3.6 Constraints:
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1/ Calls to async_<operation> are not permitted in IRQ context. Other
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contexts are permitted provided constraint #2 is not violated.
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2/ Completion callback routines cannot submit new operations. This
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results in recursion in the synchronous case and spin_locks being
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acquired twice in the asynchronous case.
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3.7 Example:
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Perform a xor->copy->xor operation where each operation depends on the
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result from the previous operation:
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void complete_xor_copy_xor(void *param)
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{
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printk("complete\n");
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}
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int run_xor_copy_xor(struct page **xor_srcs,
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int xor_src_cnt,
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struct page *xor_dest,
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size_t xor_len,
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struct page *copy_src,
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struct page *copy_dest,
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size_t copy_len)
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{
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struct dma_async_tx_descriptor *tx;
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,
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ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL);
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tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len,
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ASYNC_TX_DEP_ACK, tx, NULL, NULL);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,
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ASYNC_TX_XOR_DROP_DST | ASYNC_TX_DEP_ACK | ASYNC_TX_ACK,
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tx, complete_xor_copy_xor, NULL);
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async_tx_issue_pending_all();
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}
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See include/linux/async_tx.h for more information on the flags. See the
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ops_run_* and ops_complete_* routines in drivers/md/raid5.c for more
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implementation examples.
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4 DRIVER DEVELOPMENT NOTES
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4.1 Conformance points:
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There are a few conformance points required in dmaengine drivers to
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accommodate assumptions made by applications using the async_tx API:
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1/ Completion callbacks are expected to happen in tasklet context
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2/ dma_async_tx_descriptor fields are never manipulated in IRQ context
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3/ Use async_tx_run_dependencies() in the descriptor clean up path to
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handle submission of dependent operations
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4.2 "My application needs finer control of hardware channels"
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This requirement seems to arise from cases where a DMA engine driver is
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trying to support device-to-memory DMA. The dmaengine and async_tx
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implementations were designed for offloading memory-to-memory
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operations; however, there are some capabilities of the dmaengine layer
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that can be used for platform-specific channel management.
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Platform-specific constraints can be handled by registering the
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application as a 'dma_client' and implementing a 'dma_event_callback' to
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apply a filter to the available channels in the system. Before showing
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how to implement a custom dma_event callback some background of
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dmaengine's client support is required.
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The following routines in dmaengine support multiple clients requesting
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use of a channel:
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- dma_async_client_register(struct dma_client *client)
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- dma_async_client_chan_request(struct dma_client *client)
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dma_async_client_register takes a pointer to an initialized dma_client
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structure. It expects that the 'event_callback' and 'cap_mask' fields
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are already initialized.
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dma_async_client_chan_request triggers dmaengine to notify the client of
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all channels that satisfy the capability mask. It is up to the client's
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event_callback routine to track how many channels the client needs and
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how many it is currently using. The dma_event_callback routine returns a
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dma_state_client code to let dmaengine know the status of the
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allocation.
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Below is the example of how to extend this functionality for
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platform-specific filtering of the available channels beyond the
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standard capability mask:
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static enum dma_state_client
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my_dma_client_callback(struct dma_client *client,
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struct dma_chan *chan, enum dma_state state)
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{
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struct dma_device *dma_dev;
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struct my_platform_specific_dma *plat_dma_dev;
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dma_dev = chan->device;
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plat_dma_dev = container_of(dma_dev,
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struct my_platform_specific_dma,
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dma_dev);
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if (!plat_dma_dev->platform_specific_capability)
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return DMA_DUP;
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. . .
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}
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5 SOURCE
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include/linux/dmaengine.h: core header file for DMA drivers and clients
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drivers/dma/dmaengine.c: offload engine channel management routines
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drivers/dma/: location for offload engine drivers
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include/linux/async_tx.h: core header file for the async_tx api
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crypto/async_tx/async_tx.c: async_tx interface to dmaengine and common code
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crypto/async_tx/async_memcpy.c: copy offload
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crypto/async_tx/async_memset.c: memory fill offload
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crypto/async_tx/async_xor.c: xor and xor zero sum offload
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@ -80,6 +80,7 @@ dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
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{
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enum dma_status status;
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struct dma_async_tx_descriptor *iter;
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struct dma_async_tx_descriptor *parent;
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if (!tx)
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return DMA_SUCCESS;
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@ -87,8 +88,15 @@ dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
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/* poll through the dependency chain, return when tx is complete */
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do {
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iter = tx;
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while (iter->cookie == -EBUSY)
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iter = iter->parent;
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/* find the root of the unsubmitted dependency chain */
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while (iter->cookie == -EBUSY) {
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parent = iter->parent;
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if (parent && parent->cookie == -EBUSY)
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iter = iter->parent;
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else
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break;
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}
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status = dma_sync_wait(iter->chan, iter->cookie);
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} while (status == DMA_IN_PROGRESS || (iter != tx));
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@ -514,7 +514,7 @@ static void ops_complete_biofill(void *stripe_head_ref)
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struct stripe_head *sh = stripe_head_ref;
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struct bio *return_bi = NULL;
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raid5_conf_t *conf = sh->raid_conf;
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int i, more_to_read = 0;
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int i;
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pr_debug("%s: stripe %llu\n", __FUNCTION__,
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(unsigned long long)sh->sector);
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@ -522,16 +522,14 @@ static void ops_complete_biofill(void *stripe_head_ref)
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/* clear completed biofills */
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for (i = sh->disks; i--; ) {
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struct r5dev *dev = &sh->dev[i];
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/* check if this stripe has new incoming reads */
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if (dev->toread)
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more_to_read++;
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/* acknowledge completion of a biofill operation */
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/* and check if we need to reply to a read request
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*/
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if (test_bit(R5_Wantfill, &dev->flags) && !dev->toread) {
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/* and check if we need to reply to a read request,
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* new R5_Wantfill requests are held off until
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* !test_bit(STRIPE_OP_BIOFILL, &sh->ops.pending)
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*/
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if (test_and_clear_bit(R5_Wantfill, &dev->flags)) {
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struct bio *rbi, *rbi2;
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clear_bit(R5_Wantfill, &dev->flags);
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/* The access to dev->read is outside of the
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* spin_lock_irq(&conf->device_lock), but is protected
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@ -558,8 +556,7 @@ static void ops_complete_biofill(void *stripe_head_ref)
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return_io(return_bi);
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if (more_to_read)
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set_bit(STRIPE_HANDLE, &sh->state);
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set_bit(STRIPE_HANDLE, &sh->state);
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release_stripe(sh);
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}
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