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fec: refactor init function

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fec_enet_init() does the hardware initialisation and then calls
fec_restart() which does the same initialisation again, so we
can safely remove the initialisation from fec_enet_init().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sascha Hauer 2009-04-15 01:32:20 +00:00 committed by David S. Miller
parent 4e8318368a
commit 4f1ceb4b46
1 changed files with 4 additions and 35 deletions
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39
drivers/net/fec.c
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@ -1615,10 +1615,6 @@ int __init fec_enet_init(struct net_device *dev, int index)
fep->hwp = (void __iomem *)dev->base_addr; fep->hwp = (void __iomem *)dev->base_addr;
fep->netdev = dev; fep->netdev = dev;
/* Whack a reset. We should wait for this. */
writel(1, fep->hwp + FEC_ECNTRL);
udelay(10);
/* Set the Ethernet address */ /* Set the Ethernet address */
#ifdef CONFIG_M5272 #ifdef CONFIG_M5272
fec_get_mac(dev); fec_get_mac(dev);
@ -1640,11 +1636,6 @@ int __init fec_enet_init(struct net_device *dev, int index)
fep->rx_bd_base = cbd_base; fep->rx_bd_base = cbd_base;
fep->tx_bd_base = cbd_base + RX_RING_SIZE; fep->tx_bd_base = cbd_base + RX_RING_SIZE;
fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
fep->cur_rx = fep->rx_bd_base;
fep->skb_cur = fep->skb_dirty = 0;
/* Initialize the receive buffer descriptors. */ /* Initialize the receive buffer descriptors. */
bdp = fep->rx_bd_base; bdp = fep->rx_bd_base;
for (i=0; i<FEC_ENET_RX_PAGES; i++) { for (i=0; i<FEC_ENET_RX_PAGES; i++) {
@ -1688,25 +1679,9 @@ int __init fec_enet_init(struct net_device *dev, int index)
bdp--; bdp--;
bdp->cbd_sc |= BD_SC_WRAP; bdp->cbd_sc |= BD_SC_WRAP;
/* Set receive and transmit descriptor base */
writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
fep->hwp + FEC_X_DES_START);
#ifdef HAVE_mii_link_interrupt #ifdef HAVE_mii_link_interrupt
fec_request_mii_intr(dev); fec_request_mii_intr(dev);
#endif #endif
writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
writel(2, fep->hwp + FEC_ECNTRL);
writel(0, fep->hwp + FEC_R_DES_ACTIVE);
#ifndef CONFIG_M5272
writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
#endif
/* The FEC Ethernet specific entries in the device structure */ /* The FEC Ethernet specific entries in the device structure */
dev->open = fec_enet_open; dev->open = fec_enet_open;
dev->hard_start_xmit = fec_enet_start_xmit; dev->hard_start_xmit = fec_enet_start_xmit;
@ -1719,21 +1694,11 @@ int __init fec_enet_init(struct net_device *dev, int index)
mii_cmds[i].mii_next = &mii_cmds[i+1]; mii_cmds[i].mii_next = &mii_cmds[i+1];
mii_free = mii_cmds; mii_free = mii_cmds;
/* setup MII interface */
writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
writel(0, fep->hwp + FEC_X_CNTRL);
/* Set MII speed to 2.5 MHz */ /* Set MII speed to 2.5 MHz */
fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999) fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999)
/ 2500000) / 2) & 0x3F) << 1; / 2500000) / 2) & 0x3F) << 1;
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
fec_restart(dev, 0); fec_restart(dev, 0);
/* Clear and enable interrupts */
writel(0xffc00000, fep->hwp + FEC_IEVENT);
writel(FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII,
fep->hwp + FEC_IMASK);
/* Queue up command to detect the PHY and initialize the /* Queue up command to detect the PHY and initialize the
* remainder of the interface. * remainder of the interface.
*/ */
@ -1768,6 +1733,10 @@ fec_restart(struct net_device *dev, int duplex)
/* Reset all multicast. */ /* Reset all multicast. */
writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW); writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
#ifndef CONFIG_M5272
writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
#endif
/* Set maximum receive buffer size. */ /* Set maximum receive buffer size. */
writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE); writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);