forked from Minki/linux
firmware: qcom: scm: Expose secure IO service
The secure IO service provides operations for reading and writing secure memory from non-secure mode, expose this API through SCM. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -596,3 +596,21 @@ int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size,
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{
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return -ENODEV;
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}
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int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
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unsigned int *val)
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{
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int ret;
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ret = qcom_scm_call_atomic1(QCOM_SCM_SVC_IO, QCOM_SCM_IO_READ, addr);
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if (ret >= 0)
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*val = ret;
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return ret < 0 ? ret : 0;
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}
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int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
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{
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return qcom_scm_call_atomic2(QCOM_SCM_SVC_IO, QCOM_SCM_IO_WRITE,
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addr, val);
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}
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@ -439,3 +439,34 @@ int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size,
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return ret;
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}
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int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
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unsigned int *val)
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{
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struct qcom_scm_desc desc = {0};
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struct arm_smccc_res res;
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int ret;
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desc.args[0] = addr;
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desc.arginfo = QCOM_SCM_ARGS(1);
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ret = qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_READ,
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&desc, &res);
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if (ret >= 0)
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*val = res.a1;
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return ret < 0 ? ret : 0;
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}
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int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
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{
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struct qcom_scm_desc desc = {0};
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struct arm_smccc_res res;
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desc.args[0] = addr;
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desc.args[1] = val;
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desc.arginfo = QCOM_SCM_ARGS(2);
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return qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_WRITE,
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&desc, &res);
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}
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@ -333,6 +333,18 @@ int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
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}
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EXPORT_SYMBOL(qcom_scm_iommu_secure_ptbl_init);
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int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
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{
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return __qcom_scm_io_readl(__scm->dev, addr, val);
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}
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EXPORT_SYMBOL(qcom_scm_io_readl);
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int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
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{
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return __qcom_scm_io_writel(__scm->dev, addr, val);
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}
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EXPORT_SYMBOL(qcom_scm_io_writel);
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/**
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* qcom_scm_is_available() - Checks if SCM is available
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*/
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@ -30,6 +30,12 @@ extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
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#define QCOM_SCM_CMD_CORE_HOTPLUGGED 0x10
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extern void __qcom_scm_cpu_power_down(u32 flags);
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#define QCOM_SCM_SVC_IO 0x5
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#define QCOM_SCM_IO_READ 0x1
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#define QCOM_SCM_IO_WRITE 0x2
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extern int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, unsigned int *val);
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extern int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val);
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#define QCOM_SCM_SVC_INFO 0x6
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#define QCOM_IS_CALL_AVAIL_CMD 0x1
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extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
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@ -43,6 +43,8 @@ extern int qcom_scm_set_remote_state(u32 state, u32 id);
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extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
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extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
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extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
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extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
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extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
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#else
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static inline
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int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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@ -73,5 +75,7 @@ qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; }
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static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; }
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static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) { return -ENODEV; }
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static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) { return -ENODEV; }
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static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) { return -ENODEV; }
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static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) { return -ENODEV; }
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#endif
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#endif
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