forked from Minki/linux
memory: mtk-smi: Add enable IOMMU SMC command for MM master
For concerns about security, the register to enable/disable IOMMU of SMI LARB should only be configured in secure world. Thus, we add some SMC command for multimedia master to enable/disable MM IOMMU in ATF by setting the register of SMI LARB. This function is prepared for MT8188. Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-4-chengci.xu@mediatek.com
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@ -3,6 +3,7 @@
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* Copyright (c) 2015-2016 MediaTek Inc.
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* Copyright (c) 2015-2016 MediaTek Inc.
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* Author: Yong Wu <yong.wu@mediatek.com>
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* Author: Yong Wu <yong.wu@mediatek.com>
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*/
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*/
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#include <linux/arm-smccc.h>
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/device.h>
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@ -14,6 +15,7 @@
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#include <linux/of_platform.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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#include <linux/soc/mediatek/mtk_sip_svc.h>
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#include <soc/mediatek/smi.h>
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#include <soc/mediatek/smi.h>
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#include <dt-bindings/memory/mt2701-larb-port.h>
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#include <dt-bindings/memory/mt2701-larb-port.h>
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#include <dt-bindings/memory/mtk-memory-port.h>
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#include <dt-bindings/memory/mtk-memory-port.h>
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@ -89,6 +91,7 @@
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#define MTK_SMI_FLAG_THRT_UPDATE BIT(0)
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#define MTK_SMI_FLAG_THRT_UPDATE BIT(0)
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#define MTK_SMI_FLAG_SW_FLAG BIT(1)
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#define MTK_SMI_FLAG_SW_FLAG BIT(1)
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#define MTK_SMI_FLAG_SLEEP_CTL BIT(2)
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#define MTK_SMI_FLAG_SLEEP_CTL BIT(2)
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#define MTK_SMI_FLAG_CFG_PORT_SEC_CTL BIT(3)
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#define MTK_SMI_CAPS(flags, _x) (!!((flags) & (_x)))
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#define MTK_SMI_CAPS(flags, _x) (!!((flags) & (_x)))
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struct mtk_smi_reg_pair {
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struct mtk_smi_reg_pair {
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@ -238,6 +241,7 @@ static int mtk_smi_larb_config_port_gen2_general(struct device *dev)
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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u32 reg, flags_general = larb->larb_gen->flags_general;
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u32 reg, flags_general = larb->larb_gen->flags_general;
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const u8 *larbostd = larb->larb_gen->ostd ? larb->larb_gen->ostd[larb->larbid] : NULL;
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const u8 *larbostd = larb->larb_gen->ostd ? larb->larb_gen->ostd[larb->larbid] : NULL;
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struct arm_smccc_res res;
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int i;
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int i;
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if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
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if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
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@ -256,6 +260,20 @@ static int mtk_smi_larb_config_port_gen2_general(struct device *dev)
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for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
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for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
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writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
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writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
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/*
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* When mmu_en bits are in security world, the bank_sel still is in the
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* LARB_NONSEC_CON below. And the mmu_en bits of LARB_NONSEC_CON have no
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* effect in this case.
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*/
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if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_CFG_PORT_SEC_CTL)) {
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arm_smccc_smc(MTK_SIP_KERNEL_IOMMU_CONTROL, IOMMU_ATF_CMD_CONFIG_SMI_LARB,
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larb->larbid, *larb->mmu, 0, 0, 0, 0, &res);
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if (res.a0 != 0) {
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dev_err(dev, "Enable iommu fail, ret %ld\n", res.a0);
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return -EINVAL;
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}
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}
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for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
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for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
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reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
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reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
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reg |= F_MMU_EN;
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reg |= F_MMU_EN;
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@ -22,4 +22,7 @@
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \
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ARM_SMCCC_OWNER_SIP, fn_id)
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ARM_SMCCC_OWNER_SIP, fn_id)
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/* IOMMU related SMC call */
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#define MTK_SIP_KERNEL_IOMMU_CONTROL MTK_SIP_SMC_CMD(0x514)
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#endif
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#endif
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@ -11,6 +11,11 @@
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#if IS_ENABLED(CONFIG_MTK_SMI)
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#if IS_ENABLED(CONFIG_MTK_SMI)
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enum iommu_atf_cmd {
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IOMMU_ATF_CMD_CONFIG_SMI_LARB, /* For mm master to en/disable iommu */
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IOMMU_ATF_CMD_MAX,
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};
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#define MTK_SMI_MMU_EN(port) BIT(port)
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#define MTK_SMI_MMU_EN(port) BIT(port)
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struct mtk_smi_larb_iommu {
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struct mtk_smi_larb_iommu {
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