gpu: ipu-v3: Allow negative offsets for interlaced scanning

The IPU also supports interlaced buffers that start with the bottom field.
To achieve this, the the base address EBA has to be increased by a stride
length and the interlace offset ILO has to be set to the negative stride.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
This commit is contained in:
Philipp Zabel 2018-06-01 15:13:16 +02:00
parent 1e6a1495c6
commit 4e3c5d7e05

View File

@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset);
void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)
{ {
u32 ilo, sly;
if (stride < 0) {
stride = -stride;
ilo = 0x100000 - (stride / 8);
} else {
ilo = stride / 8;
}
sly = (stride * 2) - 1;
ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo);
ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly);
}; };
EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);