Merge branch 'sched/urgent'; commit 'v2.6.28' into sched/core
This commit is contained in:
@@ -172,7 +172,7 @@
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/* Defaults for debug_level, debug and normal */
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#define ACPI_DEBUG_DEFAULT (ACPI_LV_INIT | ACPI_LV_DEBUG_OBJECT)
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#define ACPI_DEBUG_DEFAULT (ACPI_LV_INFO)
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#define ACPI_NORMAL_DEFAULT (ACPI_LV_INIT | ACPI_LV_DEBUG_OBJECT)
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#define ACPI_DEBUG_ALL (ACPI_LV_AML_DISASSEMBLE | ACPI_LV_ALL_EXCEPTIONS | ACPI_LV_ALL)
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@@ -141,6 +141,10 @@ static inline void *acpi_os_acquire_object(acpi_cache_t * cache)
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/*
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* We need to show where it is safe to preempt execution of ACPICA
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*/
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#define ACPI_PREEMPTION_POINT() cond_resched()
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#define ACPI_PREEMPTION_POINT() \
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do { \
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if (!irqs_disabled()) \
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cond_resched(); \
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} while (0)
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#endif /* __ACLINUX_H__ */
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@@ -319,6 +319,7 @@ enum
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{
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NAPI_STATE_SCHED, /* Poll is scheduled */
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NAPI_STATE_DISABLE, /* Disable pending */
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NAPI_STATE_NPSVC, /* Netpoll - don't dequeue from poll_list */
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};
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extern void __napi_schedule(struct napi_struct *n);
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@@ -1497,6 +1498,12 @@ static inline void netif_rx_complete(struct net_device *dev,
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{
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unsigned long flags;
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/*
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* don't let napi dequeue from the cpu poll list
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* just in case its running on a different cpu
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*/
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if (unlikely(test_bit(NAPI_STATE_NPSVC, &napi->state)))
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return;
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local_irq_save(flags);
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__netif_rx_complete(dev, napi);
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local_irq_restore(flags);
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@@ -141,6 +141,7 @@ enum ctattr_protonat {
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#define CTA_PROTONAT_MAX (__CTA_PROTONAT_MAX - 1)
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enum ctattr_natseq {
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CTA_NAT_SEQ_UNSPEC,
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CTA_NAT_SEQ_CORRECTION_POS,
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CTA_NAT_SEQ_OFFSET_BEFORE,
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CTA_NAT_SEQ_OFFSET_AFTER,
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@@ -146,6 +146,8 @@ static inline void smp_send_reschedule(int cpu) { }
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})
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#define smp_call_function_mask(mask, func, info, wait) \
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(up_smp_call_function(func, info))
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#define smp_call_function_many(mask, func, info, wait) \
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(up_smp_call_function(func, info))
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static inline void init_call_single_data(void)
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{
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}
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@@ -158,8 +158,12 @@ struct usb_ctrlrequest {
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* (rarely) accepted by SET_DESCRIPTOR.
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*
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* Note that all multi-byte values here are encoded in little endian
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* byte order "on the wire". But when exposed through Linux-USB APIs,
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* they've been converted to cpu byte order.
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* byte order "on the wire". Within the kernel and when exposed
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* through the Linux-USB APIs, they are not converted to cpu byte
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* order; it is the responsibility of the client code to do this.
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* The single exception is when device and configuration descriptors (but
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* not other descriptors) are read from usbfs (i.e. /proc/bus/usb/BBB/DDD);
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* in this case the fields are converted to host endianness by the kernel.
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*/
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/*
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@@ -135,9 +135,11 @@ struct dongle_reg {
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/*
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* Per-packet information we need to hide inside sk_buff
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* (must not exceed 48 bytes, check with struct sk_buff)
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* (must not exceed 48 bytes, check with struct sk_buff)
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* The default_qdisc_pad field is a temporary hack.
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*/
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struct irda_skb_cb {
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unsigned int default_qdisc_pad;
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magic_t magic; /* Be sure that we can trust the information */
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__u32 next_speed; /* The Speed to be set *after* this frame */
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__u16 mtt; /* Minimum turn around time */
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@@ -525,9 +525,6 @@
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#define CRTC_DISPLAY_DIS (1 << 10)
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#define CRTC_CRT_ON (1 << 15)
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/* DSTCACHE_MODE bits constants */
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#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8)
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#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17)
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/* DSTCACHE_CTLSTAT bit constants */
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#define RB2D_DC_FLUSH_2D (1 << 0)
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@@ -869,10 +866,15 @@
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#define GMC_DST_16BPP_YVYU422 0x00000c00
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#define GMC_DST_32BPP_AYUV444 0x00000e00
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#define GMC_DST_16BPP_ARGB4444 0x00000f00
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#define GMC_SRC_MONO 0x00000000
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#define GMC_SRC_MONO_LBKGD 0x00001000
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#define GMC_SRC_DSTCOLOR 0x00003000
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#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000
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#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000
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#define GMC_DP_CONVERSION_TEMP_9300 0x00008000
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#define GMC_DP_CONVERSION_TEMP_6500 0x00000000
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#define GMC_DP_SRC_RECT 0x02000000
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#define GMC_DP_SRC_HOST 0x03000000
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#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000
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#define GMC_3D_FCN_EN_CLR 0x00000000
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#define GMC_3D_FCN_EN_SET 0x08000000
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@@ -883,9 +885,6 @@
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#define GMC_WRITE_MASK_LEAVE 0x00000000
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#define GMC_WRITE_MASK_SET 0x40000000
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#define GMC_CLR_CMP_CNTL_DIS (1 << 28)
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#define GMC_SRC_DATATYPE_MASK (3 << 12)
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#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12)
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#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12)
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#define GMC_SRC_DATATYPE_COLOR (3 << 12)
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#define ROP3_S 0x00cc0000
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#define ROP3_SRCCOPY 0x00cc0000
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@@ -894,7 +893,6 @@
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#define DP_SRC_SOURCE_MASK (7 << 24)
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#define GMC_BRUSH_NONE (15 << 4)
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#define DP_SRC_SOURCE_MEMORY (2 << 24)
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#define DP_SRC_SOURCE_HOST_DATA (3 << 24)
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#define GMC_BRUSH_SOLIDCOLOR 0x000000d0
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/* DP_MIX bit constants */
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@@ -980,12 +978,6 @@
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#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25)
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#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26)
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/* RBBM_GUICNTL constants */
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#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0)
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#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0)
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#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0)
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#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0)
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/* masks */
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#define CONFIG_MEMSIZE_MASK 0x1f000000
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