forked from Minki/linux
b43: N-PHY: reorder functions: collect RSSI selects
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
8be89535e6
commit
4d9f46ba92
@ -912,6 +912,231 @@ static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
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b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
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}
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/**************************************************
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* RSSI
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**************************************************/
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
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static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
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s8 offset, u8 core, u8 rail,
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enum b43_nphy_rssi_type type)
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{
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u16 tmp;
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bool core1or5 = (core == 1) || (core == 5);
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bool core2or5 = (core == 2) || (core == 5);
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offset = clamp_val(offset, -32, 31);
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tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
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}
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static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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{
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u8 i;
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u16 reg, val;
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if (code == 0) {
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
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b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
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b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
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b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
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b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
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} else {
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for (i = 0; i < 2; i++) {
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if ((code == 1 && i == 1) || (code == 2 && !i))
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continue;
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reg = (i == 0) ?
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B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
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b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
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if (type < 3) {
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reg = (i == 0) ?
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B43_NPHY_AFECTL_C1 :
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B43_NPHY_AFECTL_C2;
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b43_phy_maskset(dev, reg, 0xFCFF, 0);
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reg = (i == 0) ?
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B43_NPHY_RFCTL_LUT_TRSW_UP1 :
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B43_NPHY_RFCTL_LUT_TRSW_UP2;
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b43_phy_maskset(dev, reg, 0xFFC3, 0);
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if (type == 0)
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val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
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else if (type == 1)
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val = 16;
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else
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val = 32;
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b43_phy_set(dev, reg, val);
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reg = (i == 0) ?
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B43_NPHY_TXF_40CO_B1S0 :
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B43_NPHY_TXF_40CO_B32S1;
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b43_phy_set(dev, reg, 0x0020);
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} else {
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if (type == 6)
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val = 0x0100;
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else if (type == 3)
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val = 0x0200;
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else
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val = 0x0300;
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reg = (i == 0) ?
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B43_NPHY_AFECTL_C1 :
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B43_NPHY_AFECTL_C2;
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b43_phy_maskset(dev, reg, 0xFCFF, val);
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b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
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if (type != 3 && type != 6) {
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enum ieee80211_band band =
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b43_current_band(dev->wl);
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if (b43_nphy_ipa(dev))
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val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
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else
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val = 0x11;
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reg = (i == 0) ? 0x2000 : 0x3000;
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reg |= B2055_PADDRV;
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b43_radio_write16(dev, reg, val);
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reg = (i == 0) ?
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B43_NPHY_AFECTL_OVER1 :
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B43_NPHY_AFECTL_OVER;
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b43_phy_set(dev, reg, 0x0200);
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}
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}
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}
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}
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}
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static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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{
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u16 val;
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if (type < 3)
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val = 0;
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else if (type == 6)
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val = 1;
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else if (type == 3)
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val = 2;
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else
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val = 3;
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val = (val << 12) | (val << 14);
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b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
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b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
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if (type < 3) {
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b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
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(type + 1) << 4);
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b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
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(type + 1) << 4);
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}
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if (code == 0) {
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x3000);
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if (type < 3) {
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b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
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~(B43_NPHY_RFCTL_CMD_RXEN |
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B43_NPHY_RFCTL_CMD_CORESEL));
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b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
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~(0x1 << 12 |
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0x1 << 5 |
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0x1 << 1 |
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0x1));
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b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
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~B43_NPHY_RFCTL_CMD_START);
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udelay(20);
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b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
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}
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} else {
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x3000);
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if (type < 3) {
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b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
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~(B43_NPHY_RFCTL_CMD_RXEN |
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B43_NPHY_RFCTL_CMD_CORESEL),
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(B43_NPHY_RFCTL_CMD_RXEN |
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code << B43_NPHY_RFCTL_CMD_CORESEL_SHIFT));
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b43_phy_set(dev, B43_NPHY_RFCTL_OVER,
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(0x1 << 12 |
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0x1 << 5 |
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0x1 << 1 |
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0x1));
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b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
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B43_NPHY_RFCTL_CMD_START);
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udelay(20);
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b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
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}
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
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static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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{
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if (dev->phy.rev >= 3)
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b43_nphy_rev3_rssi_select(dev, code, type);
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else
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b43_nphy_rev2_rssi_select(dev, code, type);
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}
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/**************************************************
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* Others
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**************************************************/
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@ -2311,227 +2536,6 @@ static void b43_nphy_bphy_init(struct b43_wldev *dev)
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b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
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static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
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s8 offset, u8 core, u8 rail,
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enum b43_nphy_rssi_type type)
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{
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u16 tmp;
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bool core1or5 = (core == 1) || (core == 5);
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bool core2or5 = (core == 2) || (core == 5);
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offset = clamp_val(offset, -32, 31);
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tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
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if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
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if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
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if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
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if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_I))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
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if (core1or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
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if (core2or5 && (type == B43_NPHY_RSSI_TSSI_Q))
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b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
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}
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static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
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{
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u16 val;
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if (type < 3)
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val = 0;
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else if (type == 6)
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val = 1;
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else if (type == 3)
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val = 2;
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else
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val = 3;
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val = (val << 12) | (val << 14);
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b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
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b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
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if (type < 3) {
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b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
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(type + 1) << 4);
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b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
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(type + 1) << 4);
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}
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if (code == 0) {
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x3000);
|
||||
if (type < 3) {
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
|
||||
~(B43_NPHY_RFCTL_CMD_RXEN |
|
||||
B43_NPHY_RFCTL_CMD_CORESEL));
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
|
||||
~(0x1 << 12 |
|
||||
0x1 << 5 |
|
||||
0x1 << 1 |
|
||||
0x1));
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
|
||||
~B43_NPHY_RFCTL_CMD_START);
|
||||
udelay(20);
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
|
||||
}
|
||||
} else {
|
||||
b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x3000);
|
||||
if (type < 3) {
|
||||
b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
|
||||
~(B43_NPHY_RFCTL_CMD_RXEN |
|
||||
B43_NPHY_RFCTL_CMD_CORESEL),
|
||||
(B43_NPHY_RFCTL_CMD_RXEN |
|
||||
code << B43_NPHY_RFCTL_CMD_CORESEL_SHIFT));
|
||||
b43_phy_set(dev, B43_NPHY_RFCTL_OVER,
|
||||
(0x1 << 12 |
|
||||
0x1 << 5 |
|
||||
0x1 << 1 |
|
||||
0x1));
|
||||
b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
|
||||
B43_NPHY_RFCTL_CMD_START);
|
||||
udelay(20);
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
|
||||
{
|
||||
u8 i;
|
||||
u16 reg, val;
|
||||
|
||||
if (code == 0) {
|
||||
b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
|
||||
b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
|
||||
b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
|
||||
b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
|
||||
b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
|
||||
b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
|
||||
b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
|
||||
} else {
|
||||
for (i = 0; i < 2; i++) {
|
||||
if ((code == 1 && i == 1) || (code == 2 && !i))
|
||||
continue;
|
||||
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
|
||||
b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
|
||||
|
||||
if (type < 3) {
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_AFECTL_C1 :
|
||||
B43_NPHY_AFECTL_C2;
|
||||
b43_phy_maskset(dev, reg, 0xFCFF, 0);
|
||||
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_RFCTL_LUT_TRSW_UP1 :
|
||||
B43_NPHY_RFCTL_LUT_TRSW_UP2;
|
||||
b43_phy_maskset(dev, reg, 0xFFC3, 0);
|
||||
|
||||
if (type == 0)
|
||||
val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
|
||||
else if (type == 1)
|
||||
val = 16;
|
||||
else
|
||||
val = 32;
|
||||
b43_phy_set(dev, reg, val);
|
||||
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_TXF_40CO_B1S0 :
|
||||
B43_NPHY_TXF_40CO_B32S1;
|
||||
b43_phy_set(dev, reg, 0x0020);
|
||||
} else {
|
||||
if (type == 6)
|
||||
val = 0x0100;
|
||||
else if (type == 3)
|
||||
val = 0x0200;
|
||||
else
|
||||
val = 0x0300;
|
||||
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_AFECTL_C1 :
|
||||
B43_NPHY_AFECTL_C2;
|
||||
|
||||
b43_phy_maskset(dev, reg, 0xFCFF, val);
|
||||
b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
|
||||
|
||||
if (type != 3 && type != 6) {
|
||||
enum ieee80211_band band =
|
||||
b43_current_band(dev->wl);
|
||||
|
||||
if (b43_nphy_ipa(dev))
|
||||
val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
|
||||
else
|
||||
val = 0x11;
|
||||
reg = (i == 0) ? 0x2000 : 0x3000;
|
||||
reg |= B2055_PADDRV;
|
||||
b43_radio_write16(dev, reg, val);
|
||||
|
||||
reg = (i == 0) ?
|
||||
B43_NPHY_AFECTL_OVER1 :
|
||||
B43_NPHY_AFECTL_OVER;
|
||||
b43_phy_set(dev, reg, 0x0200);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
|
||||
static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
|
||||
{
|
||||
if (dev->phy.rev >= 3)
|
||||
b43_nphy_rev3_rssi_select(dev, code, type);
|
||||
else
|
||||
b43_nphy_rev2_rssi_select(dev, code, type);
|
||||
}
|
||||
|
||||
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
|
||||
static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user