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arm: dts: qcom: Add TCSR support for IPQ8064

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This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Andy Gross 2015-02-09 16:01:09 -06:00 committed by Olof Johansson
parent 4105d9d60a
commit 4d9b766bfe
1 changed files with 14 additions and 0 deletions
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14
arch/arm/boot/dts/qcom-ipq8064.dtsi
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@ -120,6 +120,7 @@
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
reg = <0x12480000 0x100>;
clocks = <&gcc GSBI2_H_CLK>;
clock-names = "iface";
@ -128,6 +129,8 @@
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
serial@12490000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12490000 0x1000>,
@ -155,6 +158,7 @@
gsbi4: gsbi@16300000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <4>;
reg = <0x16300000 0x100>;
clocks = <&gcc GSBI4_H_CLK>;
clock-names = "iface";
@ -163,6 +167,8 @@
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
serial@16340000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16340000 0x1000>,
@ -189,6 +195,7 @@
gsbi5: gsbi@1a200000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <5>;
reg = <0x1a200000 0x100>;
clocks = <&gcc GSBI5_H_CLK>;
clock-names = "iface";
@ -197,6 +204,8 @@
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
serial@1a240000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x1a240000 0x1000>,
@ -279,5 +288,10 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-ipq8064", "syscon";
reg = <0x1a400000 0x100>;
};
};
};