forked from Minki/linux
x86, earlyprintk: Add hsu early console for Intel Medfield platform
Intel Medfield platform has a high speed UART device, which could act as a early console. To enable early printk of HSU console, simply add "earlyprintk=hsu" in kernel command line. Currently we put the code in the early_printk_mrst.c as it is also for Intel MID platforms like the mrst early console Signed-off-by: Feng Tang <feng.tang@intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: greg@kroah.com LKML-Reference: <1284361736-23011-5-git-send-email-feng.tang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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c20b5c3318
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@ -47,4 +47,7 @@ extern enum mrst_timer_options mrst_timer_options;
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extern struct console early_mrst_console;
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extern void mrst_early_console_init(void);
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extern struct console early_hsu_console;
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extern void hsu_early_console_init(void);
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#endif /* _ASM_X86_MRST_H */
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@ -245,6 +245,12 @@ static int __init setup_early_printk(char *buf)
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mrst_early_console_init();
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early_console_register(&early_mrst_console, keep);
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}
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if (!strncmp(buf, "hsu", 3)) {
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hsu_early_console_init();
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early_console_register(&early_hsu_console, keep);
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}
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#endif
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buf++;
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}
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@ -1,5 +1,5 @@
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/*
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* early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
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* early_printk_mrst.c - early consoles for Intel MID platforms
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*
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* Copyright (c) 2008-2010, Intel Corporation
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*
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@ -9,9 +9,19 @@
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* of the License.
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*/
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/*
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* This file implements two early consoles named mrst and hsu.
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* mrst is based on Maxim3110 spi-uart device, it exists in both
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* Moorestown and Medfield platforms, while hsu is based on a High
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* Speed UART device which only exists in the Medfield platform
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*/
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#include <linux/serial_reg.h>
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#include <linux/serial_mfd.h>
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#include <linux/kmsg_dump.h>
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#include <linux/console.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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@ -230,3 +240,80 @@ struct console early_mrst_console = {
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.flags = CON_PRINTBUFFER,
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.index = -1,
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};
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/*
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* Following is the early console based on Medfield HSU (High
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* Speed UART) device.
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*/
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#define HSU_PORT2_PADDR 0xffa28180
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static void __iomem *phsu;
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void hsu_early_console_init(void)
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{
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u8 lcr;
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phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
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HSU_PORT2_PADDR);
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/* Disable FIFO */
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writeb(0x0, phsu + UART_FCR);
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/* Set to default 115200 bps, 8n1 */
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lcr = readb(phsu + UART_LCR);
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writeb((0x80 | lcr), phsu + UART_LCR);
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writeb(0x18, phsu + UART_DLL);
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writeb(lcr, phsu + UART_LCR);
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writel(0x3600, phsu + UART_MUL*4);
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writeb(0x8, phsu + UART_MCR);
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writeb(0x7, phsu + UART_FCR);
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writeb(0x3, phsu + UART_LCR);
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/* Clear IRQ status */
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readb(phsu + UART_LSR);
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readb(phsu + UART_RX);
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readb(phsu + UART_IIR);
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readb(phsu + UART_MSR);
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/* Enable FIFO */
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writeb(0x7, phsu + UART_FCR);
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}
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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static void early_hsu_putc(char ch)
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{
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unsigned int timeout = 10000; /* 10ms */
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u8 status;
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while (--timeout) {
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status = readb(phsu + UART_LSR);
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if (status & BOTH_EMPTY)
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break;
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udelay(1);
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}
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/* Only write the char when there was no timeout */
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if (timeout)
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writeb(ch, phsu + UART_TX);
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}
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static void early_hsu_write(struct console *con, const char *str, unsigned n)
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{
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int i;
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for (i = 0; i < n && *str; i++) {
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if (*str == '\n')
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early_hsu_putc('\r');
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early_hsu_putc(*str);
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str++;
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}
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}
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struct console early_hsu_console = {
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.name = "earlyhsu",
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.write = early_hsu_write,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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};
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