spi: Fixes for v5.13
A small set of SPI fixes that have come up since the merge window, all fairly small fixes for rare cases. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmC/bKEACgkQJNaLcl1U h9Cgpgf+Jwo3myN4U4xOImlchJE/BTnWmS8H0uJhPRStp7UXzjzSd0JlUCViHUUp FjL3/6dzYKucR4J0MhPtChu/jLyOVUmhBW50/tv/FK1boDXyqFIMBZkyeGcCIVuC OL0nO1yzhQh44ljeZI0mWOOZuKiCxcFXP1Oz1Z8VqCzNES6SsA2ylO640c6aqKti 53uPRW4NY/HLvr01IH92FWZX3I7tUhZQe3JNtztm56VDZvV2PM+/m1cFTgMH2npc u5GONIuQdMmHt0kirLTlf0aOV3SWKK6j6JJnpKeTSSxIIoUYR9O4GIWWSNQLq8Q7 e7IUuhFYs8TBbRMnKYdFGtVdrUlh9w== =iPC4 -----END PGP SIGNATURE----- Merge tag 'spi-fix-v5.13-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A small set of SPI fixes that have come up since the merge window, all fairly small fixes for rare cases" * tag 'spi-fix-v5.13-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: stm32-qspi: Always wait BUSY bit to be cleared in stm32_qspi_wait_cmd() spi: spi-zynq-qspi: Fix some wrong goto jumps & missing error code spi: Cleanup on failure of initial setup spi: bcm2835: Fix out-of-bounds access with more than 4 slaves
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commit
4c8684fe55
@ -68,7 +68,7 @@
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#define BCM2835_SPI_FIFO_SIZE 64
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#define BCM2835_SPI_FIFO_SIZE_3_4 48
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#define BCM2835_SPI_DMA_MIN_LENGTH 96
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#define BCM2835_SPI_NUM_CS 4 /* raise as necessary */
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#define BCM2835_SPI_NUM_CS 24 /* raise as necessary */
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#define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
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| SPI_NO_CS | SPI_3WIRE)
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@ -1195,6 +1195,12 @@ static int bcm2835_spi_setup(struct spi_device *spi)
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struct gpio_chip *chip;
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u32 cs;
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if (spi->chip_select >= BCM2835_SPI_NUM_CS) {
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dev_err(&spi->dev, "only %d chip-selects supported\n",
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BCM2835_SPI_NUM_CS - 1);
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return -EINVAL;
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}
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/*
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* Precalculate SPI slave's CS register value for ->prepare_message():
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* The driver always uses software-controlled GPIO chip select, hence
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@ -1288,7 +1294,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
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ctlr->use_gpio_descriptors = true;
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ctlr->mode_bits = BCM2835_SPI_MODE_BITS;
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ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
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ctlr->num_chipselect = BCM2835_SPI_NUM_CS;
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ctlr->num_chipselect = 3;
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ctlr->setup = bcm2835_spi_setup;
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ctlr->transfer_one = bcm2835_spi_transfer_one;
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ctlr->handle_err = bcm2835_spi_handle_err;
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@ -184,6 +184,8 @@ int spi_bitbang_setup(struct spi_device *spi)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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struct spi_bitbang *bitbang;
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bool initial_setup = false;
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int retval;
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bitbang = spi_master_get_devdata(spi->master);
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@ -192,22 +194,30 @@ int spi_bitbang_setup(struct spi_device *spi)
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if (!cs)
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return -ENOMEM;
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spi->controller_state = cs;
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initial_setup = true;
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}
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/* per-word shift register access, in hardware or bitbanging */
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cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
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if (!cs->txrx_word)
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return -EINVAL;
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if (!cs->txrx_word) {
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retval = -EINVAL;
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goto err_free;
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}
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if (bitbang->setup_transfer) {
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int retval = bitbang->setup_transfer(spi, NULL);
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retval = bitbang->setup_transfer(spi, NULL);
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if (retval < 0)
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return retval;
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goto err_free;
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}
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dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
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return 0;
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err_free:
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if (initial_setup)
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kfree(cs);
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return retval;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_setup);
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@ -440,6 +440,7 @@ static int fsl_spi_setup(struct spi_device *spi)
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{
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struct mpc8xxx_spi *mpc8xxx_spi;
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struct fsl_spi_reg __iomem *reg_base;
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bool initial_setup = false;
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int retval;
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u32 hw_mode;
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struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
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@ -452,6 +453,7 @@ static int fsl_spi_setup(struct spi_device *spi)
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if (!cs)
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return -ENOMEM;
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spi_set_ctldata(spi, cs);
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initial_setup = true;
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}
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mpc8xxx_spi = spi_master_get_devdata(spi->master);
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@ -475,6 +477,8 @@ static int fsl_spi_setup(struct spi_device *spi)
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retval = fsl_spi_setup_transfer(spi, NULL);
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if (retval < 0) {
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cs->hw_mode = hw_mode; /* Restore settings */
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if (initial_setup)
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kfree(cs);
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return retval;
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}
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@ -424,15 +424,22 @@ done:
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static int uwire_setup(struct spi_device *spi)
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{
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struct uwire_state *ust = spi->controller_state;
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bool initial_setup = false;
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int status;
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if (ust == NULL) {
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ust = kzalloc(sizeof(*ust), GFP_KERNEL);
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if (ust == NULL)
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return -ENOMEM;
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spi->controller_state = ust;
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initial_setup = true;
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}
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return uwire_setup_transfer(spi, NULL);
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status = uwire_setup_transfer(spi, NULL);
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if (status && initial_setup)
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kfree(ust);
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return status;
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}
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static void uwire_cleanup(struct spi_device *spi)
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@ -1032,8 +1032,22 @@ static void omap2_mcspi_release_dma(struct spi_master *master)
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}
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}
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static void omap2_mcspi_cleanup(struct spi_device *spi)
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{
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struct omap2_mcspi_cs *cs;
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if (spi->controller_state) {
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/* Unlink controller state from context save list */
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cs = spi->controller_state;
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list_del(&cs->node);
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kfree(cs);
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}
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}
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static int omap2_mcspi_setup(struct spi_device *spi)
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{
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bool initial_setup = false;
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int ret;
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struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
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struct omap2_mcspi_regs *ctx = &mcspi->ctx;
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@ -1051,35 +1065,28 @@ static int omap2_mcspi_setup(struct spi_device *spi)
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spi->controller_state = cs;
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/* Link this to context save list */
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list_add_tail(&cs->node, &ctx->cs);
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initial_setup = true;
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}
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ret = pm_runtime_get_sync(mcspi->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(mcspi->dev);
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if (initial_setup)
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omap2_mcspi_cleanup(spi);
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return ret;
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}
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ret = omap2_mcspi_setup_transfer(spi, NULL);
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if (ret && initial_setup)
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omap2_mcspi_cleanup(spi);
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pm_runtime_mark_last_busy(mcspi->dev);
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pm_runtime_put_autosuspend(mcspi->dev);
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return ret;
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}
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static void omap2_mcspi_cleanup(struct spi_device *spi)
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{
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struct omap2_mcspi_cs *cs;
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if (spi->controller_state) {
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/* Unlink controller state from context save list */
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cs = spi->controller_state;
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list_del(&cs->node);
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kfree(cs);
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}
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}
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static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data)
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{
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struct omap2_mcspi *mcspi = data;
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@ -1254,6 +1254,8 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip,
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chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH;
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err = gpiod_direction_output(gpiod, !chip->gpio_cs_inverted);
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if (err)
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gpiod_put(chip->gpiod_cs);
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}
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return err;
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@ -1267,6 +1269,7 @@ static int setup(struct spi_device *spi)
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struct driver_data *drv_data =
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spi_controller_get_devdata(spi->controller);
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uint tx_thres, tx_hi_thres, rx_thres;
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int err;
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switch (drv_data->ssp_type) {
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case QUARK_X1000_SSP:
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@ -1413,7 +1416,11 @@ static int setup(struct spi_device *spi)
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if (drv_data->ssp_type == CE4100_SSP)
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return 0;
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return setup_cs(spi, chip, chip_info);
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err = setup_cs(spi, chip, chip_info);
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if (err)
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kfree(chip);
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return err;
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}
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static void cleanup(struct spi_device *spi)
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@ -294,7 +294,7 @@ static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi,
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int err = 0;
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if (!op->data.nbytes)
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return stm32_qspi_wait_nobusy(qspi);
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goto wait_nobusy;
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if (readl_relaxed(qspi->io_base + QSPI_SR) & SR_TCF)
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goto out;
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@ -315,6 +315,9 @@ static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi,
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out:
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/* clear flags */
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writel_relaxed(FCR_CTCF | FCR_CTEF, qspi->io_base + QSPI_FCR);
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wait_nobusy:
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if (!err)
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err = stm32_qspi_wait_nobusy(qspi);
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return err;
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}
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@ -678,14 +678,14 @@ static int zynq_qspi_probe(struct platform_device *pdev)
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xqspi->irq = platform_get_irq(pdev, 0);
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if (xqspi->irq <= 0) {
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ret = -ENXIO;
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goto remove_master;
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goto clk_dis_all;
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}
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ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq,
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0, pdev->name, xqspi);
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if (ret != 0) {
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ret = -ENXIO;
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dev_err(&pdev->dev, "request_irq failed\n");
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goto remove_master;
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goto clk_dis_all;
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}
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ret = of_property_read_u32(np, "num-cs",
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@ -693,8 +693,9 @@ static int zynq_qspi_probe(struct platform_device *pdev)
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if (ret < 0) {
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ctlr->num_chipselect = 1;
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} else if (num_cs > ZYNQ_QSPI_MAX_NUM_CS) {
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ret = -EINVAL;
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dev_err(&pdev->dev, "only 2 chip selects are available\n");
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goto remove_master;
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goto clk_dis_all;
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} else {
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ctlr->num_chipselect = num_cs;
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}
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