iommu/vt-d: Allocate/register iopf queue for sva devices
This allocates and registers the iopf queue infrastructure for devices which want to support IO page fault for SVA. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20210520031531.712333-1-baolu.lu@linux.intel.com Link: https://lore.kernel.org/r/20210610020115.1637656-11-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -46,6 +46,7 @@
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#include <asm/iommu.h>
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#include "../irq_remapping.h"
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#include "../iommu-sva-lib.h"
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#include "pasid.h"
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#include "cap_audit.h"
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@ -5338,6 +5339,34 @@ static int intel_iommu_disable_auxd(struct device *dev)
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return 0;
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}
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static int intel_iommu_enable_sva(struct device *dev)
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{
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struct device_domain_info *info = get_domain_info(dev);
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struct intel_iommu *iommu = info->iommu;
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if (!info || !iommu || dmar_disabled)
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return -EINVAL;
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if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE))
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return -ENODEV;
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if (intel_iommu_enable_pasid(iommu, dev))
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return -ENODEV;
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if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled)
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return -EINVAL;
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return iopf_queue_add_device(iommu->iopf_queue, dev);
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}
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static int intel_iommu_disable_sva(struct device *dev)
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{
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struct device_domain_info *info = get_domain_info(dev);
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struct intel_iommu *iommu = info->iommu;
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return iopf_queue_remove_device(iommu->iopf_queue, dev);
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}
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/*
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* A PCI express designated vendor specific extended capability is defined
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* in the section 3.7 of Intel scalable I/O virtualization technical spec
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@ -5399,38 +5428,37 @@ intel_iommu_dev_has_feat(struct device *dev, enum iommu_dev_features feat)
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static int
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intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
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{
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if (feat == IOMMU_DEV_FEAT_AUX)
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switch (feat) {
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case IOMMU_DEV_FEAT_AUX:
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return intel_iommu_enable_auxd(dev);
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if (feat == IOMMU_DEV_FEAT_IOPF)
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case IOMMU_DEV_FEAT_IOPF:
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return intel_iommu_dev_has_feat(dev, feat) ? 0 : -ENODEV;
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if (feat == IOMMU_DEV_FEAT_SVA) {
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struct device_domain_info *info = get_domain_info(dev);
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case IOMMU_DEV_FEAT_SVA:
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return intel_iommu_enable_sva(dev);
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if (!info)
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return -EINVAL;
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if (intel_iommu_enable_pasid(info->iommu, dev))
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return -ENODEV;
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if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled)
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return -EINVAL;
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if (info->iommu->flags & VTD_FLAG_SVM_CAPABLE)
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return 0;
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default:
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return -ENODEV;
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}
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return -ENODEV;
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}
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static int
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intel_iommu_dev_disable_feat(struct device *dev, enum iommu_dev_features feat)
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{
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if (feat == IOMMU_DEV_FEAT_AUX)
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switch (feat) {
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case IOMMU_DEV_FEAT_AUX:
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return intel_iommu_disable_auxd(dev);
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return -ENODEV;
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case IOMMU_DEV_FEAT_IOPF:
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return 0;
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case IOMMU_DEV_FEAT_SVA:
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return intel_iommu_disable_sva(dev);
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default:
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return -ENODEV;
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}
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}
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static bool
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@ -84,6 +84,7 @@ svm_lookup_device_by_dev(struct intel_svm *svm, struct device *dev)
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int intel_svm_enable_prq(struct intel_iommu *iommu)
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{
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struct iopf_queue *iopfq;
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struct page *pages;
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int irq, ret;
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@ -100,13 +101,20 @@ int intel_svm_enable_prq(struct intel_iommu *iommu)
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pr_err("IOMMU: %s: Failed to create IRQ vector for page request queue\n",
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iommu->name);
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ret = -EINVAL;
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err:
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free_pages((unsigned long)iommu->prq, PRQ_ORDER);
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iommu->prq = NULL;
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return ret;
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goto free_prq;
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}
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iommu->pr_irq = irq;
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snprintf(iommu->iopfq_name, sizeof(iommu->iopfq_name),
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"dmar%d-iopfq", iommu->seq_id);
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iopfq = iopf_queue_alloc(iommu->iopfq_name);
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if (!iopfq) {
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pr_err("IOMMU: %s: Failed to allocate iopf queue\n", iommu->name);
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ret = -ENOMEM;
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goto free_hwirq;
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}
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iommu->iopf_queue = iopfq;
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snprintf(iommu->prq_name, sizeof(iommu->prq_name), "dmar%d-prq", iommu->seq_id);
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ret = request_threaded_irq(irq, NULL, prq_event_thread, IRQF_ONESHOT,
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@ -114,9 +122,7 @@ int intel_svm_enable_prq(struct intel_iommu *iommu)
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if (ret) {
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pr_err("IOMMU: %s: Failed to request IRQ for page request queue\n",
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iommu->name);
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dmar_free_hwirq(irq);
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iommu->pr_irq = 0;
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goto err;
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goto free_iopfq;
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}
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dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL);
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dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL);
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@ -125,6 +131,18 @@ int intel_svm_enable_prq(struct intel_iommu *iommu)
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init_completion(&iommu->prq_complete);
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return 0;
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free_iopfq:
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iopf_queue_free(iommu->iopf_queue);
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iommu->iopf_queue = NULL;
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free_hwirq:
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dmar_free_hwirq(irq);
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iommu->pr_irq = 0;
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free_prq:
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free_pages((unsigned long)iommu->prq, PRQ_ORDER);
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iommu->prq = NULL;
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return ret;
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}
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int intel_svm_finish_prq(struct intel_iommu *iommu)
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@ -139,6 +157,11 @@ int intel_svm_finish_prq(struct intel_iommu *iommu)
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iommu->pr_irq = 0;
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}
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if (iommu->iopf_queue) {
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iopf_queue_free(iommu->iopf_queue);
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iommu->iopf_queue = NULL;
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}
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free_pages((unsigned long)iommu->prq, PRQ_ORDER);
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iommu->prq = NULL;
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@ -606,6 +606,8 @@ struct intel_iommu {
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struct completion prq_complete;
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struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for PASIDs */
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#endif
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struct iopf_queue *iopf_queue;
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unsigned char iopfq_name[16];
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struct q_inval *qi; /* Queued invalidation info */
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u32 *iommu_state; /* Store iommu states between suspend and resume.*/
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