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sparc64/PCI: drop PCI_CACHE_LINE_BYTES

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sparc64 is now the only user of PCI_CACHE_LINE_BYTES.  Drop it and set
pci_dfl_cache_line_size from pcibios_init() instead and drop
PCI_CACHE_LINE_BYTES handling from generic pci code.

Orignally-From: David Miller <davem@davemloft.net>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Tejun Heo 2009-09-22 17:34:17 +09:00 committed by Jesse Barnes
parent ac1aa47b13
commit 4c0eec7a86
3 changed files with 8 additions and 7 deletions
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2
arch/sparc/include/asm/pci_64.h
View File

@ -16,8 +16,6 @@
#define PCI_IRQ_NONE 0xffffffff
#define PCI_CACHE_LINE_BYTES 64
static inline void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling */

7
arch/sparc/kernel/pci.c
View File

@ -1081,3 +1081,10 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
*start = rp->start - offset;
*end = rp->end - offset;
}
static int __init pcibios_init(void)
{
pci_dfl_cache_line_size = 64 >> 2;
return 0;
}
subsys_initcall(pcibios_init);

6
drivers/pci/pci.c
View File

@ -47,17 +47,13 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE;
unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
#ifndef PCI_CACHE_LINE_BYTES
#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
#endif
/*
* The default CLS is used if arch didn't set CLS explicitly and not
* all pci devices agree on the same value. Arch can override either
* the dfl or actual value as it sees fit. Don't forget this is
* measured in 32-bit words, not bytes.
*/
u8 pci_dfl_cache_line_size __initdata = PCI_CACHE_LINE_BYTES >> 2;
u8 pci_dfl_cache_line_size __initdata = L1_CACHE_BYTES >> 2;
u8 pci_cache_line_size;
/**