leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

cxgb4: tune burst buffer size for TC-MQPRIO offload

Browse Source 
For each traffic class, firmware handles up to 4 * MTU amount of data
per burst cycle. Under heavy load, this small buffer size is a
bottleneck when buffering large TSO packets in <= 1500 MTU case.
Increase the burst buffer size to 8 * MTU when supported.

Also, keep the driver's traffic class configuration API similar to
the firmware API counterpart.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Rahul Lakkireddy 2020-05-15 22:41:04 +05:30 committed by David S. Miller
parent 4f1d97262d
commit 4bccfc036a
5 changed files with 31 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
View File

@ -1125,19 +1125,20 @@ struct adapter {
* programmed with various parameters. * programmed with various parameters.
*/ */
struct ch_sched_params { struct ch_sched_params {
s8 type; /* packet or flow */ u8 type; /* packet or flow */
union { union {
struct { struct {
s8 level; /* scheduler hierarchy level */ u8 level; /* scheduler hierarchy level */
s8 mode; /* per-class or per-flow */ u8 mode; /* per-class or per-flow */
s8 rateunit; /* bit or packet rate */ u8 rateunit; /* bit or packet rate */
s8 ratemode; /* %port relative or kbps absolute */ u8 ratemode; /* %port relative or kbps absolute */
s8 channel; /* scheduler channel [0..N] */ u8 channel; /* scheduler channel [0..N] */
s8 class; /* scheduler class [0..N] */ u8 class; /* scheduler class [0..N] */
s32 minrate; /* minimum rate */ u32 minrate; /* minimum rate */
s32 maxrate; /* maximum rate */ u32 maxrate; /* maximum rate */
s16 weight; /* percent weight */ u16 weight; /* percent weight */
s16 pktsize; /* average packet size */ u16 pktsize; /* average packet size */
u16 burstsize; /* burst buffer size */
} params; } params;
} u; } u;
}; };
@ -1952,9 +1953,10 @@ int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
enum ctxt_type ctype, u32 *data); enum ctxt_type ctype, u32 *data);
int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid,
enum ctxt_type ctype, u32 *data); enum ctxt_type ctype, u32 *data);
int t4_sched_params(struct adapter *adapter, int type, int level, int mode, int t4_sched_params(struct adapter *adapter, u8 type, u8 level, u8 mode,
int rateunit, int ratemode, int channel, int class, u8 rateunit, u8 ratemode, u8 channel, u8 class,
int minrate, int maxrate, int weight, int pktsize); u32 minrate, u32 maxrate, u16 weight, u16 pktsize,
u16 burstsize);
void t4_sge_decode_idma_state(struct adapter *adapter, int state); void t4_sge_decode_idma_state(struct adapter *adapter, int state);
void t4_idma_monitor_init(struct adapter *adapter, void t4_idma_monitor_init(struct adapter *adapter,
struct sge_idma_monitor_state *idma); struct sge_idma_monitor_state *idma);

2
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
View File

@ -3021,7 +3021,7 @@ static int cxgb4_mgmt_set_vf_rate(struct net_device *dev, int vf,
SCHED_CLASS_RATEUNIT_BITS, SCHED_CLASS_RATEUNIT_BITS,
SCHED_CLASS_RATEMODE_ABS, SCHED_CLASS_RATEMODE_ABS,
pi->tx_chan, class_id, 0, pi->tx_chan, class_id, 0,
max_tx_rate * 1000, 0, pktsize); max_tx_rate * 1000, 0, pktsize, 0);
if (ret) { if (ret) {
dev_err(adap->pdev_dev, "Err %d for Traffic Class config\n", dev_err(adap->pdev_dev, "Err %d for Traffic Class config\n",
ret); ret);

7
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c
View File

@ -342,6 +342,13 @@ static int cxgb4_mqprio_alloc_tc(struct net_device *dev,
p.u.params.minrate = div_u64(mqprio->min_rate[i] * 8, 1000); p.u.params.minrate = div_u64(mqprio->min_rate[i] * 8, 1000);
p.u.params.maxrate = div_u64(mqprio->max_rate[i] * 8, 1000); p.u.params.maxrate = div_u64(mqprio->max_rate[i] * 8, 1000);
/* Request larger burst buffer for smaller MTU, so
* that hardware can work on more data per burst
* cycle.
*/
if (dev->mtu <= ETH_DATA_LEN)
p.u.params.burstsize = 8 * dev->mtu;
e = cxgb4_sched_class_alloc(dev, &p); e = cxgb4_sched_class_alloc(dev, &p);
if (!e) { if (!e) {
ret = -ENOMEM; ret = -ENOMEM;

3
drivers/net/ethernet/chelsio/cxgb4/sched.c
View File

@ -57,7 +57,8 @@ static int t4_sched_class_fw_cmd(struct port_info *pi,
p->u.params.ratemode, p->u.params.ratemode,
p->u.params.channel, e->idx, p->u.params.channel, e->idx,
p->u.params.minrate, p->u.params.maxrate, p->u.params.minrate, p->u.params.maxrate,
p->u.params.weight, p->u.params.pktsize); p->u.params.weight, p->u.params.pktsize,
p->u.params.burstsize);
break; break;
default: default:
err = -ENOTSUPP; err = -ENOTSUPP;

8
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
View File

@ -10361,9 +10361,10 @@ int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid,
return ret; return ret;
} }
int t4_sched_params(struct adapter *adapter, int type, int level, int mode, int t4_sched_params(struct adapter *adapter, u8 type, u8 level, u8 mode,
int rateunit, int ratemode, int channel, int class, u8 rateunit, u8 ratemode, u8 channel, u8 class,
int minrate, int maxrate, int weight, int pktsize) u32 minrate, u32 maxrate, u16 weight, u16 pktsize,
u16 burstsize)
{ {
struct fw_sched_cmd cmd; struct fw_sched_cmd cmd;
@ -10385,6 +10386,7 @@ int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
cmd.u.params.max = cpu_to_be32(maxrate); cmd.u.params.max = cpu_to_be32(maxrate);
cmd.u.params.weight = cpu_to_be16(weight); cmd.u.params.weight = cpu_to_be16(weight);
cmd.u.params.pktsize = cpu_to_be16(pktsize); cmd.u.params.pktsize = cpu_to_be16(pktsize);
cmd.u.params.burstsize = cpu_to_be16(burstsize);
return t4_wr_mbox_meat(adapter, adapter->mbox, &cmd, sizeof(cmd), return t4_wr_mbox_meat(adapter, adapter->mbox, &cmd, sizeof(cmd),
NULL, 1); NULL, 1);