ath9k_hw: fill in the callbacks for calibration for AR9003

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez 2010-04-15 17:39:10 -04:00 committed by John W. Linville
parent 77d6d39a77
commit 4b01931e3a
3 changed files with 39 additions and 2 deletions

View File

@ -50,6 +50,8 @@ static void ar9002_hw_setup_calibration(struct ath_hw *ah,
ath_print(common, ATH_DBG_CALIBRATE, ath_print(common, ATH_DBG_CALIBRATE,
"starting Init ADC DC Calibration\n"); "starting Init ADC DC Calibration\n");
break; break;
case TEMP_COMP_CAL:
break; /* Not supported */
} }
REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0), REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),

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@ -21,7 +21,41 @@
static void ar9003_hw_setup_calibration(struct ath_hw *ah, static void ar9003_hw_setup_calibration(struct ath_hw *ah,
struct ath9k_cal_list *currCal) struct ath9k_cal_list *currCal)
{ {
/* TODO */ struct ath_common *common = ath9k_hw_common(ah);
/* Select calibration to run */
switch (currCal->calData->calType) {
case IQ_MISMATCH_CAL:
/*
* Start calibration with
* 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
*/
REG_RMW_FIELD(ah, AR_PHY_TIMING4,
AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
currCal->calData->calCountMax);
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
ath_print(common, ATH_DBG_CALIBRATE,
"starting IQ Mismatch Calibration\n");
/* Kick-off cal */
REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
break;
case TEMP_COMP_CAL:
REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
AR_PHY_65NM_CH0_THERM_LOCAL, 1);
REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
AR_PHY_65NM_CH0_THERM_START, 1);
ath_print(common, ATH_DBG_CALIBRATE,
"starting Temperature Compensation Calibration\n");
break;
case ADC_DC_INIT_CAL:
case ADC_GAIN_CAL:
case ADC_DC_CAL:
/* Not yet */
break;
}
} }
static bool ar9003_hw_calibrate(struct ath_hw *ah, static bool ar9003_hw_calibrate(struct ath_hw *ah,

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@ -68,7 +68,8 @@ enum ath9k_cal_types {
ADC_DC_INIT_CAL = 0x1, ADC_DC_INIT_CAL = 0x1,
ADC_GAIN_CAL = 0x2, ADC_GAIN_CAL = 0x2,
ADC_DC_CAL = 0x4, ADC_DC_CAL = 0x4,
IQ_MISMATCH_CAL = 0x8 IQ_MISMATCH_CAL = 0x8,
TEMP_COMP_CAL = 0x10,
}; };
enum ath9k_cal_state { enum ath9k_cal_state {